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The top documents of vlsics
An integrated approach for designing and testing specific processors
606 views
CROSSTALK MINIMIZATION FOR COUPLED RLC INTERCONNECTS USING BIDIRECTIONAL BUFFER AND SHIELD INSERTION
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ESTABLISHING A MOLECULAR COMMUNICATION CHANNEL FOR NANO NETWORKS
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Cost effective test methodology using pmu for automated test equipment systems
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DESIGN OF THREE BIT ANALOG-TO-DIGITAL CONVERTER (ADC) USING SPATIAL WAVEFUNCTION SWITCHED (SWS) FETS
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EVALUATION OF OPTICALLY ILLUMINATED MOSFET CHARACTERISTICS BY TCAD SIMULATION
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A NEW LOW VOLTAGE P-MOS BULK DRIVEN CURRENT MIRROR CIRCUIT
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Compact low power high slew-rate cmos buffer amplifier with power gating technique
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CMOS LOW POWER CELL LIBRARY FOR DIGITAL DESIGN
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Low cost reversible signed comparator
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A 20 gbs injection locked clock and data recovery circuit
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POWER EFFICIENT CARRY PROPAGATE ADDER
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Design and implementation of 4 t, 3t and 3t1d dram cell design on 32 nm technology
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An operational amplifier with recycling folded cascode topology and adaptive biasing
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Accelerating system verilog uvm based vip to improve methodology for verification of image signal processing designs using hw emulator
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PERFORMANCE ANALYSIS OF MODIFIED QSERL CIRCUIT
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Fpga based efficient multiplier for image processing applications using recursive error free mitchell log multiplier and kom architecture
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A digital calibration algorithm with variable amplitude dithering for domain-extended pipeline ad cs
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LOW POWER-AREA DESIGNS OF 1BIT FULL ADDER IN CADENCE VIRTUOSO PLATFORM
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DESIGN OF IMPROVED RESISTOR LESS 45NM SWITCHED INVERTER SCHEME (SIS) ANALOG TO DIGITAL CONVERTER
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