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EE40 Lec 15
Logic Synthesis and
S CSequential Logic Circuits
P f N h ChProf. Nathan Cheung10/20/2009
Reading: Hambley Chapters 7.4-7.6Karnaugh Maps: Read following before reading textbook
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Karnaugh Maps: Read following before reading textbookhttp://www.facstaff.bucknell.edu/mastascu/eLessonsHTML/Logic/Logic3.html
Synthesis of Logic CircuitsSuppose we are given a truth table for a logic function.
Is there a method to implement the logic function using basic logic gates?
Answer: There are lots of ways, but one way is the “ f d t ” (SOP) th d“sum of products” (SOP) method:
1) Write the sum of products expression based on the ) p ptruth table for the logic function
2) Implement this expression using standard logic gates.
• An alternative way is the “product of sums” (POS) method.
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Logic Synthesis Example: AdderS S
A B C S1 S0
S1= carry, So=sum
0 0 0 0 00 0 1 0 1Truth Table of Adding
Three Inputs :0 1 0 0 10 1 1 1 0
Three Inputs : A, B, and C
0 1 1 1 01 0 0 0 11 0 1 1 01 1 0 1 0
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1 1 1 1 1
Logic Synthesis Example: Adder
Sum-of-products method for S1
1) Find rows where S1 is 1A B C S1 S0
Input Output
1) Find rows where S1 is 1
2) Write down each product of inputs which create a 1 (invert
A B C S1 S0
0 0 0 0 00 0 1 0 1 inputs which create a 1 (invert
logic variables that are 0 in that row)
0 0 1 0 10 1 0 0 10 1 1 1 01 0 0 0 1 A B C A B C
A B C A B C
1) Sum all of the products1 0 1 1 01 1 0 1 0
A B C + A B C + A B C + A B C
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2) Draw the logic circuit1 1 0 1 01 1 1 1 1
Logic Synthesis Example: Adder
A B
A B C + A B C + A B C + A B C
SOP Logic CircuitBC
A
SOP Logic Circuit
B CA
AB
C
AB
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BC
Creating a Better Circuit
What makes a digital circuit better?• Fewer number of gatesFewer number of gates• Fewer inputs on each gate
– multi-input gates are slower
• Let’s see how we can simplify the sum-of-products expression for S to make aproducts expression for S1, to make a better circuit…– Use the Boolean algebra relationsUse the Boolean algebra relations
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Logic Synthesis Example: Adder
A B )CC(ABCBABCAABCCABCBABCA+++=
+++
BC
A
ABCBABCA)(
++=
B CA
AB
SOP Simplification
Can we simplify this digital circuit further?
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Logic Synthesis Example: Adder
Add in two inversions (signal stays theA B (signal stays the same)
BC
AB C
A
AB
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Logic Synthesis Example: Adder
A B This becomes a NANDBC
AB C
A
Apply DeMorgan’s Theorem, i.e. “bubble
hi ”
AB
pushing”
XYZZYX =++
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NAND Gate Implementation
• De Morgan’s law tells us that
is the same as
• By definition,
is the same as
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All sum-of-products expressions can be implemented with only NAND gates.
Logic Synthesis Example: Adder
Product-of-sums method for S1
1) Find rows where S is 0A B C S1 S0
Input Output
1) Find rows where S1 is 0
2) Write down each sum of inputs which create a 0 (invert logic
0 0 0 0 0
0 0 1 0 1 which create a 0 (invert logic variables that are 1 in that row)
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0 )CBA( ++ )CBA( ++0 1 1 1 0
1 0 0 0 1
)CBA( ++ )CBA( ++
)CBA( ++ )CBA( ++3) Product of the sums1 0 1 1 0
1 1 0 1 0 )CBA)(CBA)(CBA)(CBA( ++++++++
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4) Draw the logic circuit1 1 0 1 0
1 1 1 1 1
SOP or POS ?
The Boolean Expression will appear shorter p pp• If the Truth table has less 1’s, SOP• If the Truth Table has less 0’s POS• If the Truth Table has less 0 s, POS
• After Minimization, both methods should give same results , unless there are “don’t care” rows in the Truth Table.
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Notations of Hambley Textbook
Row # A B C DSum of Products (SOP)
Row # A B C D0 0 0 0 11 0 0 1 02 0 1 0 1
)7,6,2,0(mD Σ=2 0 1 0 1
3 0 1 1 04 1 0 0 0
),,,(
Product of Sums (POS)5 1 0 1 06 1 1 0 17 1 1 1 1
( )
)5,4,3,1(MD Π= )5,4,3,1(MD Π
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Another Logic Synthesis Example: XOR
A B F0 0 00 1 1
Sum of Products (SOP)
)21(F ΣProduct of Sums (POS)
)30(MF Π0 1 11 0 11 1 0BABAF +=
)2,1(mF Σ=)BA)(BA(F ++=
)3,0(MF Π=
BABAF += )BA)(BA(F ++
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Karnaugh Maps
2-variableKarnaugh Map
3-variableKarnaugh Map
4-variable Karnaugh Map
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* Arrows show example locations of logic PRODUCTS
Comments on Karnaugh Maps• Required reading• http://www.facstaff.bucknell.edu/mastascu/eLessonsHTM
L/Logic/Logic3 htmlL/Logic/Logic3.html
• You may find more details there than the textbook.
• As the number of variables increases (say >4) it becomes more difficult to see patterns and computer methodsmore difficult to see patterns, and computer methods start to become more attractive.
EE40 ill f l 3 i bl d 4 i bl• EE40 will focus only on 3 variables and 4 variables Karnaugh Maps
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Comments on Karnaugh MapsFor a 4-variables map1-cube: 1 square by itself(⇒ logic product of 4 variables)( g p )
2-cube: 2 squares that have a common edge
(⇒ logic product of 3 variables)(⇒ logic product of 3 variables)
4-cube: 4 squares with common edges (⇒ logic product of 2 variables)
8-cube: 8 squares with common edges (⇒ logic product of 1 variable)
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Comments on Karnaugh Maps• In locating cubes on a Karnaugh map, the map should be considered
to fold around from top to bottom, and from left to right.
– Squares on the right-hand side are considered to be adjacent to those on the left-hand sidethose on the left hand side.
– Squares on the top of the map are considered to be adjacent to those CDon the bottom.
– Example: 1 100 01 11 10
00pThe four squares in the map corners form a 4-cube AB
01
11
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1 110
4-Variables ExampleF T th T bl d S f P d t• From Truth Table and Sum of ProductsF=Σ m(1,3,4,5,7,10,12,13)
• Converting the row numbers to binary yields 0001 0011• Converting the row numbers to binary yields 0001,0011, 0100 etc..
• Place 1’s into the Karnaugh Mapg
CBDADCBAF ++=
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I t O t t
3-Variables Example: Adder
A B C S1 S0
Input Output Simplification of expression for S1:B
0 0 0 0 00 0 1 0 1 00 01 11 10
BC
0 1 0 0 10 1 1 1 0
0 0 0 1 01 0 1 1 1
A0 1 1 1 01 0 0 0 11 0 1 1 0
C
1 0 1 1 01 1 0 1 0
BC AC AB
S = AB + BC + AC
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1 1 1 1 1S1 = AB + BC + AC
Miscellaneous Examples
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3-Variable Exercise
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4-Variable Exercise
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Exercise with “Don’t Cares”
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Sequential Logic Circuits• Sequential logic circuits that possess memory
because their present output value depends on i ll t i t lprevious as well as present input values.
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Clock Signals• Often, the operation of a sequential circuit is
synchronized by a clock signal :vC(t)
VOH
positive-going edge(leading edge)
negative-going edge(trailing edge)
time0TC 2TC
• The clock signal regulates when the circuits respond to new inputs so that operations occur
TC 2TC
respond to new inputs, so that operations occur in proper sequence.
• Sequential circuits that are regulated by a clock
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Sequential circuits that are regulated by a clock signal are said to be synchronous.
Flip-Flops• One of the basic building blocks for sequential
circuits is the flip-flop:– A simple flip-flop can be constructed using two
inverters:
Q
Q
0Q1QTwo possible states:
1Q,0Q0Q,1Q
==
==
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Q,Q* Circuit can remain in either state indefinitely
The S-R (“Set”-“Reset”) Flip-Flop
S QS-R Flip-Flop Symbol:
• Rule 1:
R Q
– If S = 0 and R = 0, Q does not change.• Rule 2:
– If S = 0 and R = 1, then Q = 0• Rule 3:
If S = 1 and R = 0 then Q = 1– If S = 1 and R = 0, then Q = 1• Rule 4:
– S = 1 and R = 1 should never occur.
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S 1 and R 1 should never occur.
Realization of the S-R Flip-Flop
SQ
RQ
R S Qn
0 0 Qn-1
0 1 11 0 0
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1 1 (not allowed)
XOR and NAND Implementation
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Exercise: Timing Diagram of SR flip-flop
R S Qn
0 0 Qn-1
0 1 11 0 01 1 (not allowed)( )
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Clocked S-R Flip-Flop
Wh CK 0 di bl th i t R d S• When CK = 0, disables the inputs R and S• When CK = 1, enables inputs R and S
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The D (“Delay”) Flip-Flop
D QD Flip-Flop Symbol:CK Q
• The output terminals Q and Q behave just as in the S-R flip-flop.Q h l h th l k i l CK• Q changes only when the clock signal CKmakes a positive transition. CK D Qn
0 × Qn-1
1 × Qn-1
↑ 0 0
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↑ 1 1
D Flip-Flop Example (Timing Diagram)CKCK
t
D
t
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t
Registers• A register is an array of flip-flops that is used to
store or manipulate the bits of a digital word.• Example: Serial In Parallel Out Shift Register using D• Example: Serial-In, Parallel-Out Shift Register using D
Flipflops
Q Q QParallel outputs
D0 Q0Data input D1 Q1 D2 Q2
Q0 Q1 Q2Parallel outputs
CK
Cl k i t
CK CK
Clock input
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Shift Register Timing Diagram
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J-K Flip Flop
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Ripple Counter
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Conclusion (Logic Circuits)
• Complex combinational logic functions can be achieved simply by interconnecting NAND gates (or NOR gates).
• Logic gates can be interconnected to form flip-flops.
• Interconnections of flip-flops form registers.• A complex digital system such as a computer
consists of many gates, flip-flops, and registers. Th l i t th b i b ildi bl kThus, logic gates are the basic building blocks for complex digital systems.
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