Post on 21-Dec-2015
transcript
331 Week 3. 1 Fall 2003
Head’s Up This week’s material
MIPS control flow operations (for, while, if-the-else, …)- Reading assignment - PH 3.5
Reminders HW2 is due THIS Friday, September 19th (by 5:00pm).
Please hand in the homework to my office (Core 518).
Next week’s material MIPS procedures and addressing modes
- Reading assignment - PH 3.6, A.6 and 3.8
331 Week 3. 2 Fall 2003
Review: MIPS Organization
ProcessorMemory
32 bits
230
words
read/write addr
read data
write data
word address(binary)
0…00000…01000…10000…1100
1…1100
Register File
src1 addr
src2 addr
dst addr
write data
32 bits
src1data
src2data
32registers
($zero - $ra)
32
32
32
32
32
32
5
5
5
ALU32
32
32 0 1 2 37654
byte address(big Endian)
Arithmetic instructions – to/from the register file
Load/store word and byte instructions – from/to memory
Fetch
DecodeExec
331 Week 3. 3 Fall 2003
Review: MIPS Instructions, so far
Category Instr Op Code Example Meaning
Arithmetic
(R format)
add 0 and 32 add $s1, $s2, $s3 $s1 = $s2 + $s3
subtract 0 and 34 sub $s1, $s2, $s3 $s1 = $s2 - $s3
Data
transfer
(I format)
load word 35 lw $s1, 100($s2) $s1 = Memory($s2+100)
store word 43 sw $s1, 100($s2) Memory($s2+100) = $s1
load byte 32 lb $s1, 101($s2) $s1 = Memory($s2+101)
store byte 40 sb $s1, 101($s2) Memory($s2+101) = $s1
331 Week 3. 4 Fall 2003
Decision making instructions alter the control flow i.e., change the "next" instruction to be executed
Why do we need decision making instructions? if (i==j) h = i + j;
MIPS conditional branch instructions:
bne $s0, $s1, Label #go to Label if $s0$s1
beq $s0, $s1, Label #go to Label if $s0=$s1
Example: if (i==j) h = i + j;
Instructions for Making Decisions
331 Week 3. 5 Fall 2003
Instructions:bne $s0, $s1, Label #go to Label if
$s0$s1 beq $s0, $s1, Label #go to Label if $s0=$s1
Machine Formats:
How is the branch destination address specified?
Assembling Branches
op rs rt 16 bit number I format
5 16 17 ????
4 16 17 ????
6 bits 5 bits 5 bits
331 Week 3. 6 Fall 2003
Specifying Branch Destinations
bne $s0,$s1,Lab1
add $s3,$s0,$s1
...Lab1:
Could specify the memory address
but that would require a 32 bit field
331 Week 3. 7 Fall 2003
Specifying Branch Destinations Could use a register (like lw and sw) and add to
it the 16-bit offset which register?
- Instruction Address Register (PC = program counter)
- its use is automatically implied by instruction
- PC gets updated (PC+4) during the fetch cycle so that it holds the address of the next instruction
bne $s0,$s1,Lab1
add $s3,$s0,$s1
...Lab1+PC:
PC limits the offset to -215 to +215-1 from the
(instruction after the) branch instruction, but- most branches are local anyway (principle of
locality)
One optimization- Each instruction is 4 bytes long, and only word
address is necessary (multiple of 4)
- We can right shift the offset by 2 bits (divided by 4), and store the value
- Essentially, it can cover -217 to +217-1 offset
331 Week 3. 8 Fall 2003
Disassembling Branch Destinations The contents of the updated PC (PC+4) is added to
the low order 16 bits of the branch instruction which is converted into a 32 bit value by
concatenating two low-order zeros to create an 18 bit number
sign-extending those 18 bits
The result is written into the PC if the branch condition is true prior to the next Fetch cycle
PCAdd
32
32 3232
32
offset
16
32
00
sign-extend
from the low order 16 bits of the branch instruction
branch dstaddress
?Add
4 32
Why??
331 Week 3. 9 Fall 2003
Assembly code bne $s0, $s1, Lab1
add $s3, $s0, $s1Lab1: ...
Machine Format of bne:
Assembling Branches Example
op rs rt 16 bit offset I format
5 16 17
Remember
After the bne instruction is fetched, the PC is updated to address the add instruction (PC = PC + 4).
Two low-order zeros are concatenated to the offset number and that value sign-extended is added to the (updated) PC
331 Week 3. 10 Fall 2003
MIPS Organization
ProcessorMemory
32 bits
230
words
read/write addr
read data
write data
word address(binary)
0…00000…01000…10000…1100
1…1100Register File
src1 addr
src2 addr
dst addr
write data
32 bits
src1data
src2data
32registers
($zero - $ra)
32
32
3232
32
32
5
5
5
PC
ALU
32 32
3232
32
0 1 2 37654
byte address(big Endian)
FetchPC = PC+4
DecodeExec
Add32
324
Add32
32br offset
331 Week 3. 11 Fall 2003
MIPS also has an unconditional branch instruction or jump instruction:
j label #go to label
Example: if (i!=j) h=i+j;
elseh=i-j;
Another Instruction for Changing Flow
331 Week 3. 12 Fall 2003
Instruction: j label #go to label
Machine Format:
How is the jump destination address specified? As an absolute address formed by
- concatenating the upper 4 bits of the current PC (now PC+4) to the 26-bit address and
- concatenating 00 as the 2 low-order bits
Assembling Jumps
op 26-bit address J format
2 ????
331 Week 3. 13 Fall 2003
Disassembling Jump Destinations to create a 32 bit instruction address that is placed
into the PC prior to the next Fetch cycle
PC
32
32
26
32
00
from the low order 26 bits of the jump instruction
331 Week 3. 14 Fall 2003
Assemble the MIPS machine code (in decimal is fine) for the following code sequence. Assume that the address of the beq instruction is 0x00400020 (hex address)
beq $s0, $s1, Lab1add $s3, $s0, $s1j Lab2
Lab1: sub $s3, $s0, $s1Lab2: ...
Assembling Branches and Jumps
331 Week 3. 15 Fall 2003
Compiling While Loops
Compile the assembly code for the C while loop where i is in $s0, j is in $s1, and k is in $s2
while (i!=k) i=i+j;
331 Week 3. 16 Fall 2003
We have beq, bne, but what about branch-if-less-than?
New instruction:
slt $t0, $s0, $s1 # if $s0 < $s1# then# $t0 = 1
# else # $t0 = 0
Machine format:
2
More Instructions for Making Decisions
op rs rt rd funct
0 16 17 8 0 42 = 0x2a
331 Week 3. 17 Fall 2003
Other Branch Instructions Can use slt, beq, bne, and the fixed value of 0 in
register $zero to create all relative conditions less than blt $s1, $s2, Label
less than or equal to ble $s1, $s2, Label greater than bgt $s1, $s2, Label great than or equal to bge $s1, $s2, Label
As pseudo instructions (get to practice with some of them in HW#2) - recognized (and expanded) by the assembler
The assembler needs a reserved register ($at) there are policy of use conventions for registers
331 Week 3. 18 Fall 2003
Most higher level languages have case or switch statements allowing the code to select one of many alternatives depending on a single value.
Instruction:
jr $t1 #go to address in $t1
Machine format:
2
Another Instruction for Changing Flow
op rs funct
0 9 0 0 0 8 = 0x08
331 Week 3. 19 Fall 2003
Compiling a Case (Switch) Statement
switch (k) { case 0: h=i+j; break; /*k=0*/case 1: h=i+h; break; /*k=1*/case 2: h=i-j; break; /*k=2*/
331 Week 3. 20 Fall 2003
Instructions, so far
Category Instr Op Code Example Meaning
Arithmetic
(R format)
add 0 and 32 add $s1, $s2, $s3 $s1 = $s2 + $s3
subtract 0 and 34 sub $s1, $s2, $s3 $s1 = $s2 - $s3
Data
transfer
(I format)
load word 35 lw $s1, 100($s2) $s1 = Memory($s2+100)
store word 43 sw $s1, 100($s2) Memory($s2+100) = $s1
load byte 32 lb $s1, 101($s2) $s1 = Memory($s2+101)
store byte 40 sb $s1, 101($s2) Memory($s2+101) = $s1
Cond. Branch
br on equal 4 beq $s1, $s2, L if ($s1==$s2) go to L
br on not equal 5 bne $s1, $s2, L if ($s1 !=$s2) go to L
set on less than 0 and 42 slt $s1, $s2, $s3 if ($s2<$s3) $s1=1 else $s1=0
Uncond. Jump
jump 2 j 2500 go to 10000
jump register 0 and 8 jr $t1 go to $t1
jump and link 3 jal 2500 go to 10000; $ra=PC+4
331 Week 3. 21 Fall 2003
Procedures
int leaf_example (int g, int h, int i, int j) {
int f;
f = (g+h) – (i+j);
return f;
}
void main(){
int f;
f = leaf_example(1, 2, 3, 4);
f ++;
}
CALLEE
CALLER
331 Week 3. 22 Fall 2003
Six Steps in Execution of a Procedure
Main routine (caller) places actual parameters in a place where the procedure (callee) can access them
$a0 - $a3: four argument registers
Caller transfers control to the callee
Callee acquires the storage resources needed
Callee performs the desired task
Callee places the result value in a place where the caller can access it
$v0 - $v1: two value registers for result values
Callee returns control to the caller $ra: one return address register to return to the point of
origin
331 Week 3. 23 Fall 2003
MIPS procedure call instruction (caller): jal ProcedureAddress #jump and link
Saves PC+4 in register $ra Jump to address ProcedureAddress
Then (callee) can do procedure return with just
Instruction for Calling a Procedure
jr $ra #return
331 Week 3. 24 Fall 2003
Compiling a Procedureint leaf_example (int g, int h, int i, int j) {
int f;
f = (g+h) – (i+j);
return f;}
331 Week 3. 25 Fall 2003
MIPS Register Convention
Name Register Number
Usage Should preserve on
call?$zero 0 the constant 0 no$v0 - $v1 2-3 returned values no$a0 - $a3 4-7 arguments yes$t0 - $t7 8-15 temporaries no$s0 - $s7 16-23 saved values yes$t8 - $t9 24-25 temporaries no$gp 28 global pointer yes$sp 29 stack pointer yes$fp 30 frame pointer yes$ra 31 return address yes
331 Week 3. 26 Fall 2003
Spilling Registers
Where does the callee save those registers? it uses a stack – a last-in-first-out queue
low addr
high addr
$sp
One of the general registers, $sp, is used to address the stack (which “grows” from high address to low address)
add data onto the stack – push
$sp = $sp – 4 data on stack at new $sp
remove data from the stack – pop
data from stack at $sp $sp = $sp + 4
top of stack
331 Week 3. 27 Fall 2003
MIPS instruction for adding immediate values:
addi $sp, $sp, 4 #$sp = $sp + 4
addi $sp, $sp, -4 #$sp = $sp - 4
Another version of add in which one operand is a constant where the constant is kept inside the instruction itself
MIPS pseudoinstruction for multiplying:
mul $v0, $a0, $v0 #$v0 = $a0 * $v0
We will look at the machine representations for these instructions in the next lecture
A Quick Aside
331 Week 3. 28 Fall 2003
Nested Procedures What happens to return addresses with nested
procedures?
int rt_1 (int i) {if (i == 0) return 0;else return rt_2(i-1); }
caller: jal rt_1next: . . .
rt_1: bne $a0, $zero, to_2add $v0, $zero, $zerojr $ra
to_2: addi $a0, $a0, -1jal rt_2jr $ra
rt_2: . . .
331 Week 3. 29 Fall 2003
Nested Procedures Outcome
caller: jal rt_1next: . . .
rt_1: bne $a0, $zero, to_2add $v0, $zero, $zerojr $ra
to_2: addi $a0, $a0, -1jal rt_2jr $ra
rt_2: . . .
On the call to rt_1, the return address (next in the caller routine) gets stored in $ra. What happens to the value in $ra (when i != 0) when rt_1 makes a call to rt_2?
331 Week 3. 30 Fall 2003
Saving the Return Address Nested procedures (i passed in $a0, return value in $v0)
rt_1: bne $a0, $zero, to_2
add $v0, $zero, $zero
jr $rato_2: addi $sp, $sp, -8
sw $ra, 4($sp)sw $a0, 0($sp)addi $a0, $a0, -1jal rt_2
bk_2: lw $a0, 0($sp)lw $ra, 4($sp)addi $sp, $sp, 8jr $ra
Save the return address (and arguments) on the stack
low addr
high addr
$sp
$ra
old TOS
331 Week 3. 31 Fall 2003
Compiling a Recursive Procedure
Calculating factorial:
int fact (int n) {if (n < 1) return 1;else return (n * fact (n-1)); }
Recursive procedure (one that calls itself!)fact (0) = 1
fact (1) = 1 * 1 = 1
fact (2) = 2 * 1 * 1 = 2
fact (3) = 3 * 2 * 1 * 1 = 6
fact (4) = 4 * 3 * 2 * 1 * 1 = 24
. . .
Assume n is passed in $a0; result returned in $v0
331 Week 3. 32 Fall 2003
Compiling a Recursive Procedure
fact: addi $sp, $sp, -8 #adjust stack pointersw $ra, 4($sp) #save return addresssw $a0, 0($sp) #save argument nslt $t0, $a0, 1 #test for n < 1beq $t0, $zero, L1 #if n >=1, go to L1addi $v0, $zero, 1 #else return 1 in $v0addi $sp, $sp, 8 #adjust stack pointerjr $ra #return to caller
L1: addi $a0, $a0, -1 #n >=1, so decrement njal fact #call fact with (n-1)#this is where fact returns
bk_f: lw $a0, 0($sp) #restore argument nlw $ra, 4($sp) #restore return addressaddi $sp, $sp, 8 #adjust stack pointermul $v0, $a0, $v0 #$v0 = n * fact(n-1)jr $ra #return to caller
331 Week 3. 33 Fall 2003
A Look at the Stack for $a0 = 2
$sp
$ra
$a0
$v0
old TOS
331 Week 3. 34 Fall 2003
Review: MIPS Instructions, so far
Category Instr Op Code Example Meaning
Arithmetic
(R format)
add 0 and 32 add $s1, $s2, $s3 $s1 = $s2 + $s3
subtract 0 and 34 sub $s1, $s2, $s3 $s1 = $s2 - $s3
Data
transfer
(I format)
load word 35 lw $s1, 100($s2) $s1 = Memory($s2+100)
store word 43 sw $s1, 100($s2) Memory($s2+100) = $s1
load byte 32 lb $s1, 101($s2) $s1 = Memory($s2+101)
store byte 40 sb $s1, 101($s2) Memory($s2+101) = $s1
Cond. Branch
br on equal 4 beq $s1, $s2, L if ($s1==$s2) go to L
br on not equal 5 bne $s1, $s2, L if ($s1 !=$s2) go to L
set on less than 0 and 42 slt $s1, $s2, $s3 if ($s2<$s3) $s1=1 else $s1=0
Uncond. Jump
jump 2 j 2500 go to 10000
jump register 0 and 8 jr $t1 go to $t1
jump and link 3 jal 2500 go to 10000; $ra=PC+4