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1 Confidential Proprietary
Application of layers with internal stress for silicon wafer shaping
J. Šik1, R. Lenhard1, D. Lysáček1, M. Lorenc1, V. Maršíková2, R. Hudec3,4
1ON Semiconductor Czech Republic
2Rigaku Innovative Technologies Europe
3Astronomical Institute of the Academy of Sciences of the Czech Republic
4Faculty of Electrical Engineering, Czech Technical University in Prague
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OUTLINE
• Theory
–Radius of curvature and warp
–Thin film stress
• Experiment
–LPCVD Poly-Si Films
–Squared wafer shape
• Multilayer stack design proposal
• Summary & Acknowledgements
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WAFER
R
w
D/2
φ
For small angle φ:
R
Wafer diameter
Warp
Radius of curvature
w
What is the relation between R and w? Assuming wafer shape is close to model.
R
D
RRw
2
)cos(
D
21)cos(
2
Therefore, the Eq. (1) can be rewritten as
(1)
R
Dw
8
2
(2)
RADIUS OF CURVATURE and WARP
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RADIUS OF CURVATURE and WARP
1,0
10,0
100,0
1000,0
10 100 1000
Warp [um]
Rad
ius
of
Cu
rvat
ure
[m
]
100mm
150mm
200mm
Wafer diameter
Wafer diameter [mm]
Warp [um]
R = 10 m R = 2 m
100 120 630
150 280 1400
200 500 2500
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• Thermal expansion
• Intrinsic
- growth
- misfit
- phase transformation
• Extrinsic
- applied stress
- plastic deformation
extthtot int (3)
ORIGIN of THIN FILM STRESS
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THIN FILM
SUBSTRATE
Compressive stress in layer
sf
Due to mismatch of thermal expansion coefficient between substrate ( ) and film ( ), after temperature ramp down a strain ( ) is built in.
s fth
DEPOSITION TEMPERATURE ROOM TEMPERATUREdepT roomT
0th ))(( roomdepsfth TT
THERMAL STRAIN and STRESS
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Biaxial stress in thin film on thick substrate is related with strain:
thth
E
1
(4)
Young’s modulus; Silicon (100) – 1.3·1011 N/m2
Poisson’s ratio; Silicon (100) – 0.28E
Material[1/°C]
Silicon 2,6·10-6
Polysilicon 2,8·10-6
Thermal SiO2 0,35·10-6
PECVD SiO2 2,3·10-6
LPCVD Si3N4 1,6·10-6
Aluminum 25·10-6
Tungsten 4,3·10-6
THERMAL STRAIN and STRESS
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THIN LAYER
w
Young’s modulus ; Silicon (100) – 1.3·1011 N/m2
Poisson’s ratio; Silicon (100) – 0.28
Wafer thickness
Radius of curvature after film depo
Radius of curvature before film depo
WAFER
COMPRESSIVE STRESS in layer
R
Thin film with residual stress on the top of silicon wafer deform wafer according stress value and stress type [S.Timoshenko, J. Opt. Soc. Am., 11, 233 (1925) ] (compressive or tensile)
Therefore the warp is proportional to the residual stress and film thickness and inversely proportional to the wafer thickness squared.
TENSILE STRESS in layerTHIN LAYER
WAFER
f
st
(5)
E
0
2 11
)1(6 RRt
tE
f
sf
R
0R
INTRINSIC THIN FILM STRESS
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Example of residual stress in different depo and thermal growth layers are in tables. Values are just indicative as the intrinsic stress may vary with the process conditions.
Layer Stress[N/m2]
PECVD TEOS 1,8·108
Thermal SiO2 3·108
PECVD Si3N4 5·108
LPCVD Poly Si 2·108 *)
Compressive stress
LayerStress
[N/m2]
APCVD SiO2 2,2·108
LPCVD Si3N4 1·109
Tensile stress
THIN FILM STRESS VALUE
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Heat treatment of poly-Si films can cause the atoms to move to low-energy positions. Poly-Si thickness (THX) is proportional to the depo time, which can impact the stress in poly-Si films.
LPCVD Poly-Si FILMS
Co
mp
ress
ive
stre
ss [
MP
a]
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BACK SIDE LAYER
After depo of poly-Si (THX 1.5 m) and for wafer thickness 507 m the warp 110 m (R = 25.6 m) was achieved.
Wafer deformation map Warp profile perpendicular to the facet
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Circular 150 mm wafer, thickness 378 m, warp 181 m was squared to □ 100 mm. Squared wafer keeps axially symmetrical shape.
WAFER SHAPE
-60 -40 -20 0 20 40 600
20
40
60
80
100
120
140
160
1
2
3
4
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-60 -40 -20 0 20 40 600
20
40
60
80
100
120
140
160
180 measured data spherical R=11.7m
D
evi
atio
n (m
)
Position (mm)
Squared wafer has spherical shape. Deviation from ideal sphere is within 1 m.
WAFER SHAPE
-60 -40 -20 0 20 40 60
-1
0
1 deviation from sphere
Dev
iatio
n (
m)
Position (mm)
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MULTILAYER STACK DESIGN
• To get low R we need to combine layers with high tensile stress on the front side and
compressive stress on the back side.
• All process steps have to keep high surface quality of the polished front side.
Layer with tensile stress
WAFER THX ?
Layer with compressive stress
R < 10m
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LAYER STACK AND WAFER THICKNESS
• For designed stack we can calculate the wafer thickness to achieve expected radius of curvature.
• As we can see in chart the wafer thickness 195 m would be needed for R ~ 2 m.
• That thin wafer is sensitive for handling and also it is affected by gravity sag.
0,0
1,0
2,0
3,0
4,0
5,0
6,0
7,0
100 150 200 250 300 350 400
Wafer THX [um]
R [
m]
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• Impact of thin film stress on wafer shaping has been reviewed.
• Layers with internal stress uniformly shape silicon wafer w/o deterioration of high quality of the polished front side (surface RMS ~ 0.1 nm ).
• Stress in thin film is supposed to be constant regarding to the film thickness, which is valid for most of dielectric thin films used in microelectronics, except of poly silicon.
• Stress in poly silicon layer is reduced with film thickness due to atoms migration into low energy position.
• The circular wafer keeps the original axially symmetrical spherical shape after squaring. The solid area can be build from squared segments.
• Multilayer stack has been designed to decrease the radius of wafer curvature to R ~ 2 m.
• For other than spherical shape photolithography has to be used. Suitable technology is available in semiconductor industry.
• Research was partially supported by Projects MŠMT KONTAKT ME09028 & MŠMT ME0918.
SUMMARY & ACKNOWLEDGEMENTS