Post on 30-May-2018
transcript
8/14/2019 AVR Architecture [Lect-03 Fall09]
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Lecture03
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Memory,Data
AddressSpace,
MemoryTypes,
MemoryAccessProtocol
Buses MemoryMap
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DifferenceBetweenCISC&RISC erence etween on eumann rc tecture arvar
Architecture RegisterSet InstructionSet S U R P R I S E ATMELAVR ATMe a16
Overview NonVolatileandDataMemory PORTS stem Peripheral
Features
PhysicalandOperatingParameters HardwareConfiguration
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RISCvs.CISC TheRISCmachineexecutesinstructionsfasterbecauseitdoesnothavetogo
throughamicrocodeconversionlayer.TheRISCcompilergeneratesmoreinstructionsthantheCISCcompilerforthesameprocessing.Seemicrocode.
CISC APPROACH
MULT 2:3, 5:2
RISC APPROACH
LOAD A, 2:3
LOAD B, 5:2
PROD A, B
STORE 2:3, A
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AvonNeumannarchitecture hason yone usw c suse or ot
datatransfers
and
instruction
fetches,andthereforedatatransfers
scheduled theycannotbe
performed
at
the
same
time.
Harvardarchitecture hasseparatedataandinstructionbusses,allowing
rans ers
o
e
per orme
simultaneouslyonbothbusses.
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Accumulator
DataRegisters AddressRegisters GeneralPurposeRegisters ConstantRegisters FloatingPointRegisters IndexRe isters StackPointer ControlRegisters ProcessorFlags
ResultFlags
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Aninstructionsetisagroupofinstructionsamachine
understands
to
execute.
; Add R1:R0 to R3:R2
AND r2,r3 ; Bitwise and r2 and r3, result in r2
MUL r5,r4 ; Multiply unsigned r5 and r4MOVW r4,r0 ; Copy result back in r5:r4
ADD r2,r0 ; Add low byteADC r3,r1 ; Add with carry high byte
LDI r16,1 ; Set bitmask 0000 0001 in r16AND r2,r16 ; Isolate bit 0 in r2
Loop: inc r22 ; increment r22
...CPI r22,$4F ; Compare r22 to $4f
oop ; Branch if not equal
nop ; Continue (do nothing)
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1. Describe what are addressing Modes and why do we need them?Hint: Register Direct, Register Indirect, Program Counter-Based, Absolute Mode, Immediate Mode
2. Please Memorize the Function of each Register in the Register Setof ATMEGA16? [Register Set is provided in Datasheet of ATMega16]
3. Describe AVR ATMega16 Instruction Set Categorize?Hint: Arithmetic & Logic Unit, Branch Instruction, Data Transfer Instruction, Bit and BIT test Instructions,
MCU Control Instructions [Instruction Set is provided in Datasheet of ATMega16]4. Read Thoroughly ATMEL AVR Architecture Overview
Hint: Reading Material is given, Please put a great attention on Highlighted text
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ReducedInstructionSetComputer
AssemblyLanguageInstructionSet
ATMega16ArchitectureOverview ExternalConnections
ExternalTimeBase
I/OPorts
ProcessorReset
ADC
InterruptSubsystem
MemorySystem
CommunicationSystems
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InsystemProgrammableFlashEEPROM
ByteAddressable
EEPROM
StaticRandomAccessMemory
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Four8bitGeneralPurpose,digitalI/OPorts
Eachporthasthreeregisters
DataRegister[PORTX]=used
towrite
output
data
to
the
port
DataDirectionRegister DDRX=usedtosetaspecificportpintoeitheroutput(1)orinput(0)
InputPin
Address
[PINX]
=
usedtoreadinputdatafromort
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TimeBase
Timing
Subsystem PulseWidthModulationchannels
SerialCommunication SerialUSART
SerialPeri heral
Interface
TwoWireSerialInterface
AnalogtoDigitalConverter
nterrupts
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Packaging
PowerConsumption
SpeedGrades
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