BJT Emitter Stabilized Bias

ELEC 121

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Improved Bias Stability

The addition of RE to the Emitter circuit improves the stability of a transistor output

Stability refers to a bias circuit in which the currents and voltages will remain fairly constant over a wide range of temperatures and transistor forward current gain ()The temperature (TA or ambient temperature) surrounding the transistor circuit is not always constantTherefore, the transistor is not a constant value

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BJT Emitter Bias• Draw Equivalent Input circuit• Draw Equivalent Output circuit• Write necessary KVL and KCL Equations• Determine the Quiescent Operating Point

– Graphical Solution using Loadlines– Perform a Computational Analysis

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Emitter-Stabilized Bias Circuit

Adding an emitter resistor to the circuit between the emitter lead and ground stabilizes the bias circuit over Fixed Bias

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Base-Emitter Loop

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Equivalent Network

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Reflected Input impedance of RE

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Base-Emitter Loop

Applying Kirchoffs voltage law: - VCC + IB RB + VBE +IE RE = 0

Since: IE = ( + 1) IB

We can write: - VCC + IB RB + VBE + ( + 1) IB RE = 0

Grouping terms and solving for IB:

Or we could solve for IE with:

CC BEB

B E

V - VI =

R + (β+1)R

BCC E BE E E

R- V + I + V + I R = 0

( + 1)

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Collector-Emitter Loop

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Collector-Emitter Loop

Applying Kirchoff’s voltage law: - VCC + IC RC + VCE + IE RE = 0

Assuming that IE IC and solving for VCE: VCE = VCC – IC (RC + RE)

If we can not use IE IC the IC = IE and: VCE = VCC – IC (RC + RE)

Solve for VE: VE = IE RE

Solve for VC: VC = VCC - IC RC or

VC = VCE + IE RE

Solve for VB: VB = VCC - IB RB or

VB = VBE + IE RE

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Transistor Saturation

CC CE CSAT

C E

V - VI =

R + R

At saturation, VCE is at a minimum

We will find the value VCEsat = 0.2V

For load line analysis, we use VCE = 0

To solve for ICSAT, use the output KVL equation:

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Load Line Analysis

The load line end points can be calculated:

At cutoff:

At saturation:

C CE CC I = 0 mAV V |

CE

CCC V = 0V

C E

VI =

R + R|

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Emitter Stabilized Bias Circuit Example

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Design of an Emitter Bias CE Amplifier

Where .1VCC VE .2VCC

And .4VCC VC .6VCC

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Emitter Bias with Dual Supply

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Emitter Bias with Dual Supply

Input Output