Chap 02[1]

transcript

Chapter 2: Hardware and Software Architecture

Slides to Accompany

Assembly Language for Intel-Based Computers,

Third Edition

Simplified CPU Design

Data Registers

Address Registers

ControlUnit

ArithmeticLogic Unit

StatusFlags

Address Bus

Data Bus

Memory

Segment

General Purpose

Status and Control

Intel 16-bit Registers

BitPosition

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0x x O D I T S Z x A x P x Cx

= Overflow = Direction = Interrupt = Trap = undefined

= Sign = Zero = Auxiliary Carry = Parity = Carry

Flags Register

Each flag corresponds to a single bit in the Flags register.

16-Bit Register Set(Intel 8086, 8088, 80286)

• Data Registers– AX,BX,CX,DX,AL,AH,BL,BH,CL,CH,DL,DH

• Segment Registers– CS (code), DS (data), SS (stack), ES (extra data)

more...

16-Bit Register Set

• Index Registers– BP (base pointer), SP (stack pointer), SI (source

index), DI (destination index)

• Instruction Pointer (IP)

• Flags Register– Status: (overflow, sign, zero, carry, parity,

aux.carry)

– Control: (direction, interrupt, trap)

Instruction Execution Cycle

• Fetch the next instruction– place in queue– update program counter

• Decode the instruction– perform address translation– fetch operands

• Execute the instruction– perform required operation– store the results in memory and/or registers– update status flags attached to CPU

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Instruction Execution Cycle

I-1 I-2 I-3 I-4

PC Program (RAM)

I-1Instruction

op1op2Data

registers

store the output

decode

execute

32-bit Register Set (Intel386, Intel486, Pentium)

Segment

IndexGeneral Purpose

Status and Control

EFLAGS

31 0BPEBP

(Availible RAM fortransient programs)

Interrupt Vector Table

DOS Data Area

Software BIOS

DOS Kernel, Device Drivers, Etc.

Resident part of COMMAND.COM

Transient part of COMMAND.COM

Video Graphics Buffer

MDA Text Buffer

Color Text Buffer

Reserved

ROM BIOS

(end of address space)

Address

640K RAM

Map of the First Megabyte of PC Memory

Offset(Segment 0400)

Description

0000 - 00070008 – 000F0010 - 001100120013 – 00140015 – 00160017 – 00180019001A – 001B001C – 001D001E – 003D003E – 00480049004A – 004B004C – 004D004E – 004F0050 – 005F0060006100620063 - 0064006500660067 – 006B006C – 0070

Port addresses, COM1 – COM4Port addresses, LPT1 – LPT4Installed hardware listInitialization flagMemory size, in KbytesMemory in I/O channelKeyboard status flagsAlternate key entry storageKeyboard buffer pointer (head)Keyboard buffer pointer (tail)Keyboard typeahead bufferDiskette data areaCurrent video modeNumber of screen columnsRegen buffer length, in bytesRegen buffer starting offsetCursor positions, video pages 1 - 8Cursor end lineCursor start lineCurrently displayed video page numberActive display base addressCRT mode register (MDA, CGA)Register for CGACassette data areaTimer data area

Map of the BIOS Data Area

Segmented Memory Architecture(real mode)

• A segment addresses 64K of memory

• A segment register contains the starting location of a segment– the absolute location of a segment can be

obtained by appending a hexadecimal zero

• An offset is the distance from the beginning of a segment to a particular instruction or variable

Segmented Memory Architecture

Example Using Index Register

Logical address (segment/of f set)

OA16 0005

(unused)

(X 16)

Intel Microprocessor Family

• Intel 8080– 8-bit registers, 8-bit external data path– addresses 64K memory

• Intel 8086– 16-bit registers, 16-bit external data path– addresses 1MB memory– supports real mode

• Intel 8088– identical to 8086, except with 8-bit external

data path

• Intel 8087 coprocessor– executes only floating-point instructions

• Intel 80286– addresses 16MB of memory

– supports real mode and protected mode

• Intel 80287 coprocessor– executes only floating-point instructions

• Intel386 (Intel 80386)– 32-bit registers, 32-bit external data path

– addresses 4GB of memory

– supports real mode, protected mode and virtual mode

• Intel486– parallel instruction execution, modeled after

competing RISC processors

– integrated floating-point unit

– internal 8K high-speed cache

• Intel Pentium (Intel586)– early 90MHz model was at least 90% faster

than Intel486

– superscalar architecture (two instruction pipelines)

– 64-bit internal data path

– 16K internal cache (8K data, 8K code)

• Intel Pentium II– 500 MHz clock speeds

– branch prediction logic

– out-of-order instruction execution

– larger internal cache

Types of Memory

• ROM (read-only memory)– used for BIOS (basic input-output system)

– write-once memory

– EPROM can be erased with ultraviolet light

• Static RAM (random access memory)– may be rewritten unlimited number of times

– requires no refresh signal

• Dynamic RAM– must be refreshed constantly

– cheaper than static RAM

Cache Memory

• Holds the most recently used instructions and data– faster access than conventional memory

• Level-1 cache: Inside the CPU

• Level-2 cache: Connected to the CPU– usually 256K to 1MB

Conventional Memory

• SDRAM – Synchronous Dynamic Random-Access Memory

• Slower than CPU registers and cache memory– limited by the bus cycle speed– travels greater distances– requires freuqent refreshes

Video Memory

• VRAM (video RAM)– located on video controller.

– dual-ported, allowing continuous refresh while writing new data

• WRAM (windows graphics RAM)– optimized for video graphics, better than VRAM

• SGRAM (synchronous graphics RAM)– used on video accelerator cards

– suited to 3D applications

Secondary Storage Devices

• Fixed disk (up to 100GB)

• 1.44MB diskette drive

• 600MB CDROM drive

• Removable disks (magnetic or optical)

• Magnetic tape backup (sequential storage)

Fixed Disk Controllers

• IDE (intelligent drive electronics)– usually two connectors on the motherboard

– each cable supports master and slave drive

• EIDE (enhanced IDE)– supports more than two drives, & CDROM

– originally up to 8GB drives

• SCSI (small computer system interface)– intelligent controller for multiple drives

– for high performance drives

Input-Output Ports

• Serial– sends one bit at a time

– used for telephone modems

• Parallel– sends 8, 16, 32, or 64 bits at a time

– unidirectional or bidirectional

• USB (universal serial bus)– intelligent connector, bidirectional

– supports plug-and-play installation of up to 128 devices (with USB hub)

DEBUG Examples

Experimenting with the Carry, Overflow, Sign, and Zero flags

Essential Status Flags

• Zero– set if the result of the last operation was equal to

• Carry– set if the result of the last unsigned arithmetic

operation generated an invalid value

• Sign– set if the result of the last operation was negative

• Overflow– set if the result of the last signed arithmetic

operation generated an invalid value

DEBUG Flag Mnemonics

• Carry flag: CY=set, NC=clear

• Overflow flag: OV=set, NV=clear

• Sign flag: NG=set, PL=clear

• Zero flag: ZR=set, NZ=clear

Testing the Carry Flag

0100 mov ax,FFFF0103 add ax,1 ; CY, AX=00000106 sub ax,1 ; CY, AX=FFFF

Adding 1 to FFFF sets the Carry flag because the unsigned sum is too large for the 16-bit register. Subtracting 1 from 0000 also sets the Carry flag because the unsigned result cannot be equal to -1.

Testing the Carry Flag

0100 mov ax,23FF0103 add al,1 ; CY, AX=23000106 sub ax,1 ; NC, AX=22FF

Adding 1 to FF in AL sets the Carry flag because the unsigned sum is too large for the 8-bit register. Subtracting 1 from 2300 clears the Carry flag because the result (22FF) is still a valid unsigned integer.

Testing the Overflow Flag

0100 mov ax,FFFF0103 add ax,1 ; NV, AX=00000106 sub ax,1 ; NV, AX=FFFF

Adding 1 to -1 (FFFF) in AX clears the Overflow flag because the signed sum (0) is perfectly valid. Subtracting 1 from 0 clears the Overflow flag because the result (-1) is a valid signed result.

Testing the Sign Flag

0100 mov ax,7FFF0103 add ax,1 ; NG, AX=80000106 sub ax,1 ; PL, AX=7FFF

Adding 1 to 7FFF in AX sets the Sign flag because the sum in AX is negative (the high bit equals 1). Subtracting 1 from 8000 returns AX to a positive value, so the Sign flag is cleared.

Testing the Zero Flag

0100 mov ax,FFFF0103 add ax,1 ; ZR, AX=00000106 add ax,1 ; NZ, AX=0001

Adding 1 to FFFF in AX sets the Zero flag because the sum in AX is 0000. Adding 1 to 0000 clears the Zero flag because the sum (0001) is not equal to Zero.

The End

Chap 02[1]

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