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Sudan Academy of Sciences ( SAS) Atomic Energy Council
Design and building of home made 8051 Microcontroller Emulator
B y Abdc lmonc im Elobeid Hussein
iVI .Sc . in E l e c t r o n i c s E n g i n e e r i n g U n i v e r s i t y o f K h a r t o u m ( 2002)
A Thesis Submitted to the Sudan Academy of Sciences In Fulfi l lment of the Requirements for Doctor of Phi losophy
Degree Ph.D. in Electronics Engineering
Supervisor Dr.Abd Elrasol Gabar Elzobaidi
September 2009
Sudan Academy of Sciences (SAS)
Examinat ion commit tee
External examiner
Internal examiner
Supervisor
Name
Dr. Sid Ahmed Ibrahim
Dr. P'arouk Idris l labbani
Dr. Abdelrasoul Gabar Hlzobaidi
Dedication
ll'or wfwm tfwy tfiougfit we are of their concern
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ABSTRACT
This research targeted design and build of a simple lab made emulator fur the 8051
microcontroller to assist student and researcher in their projects. This will be achieved by
thorough understanding of the software and the hardware of the development tool which
will enliance the user knowledge rather limn considering them as black boxes and
unaware of their capabilities and their limitations.
Regarding the hardware this work preferred to use the same central processing unit the
developer wanted to build with little modification. While the software is a program
loaded in the microcontroller itself responsible (making use of flash microcontrollers) for
communication with the host computer terminal, and monitoring the user program which
is loaded in the external memory by the program.
Any terminal program on the host computer can be used to carry out communication with
monitor program provided that a carriage return should be pressed after monitor power
up to let the monitor adjust its baud rate accordingly. This feature makes the monitor
program so simple and familiar to the user.
For simplicity the software is enhanced with flash programming and erasing subroutine
which can allow the user to store his program there if he put a flash ROM in his hardware
and he can make it as start up program which will run automatically after start up. Also
many programs can be loaded in the flash as long as its capacity is capable Definitely
this requires configuring flash start and end in the source before compiling it. This flash
feature allows the development liardware to be as final board and hence a debugable one
as long us monitor program resides inside the microcontroller.
Considering the debugging stage as the most crucial step in the development cycle, this
work tried to find some suitable and simple solutions that can enhance knowledge. As a
result some commands on the user program like uploading, downloading, displaying,
jumping, selecting among others, running, editing, clearing and communicating with the
host PC can be carried out efficiently. But unfortunately some significant commands on
the user program like tracing, pausing and single stepping were not met.
It is worth mentioning tliat the monitor program is using the serial port for
communication with the host PC, so the user has to be careful not to change any register
iii
involved in serial communication in his program. Also the user program is loaded in the
external memory and the user is required to add some I/O ports if he needs this design as
last setup.
Tracing and single stepping could be accomplished if some host PC emulation program is
developed and this monitor program is modified to carry out more intelligent
communication with the new host PC environment.
iv
ACKNOWLEDGEMENTS
I gratefully acknowledge Coskim HARMANSAH and Mehmel BAYBURT for their advice
and supervision which represents the backbone of this research and so to this thesis. It is a
pleasure to convey my gratitude to them all in my humble acknowledgment.
In the first place 1 would like to record my gratitude to Coskun HARMAN§AH for his
supervision, advice, and guidance from the early stage of this research as well as giving me
extraordinary experiences through out the work. Many thanks go in particular to Serdar
AKDURAK I am much indebted to AKDURAK for his valuable advice in science discussion
and supervision I gratefully thank them for their constructive comments on this thesis.
I would like to thank Pcrihau UNAK and Meral KRAI, for giving me the opportunity to work
on Electronic l.ab equipment in Institute of Nuclear Science in Ege University in Izmir. To
Mehmet Bayburt, thank for his technical assitances during work I had in Izmir.
I would also like to thank M. Muslim SAC; and Onui KAHVECi for their collobration and
their willingness to share their bright thoughts with me, which were very fruitful for shaping
up my ideas and research.
It is a pleasure to express my gratitude wholeheartedly to Siileyman ERKUT, Giingor POLAT
and their family for their kind hospitality during my stay in Izmir. I would like to express
special thanks to Siileyman ERK.UT for his indispensable help dealing with travel funds,
administration and buieaucratic matters during my stay in Izmir.
I cannot end without thanking my family, on whose constant encouragement and love I have
relied throughout my time during this work. Words fail me to express my appreciation to my
wile Sehna whose dedication, love and persistent confidence in me, has taken the load off my
shoulder.
v
Finally, 1 would like to thank everybody who was important to the successful realization of
this thesis, as well as expressing my apology that I could not mention personally one by one. 1
am grateful in every possible way and hope to keep up our collaboration in the future.
vi
Table of contents
Dedication 1
Arabic abstract ii
Abstract tv
Acknowledgement v
Table of contents vii
List of figures xi
List of tables xiii
Abbreviations xiv
Chapter One: Introduction I
1.1 Background I
1.2 Problem statement 2
1.3 Objectives 2
1.4Melhodology / -
1.5 Research outlines 4
Chapter Two: 8051 Microcontroller 6
2.1 8051 Microcontroller Review 6
2.1.1 Why embedded systems 7
2.1.2 Why 8051 microcontroller 7
2.1.3 8051 Important features 8
2.1.4 8051 Programming 9
2.1.5 8051 Related processors 9
2.2 Memory Organization 1°
2.2.1 External Code Memory 11
2.2.2 External RAM Data memory I I
2.2 3 Internal Memory 1 2
2.2.3.1 Register Banks (O0h to IFh) 1 2
2.2.3.2 Bit Addressable RAM (20h to 2F) 1 3
2.2.3.3 General Purpose RAM (30h to 7Fh 1 4
2.2.4 SFR Registers 1 4
vii
2.2.4.1 Program Status Word (PSW) register 1 6
2.2.4.2 Power Control (PCON) register 1 7
2.2.4.3 rimer/Counter Mode Control (TMOD) register 1 8
2.2.4.4 Serial Control (SCON) register 1 9
2.2.4.5 Interrupt Enable (IE) register 2 1
2.2.4 6 Interrupt Priority (IP) register 2 1
2.2.4.7 Timer /Counter 1 Control (TI CON) register 2 2
2.2.4.8 Timer/ Counter2 Control (T2C0N) register 2 3
2.3 8051 Addressing modes 2 5
2.3.1 Direct addressing 2 5
2.3.2 Indirect addressing 2 5
2.3.3 Indexed addressing 2 5
2.3.4 Register instruction 2 5
2.3.5 Register specific instruction 2 5
2.3.6 Immediate constants 2 5
2.4 Circuit I lardwarc 26
Chapter Three: Development Tool 31
3.1 Creating a New Project 32
3.2 Building the Project 37
3.3 Debugging the Project 37
3.4 CPU Simulation 39
Chapter Four: Emulation Concept 40
4.1 Writing Microcontroller Code 40
4.2 Translating the Code 41
4.3 Debugging the Code 41
4.3 I Simulators 4 2
4.3.2 Monitors 4 3
4.3.3 Emulators 4 3
4.3.3.1 Emulation control logic and emulation Memory 4 3
4.3.4.3.2 The emulation device 4 4
4.3.3.3 The pinout adaptor 4 4
viii
4.4 Programming Microcontrollers 45
4 4.1 Out - o f - Circuit Programming 4 5
4.4.2 In System Programming 4 5
4.5 Emulation Technical Approaches 46
4.5.1 Base unit and probecard 4 6
4.5.2 Debug board Module 4 7
4.5.3 Dedicated emulators 4 7
4.5.4 Emulators Using Microcontrollers Flash Memory 4 7
Chapter Five: Debugging Strategies 49
5.1 Integrated Development Environment IDE Simulator 50
5.2 In System Debugging 51
5.3 Software JSD Techniques 51
5.3.1 Terminal Based General - Purpose Monitor 5 1
5.3.2 Terminal Based On-Chip MSC Monitor Program 5 3
5.3.3 IDE-Based Monitor MON51 5 4
5.3.4 IDE-Based Monitor ISD51 5 5
5.4 Hardware ISD Techniques 5 6
5.4.1 In-Circuit Emulator 5 6
5.4.2 Built- In Debug Module (BDM) 5 7
Chapter Six: Software Developed 58
6.1 Monitor Program 58
6.1.1 Initialization parameters and interrupt vectors 6 4
6.1.2 Serial I/O subroutines 6 5
6.1.3 Main menu and monitor user commands 6 6
6.1.4 Memory Management Subroutines 6 8
6.1.5 Power On and Initialization 6 9
6.1.6 Multiplication and Division 7 0
6.1.7 Multi-byte Sequence and Compressed Data Processing 7 0
6.2 Pre-design Stage (Structuring and Modularity) 7 2
6.3 Post-design Stage (Maintenance and Modification) 7 2
6.4 Program Development 77
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6.4.1 Creating the project 7 7
6.4.2 Building the project 8 3
6.4.3 Debugging the project 8 3
Chapter Seven: Results and Discussion 8 5
Chapter Eight: Conclusion and Recommendations 9 1
References 9 3
Appendix A 9 4
x
List of figures
2.1 8051 block diagram 6
2.2 8051 chip using external memory 10
2.3 8051 memory organization 11
2.4 Organization of the 8051 internal memory 14
2.5 Special Function Register layout 15
2.6 Circuit diagram of the 8051 board 28
2.7a Top layer (component side) PCB 29
2.7b Bottom layer (solder side) PCB 29
2.8a Top layout (component side) of the board 30
2.8b Bottom layout (solder side) of the board 30
3.1 Development tool features debugging The Code 32
3.2 Open new project debugging tools 33
3.3 Create a new folder 33
3.4 Select devices for target 34
3.5 Open a new file 35
3.6 Adding file to the project 35
3.7 Selecting file to add to the project 36
3.8 Selecting HEX tile output 36
3.9 Start debugging 38
3.10 Program execution 39
5.1 MSC Debugging Strategies Tree 49
5.2 Block diagram of an IDE simulator Concept 50
5 3 Monitor Conceptual Block Diagram 52
6.1 Parameters initialization 59
6.2 Power on segment 59
6.3 Main menu 60
6.4 a, b Initialization segment How chart 61-62
6.5 asc2hex subroutine 73
6.6 pstr subroutine 74
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6.7 Run routine 75-76-77
6.8 Create new project 78
6.9 Make new folder 79
6.10 Select device 79
6.11 Make new file 80
6.12 Add file to targe 81
6.13 Create hex file window 82
6.14 Building process 83
6.15 Debugging process 84
7.1 Building the project 85
7.2 Testing the project 85
7.3 Running of the Help command of the program 86
7.4 Running the displays to see the internal RAM 86
7.5 Display of the clear command running 87
76 Downloading some program 88
7.7 Running some user program 89
xii
List of tables
2.1 Different 8051 microcontroller produced by Intel
2.2 Special Function Register names, symbols and addresses
2.3 Program Status Word (PSW) bits distribution
2.4 Power Control (PCON) register bits distribution
2.5 Timer/Counter Mode Control(TMOD) register bits distribution
2.6 Serial Control (SCON) register bits distribution
2.7 Interrupt Enable (IE) register bits distribution
2.8 Internipt Priority (IP) register bits distribution
2.9 Timer/counter Control (TCON) register bits distribution
2.10 Tinier/counter2 Control (T2CON) register bits distribution
xiii
Abbreviations
3): Liquid Crystal Display
HE: Integrated Development Environment
5C: Micro System Controller
): In system Debugging
0: Input and Output
uvT: Universal Asynchronous Receiver & Transmitter
',: Micro Controller
»: AG Semiconductors Company
fl>: NXP Semiconductors company
: Semiconductors company
SC 51: Micro System Controllers 1
40S: N channel Metal Oxide Semiconductor
K)S: Complementary Metal Oxide Semiconductors
D: Central Processing Unit
\M: Random Access Memory
DM: Read Only Memory
I: Kilobyte
IZ: Mega Hertz
,abs: Silicon Labs
): lnter-lntegrated Circuit
I: Serial Paralegal Interface
5PR0M. Electrically Erasable Programmable Read Only Memory
KB: Universal Serial Bus
RVM: Pulse Width Modulation
vD: Analog to Digital
rl A: Digital to Analog
iTC: Real Time Clock
plOM: Programmable Read Only Memory
0-R7: RegisterO - Register 7
PROM: Erasable Programmable Read Only Memory
: Data Pointer
xiv
5W: Program Status Word
K: Special Function Registers
>-P3:PortO Port.t
Dc: Accumulator
Stack Pointer
1: Data Pointer Low byte
»H: Data Pointer High byte
: Interrupt Priority Control Register
: Interrupt Enable Control Register
CD: Timer/Counter Counters Mode Control Register
X)N .Timer/Counter Control Register
ICON: Timer /Counter 2 Control Register
10: Timer / Counter 0 I ligh byte
c Timer / Counter 0 Low byte
II: Tinier/Counter 1 High byte
,1: Timer /Counter I Low byte
12 Tinier / Counter 2 High byte
2: Timer / Counter 2 Low byte
2AP2H. Timer2 Capture Register High byte
2AP2L Timer2 Capture Register Low byte
JON: Serial Control Register
W. Serial Data Buffer
JON. Power Control Register
40D: Serial Mode Control Register
rtOD: Timer /Counter Mode Control Register
J: Personal Computer
X)N: Serial Control Register
: Interrupt Enable Register
: Interrupt Priority Register
: Integrated Circuit
EN. Program Strobe finable
AL: Crystal
(CD: Transmitted Data
tD: Received Data
xv
: Printed Circuit Board
C: Hexadecimal
SI: Compiler for 8051 instructions
: Assembler for 8051 instructions
P: One Time Programmable
DII: American Standard Code for Information Interchange
): Programmable Logic Device
F:Zero Insertion Force
: In-System Programming
4: Debug Board Module
KG: Joint Test Action Group for boundary scan
): In-System Debugging
I: Graphical User Interface
[: In -Circuit Emulator
: Built-in Debugger Module
HN51: Monitor program for 8051
: Write
JL: Address Latch Enable
T: Restart
.: Carriage Return
: Line Feed
Carry
C: Escape
: Most Significant Byte
B: Least Significant Byte
xvi
Chapter One
Introduction
Microcontroller-based systems require knowledge in hardware, in
software, and the specific application area. The hardware contains the
microcontroller, some memory (optional) and input/output interfaced with
external circuitry. These building blocks are found in many commercial
applications, for example, main home appliances contain embedded-systems
interfaced with keypad and an LCD screen.
1.1 Background
l)e\elopmenl of microcontroller-based applications code is best
accomplished in a structured fashion. All major subsystems should be first
identified. Program segment and subroutines should be developed and tested for
each major subsystem. Prototyping (he subsystems and thoroughly evaluating
the code for each subsystem usually save time and effort in the long run.
Modularization of the code makes it easier to debug and modify, finally, the
subroutines are combined in the end product. It is worth mentioning that the
development process which is reduced into only four stages (write code, compile
code, debug code and program) is incomplete as it emphasizes on the procedural
stages and neglects the essential pre-design stage (structuring and modularity of
code) and the pro-design stage (maintenance and modification of code). To
explain the idea let us illustrate the development process briefly.
1- Writing code deals with writing the .source program for the application in
assembly or ( ' language. This step is simple if one knows the programming
language and microcontroller's architecture ami it's instruction set.
2- Compiling code deals with converting the source code into executable code
for the microcontroller to execute.
. 1 - Debugging code deals with resolving errors and testing it with realistic input
to see it produces the desired outputs. Single stepping, or tracing through the
code is the optimum method to evaluate the behavior of the code
microscopically
I
•I- Programming is the last slop in which the code is loaded in microcontroller
mentors, or external memory.
1.2 Problem statement
It is very common that in the third stage the programmer discovers
errors and returns hack to the first stage to correct the errors and repeat the
process. Since the third stage is very crucial in the development cycle and
ambiguous, ihis studs is intended to resolve this stage by developing a simple
home-made emulator for 8051 microcontroller to assist in the debugging and
hence the development process. The neglect of the pre-design stage in which the
program is made to be modular, structured and documented makes it impossible
for the program to be maintained or modified later on. This point is important
because debugging is required to make some modification.
1.3 Objectives
This research aims to produce an 8051 emulator to be used by
researchers anil students to:
1- Establish rooted knowledge of emulation technique in development and
troubleshooting.
2- Provide cheap and simple tool for development and troubleshooting.
3- Enhance microcontroller based instrument research and development among
electronics engineers.
1.4 Methodology
The research is planned to be executed as follows:
I - 8051 Microcontroller study (theoretical and practical).
2- I heorelical suivey in the Held of emulation.
3- Real- time debugging techniques.
-I- Software development tool study.
5- Software development (communication, debugging & presentation).
6- Emulator building, testing & verification.
7- Writing the thesis.
I lie microcontroller 8051 was studied. Many experiments were carried out using
assembly language and basic language. Experiments covered using input &
output ports, using the counter/timer, using the serial port, measuring sink &
source current of different pins, measuring the duration of signals ,and
measuring the frequencies of different signal. Investigation on emulation
diflerent approaches was carried using the internet. Traditional emulator
working with two microcontrollers was studied thoroughly so as to avoid
disadvantages in the required design. It worth mentioning that, the research
deviated from what is planned in some regards. For instance, it only considered
the simplicity in achieving emulation and forgets about dedicated hardware for
emulation. Keal lime debugging techniques were investigated because user's
program correction and monitoring is a fundamental job of emulator. Debugging
strategies were studied also, and terminal monitor option was selected for this
research making use Hash microcontroller features. pvision development
platform was studied thoroughly, and all the features and capabilities of the tool
were investigated regarding project creation, simulation and testing. Many
experiment were made using the simulator which simulator all 8051
microcontroller capabilities. Particularly all sections of the software developed
were tested using this tool Software developed started with a general terminal
program running the host PC to communicate with the emulator. Later serial &
parallel communication program with the host PC was fetched and studied
thoroughly. Further more a monitor program managing emulation commands
was investigated and studied in details. This program used command recognizer
which calls lower orders programs called command routines. It worth
mentioning that some monitor programs found in the internet were studied for
comparison. Using uvision simulator the whole program was checked. In the
hardware the research used special design board, which preformed the target
CPU. 'Ihen the program was compiled and loaded in the microcontroller for
testing & verification and showed excellent results.
3
1.5 Research outline
Beyond this preamble this chapter reviews different chapters of this
thesis. Chapter 2 reviews the hardware used in the development process. It firstly
presents some information about the 8051 microcontroller regarding it 's block
diagram, memory organization and the special function register. The use of
special function registers in the software to implement serial communication
with host l '( ' is of is of prime importance, so it is explained in this chapter,
lastly the electronic card used to test the overall code performance in the real
lime is presented. In chapter 3 Kcil development tool for the 8051
microcontroller family is reviewed. It supports every level of developer form
professional application engineer to a student just learning about embedded
system software development. It includes C Compiler, Macro Assembler,
Debugger, a Ilex Converter. Real Time Kernel, Linker and some Monitors
programs all under one Integrated Development Environment (IDE). In the
debugger mode the user may use the Simulator which support simulating all
features of the 8051 without actually having any target hardware. This feature is
used very much for testing all subroutines. The only drawback of the simulator
is running not within real time framework. Chapter 4 discusses the Emulation
Principles. It starts with the practical development cycle stages and the tools
used in the development process. It elaborates on debugging and emulation
concept. Then it gives a quick review on emulation techniques. Then it
concentrates on emulation techniques with monitor program enhanced after
development of On-Chip Debugging facilities and Hash memory. In chapter 5,
the modern debugging strategies of Micro Systems Controller (MSC) are
reviewed. These strategies range from simulation-based to In System Debugging
(ISD). categorized as software and hardware strategies. Chapter 6 of this thesis
deals with the Software developed. It shows a general flowchart of the program.
I lien it gives a short description for all its subroutines under some headings like,
initialization parameters and interrupt vectors, serial I/O subroutines, menu and
monitor commands, memory management subroutines, power on and
initialization subroutines, multiplication and division subroutines, multi-byte
sequence and compressed data processing subroutines. Also it touches program
modularity and maintainability. Also in this chapter, the steps of creating the
4
project, building it and finally testing the whole program together, using Keil
development tool, is reviewed. In the appendix the source program is given. In
chapter 7 results obtained using the programs were reviewed after project
building. It is first tested using the development tool for different commands like
help command and display internal RAM command. Also testing using the
hyper-terminal were manifested after loading the IIF.X llle in the real
microcontroller. Chapter 8 discusses the conclusion obtained and points out
some recommendations for future work.
5
Chapter Two
8051 Microcontroller
This chapter gives a brief overview of the hardware used. It first
reviews the 8051 microcontroller (uC) block diagram, the memory organization
and elaborate a little bit on the special function registers, specially those used in
interrupts and the serial communication. This is because their relevant
peripherals are used in the process of emulation. Other peripheral and their
associated special function registers, like I/O ports are left to user to use them as
he likes. At the end this chapter will review the electronic circuit used to test the
software developed.
2.1 8051 Microcontroller review
The 8051 is an 8-bit microcontroller originally developed by Intel.
I here are currently hundreds of derivatives produced by dozens of chip
nianufacturcrs.8051 family is widely used today for embedded control
applications. The 8051 is an 8-bit micro-controller. The basic 8051 chip includes
a number of peripheral I/O devices including two (or three)Timer / Counters, 8-
bit I/O ports, and a 11 ART as shown in figure 2.1 block diagram [9].
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t 1
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if if i n r , t
I ' igurc2.l 805 1 hlock diagram
6
2.1.1 Why embedded systems
Imhcdded microcontrollers tire used extensively in robotics and
industry. In this application, many specific tasks might be distributed among a
large number of controllers in one system. Communications between each
controller and a central would enable in format ion to be processed by the central
computer, or to be passed around to other controllers in the system. A special
application that microcontrollers arc well suited for is data logging. Stick one of
these chips out in the middle of a corn Held or up in a balloons, and monitor and
record environmental parameters (temperature, humidity, rain. etc). Small size,
low power consumption, and flexibility make these devices ideal for unattended
data monitoring and recording. The automotive market is the most important
driving force in the microcontroller market. Several microcontroller families
were developed specifically for automotive applications and were subsequently
modified to serve other embedded applications 118).
2.1.2 Why 8051 microcontroller
The Intel 8051 is a Harvard architecture, single chip microcontroller
(pC) which was developed by Intel in 1980 for use in embedded systems. Intel's
original versions were popular in the 1980s and early 1990s, but has today
largely been superseded by a vast range of faster and/or functionally enhanced
8051-compatible devices manufactured by more than 20 independent
manufacturers including Atmel, Infineon Technologies (formerly Siemens AG),
Maxim Integrated Products (via its Dallas Semiconductor subsidiary), NXP
(formerly Philips Semiconductor). Nuvoton (formerly Winbond), ST
Microelectronics, Silicon Laboratories (formerly Cygnal), Texas Instruments and
Cypress Semiconductor. Intel's official designation for the 8051 family of uCs is
MCS. 51 11 *>|. Intel's original 8051 family was developed using NMOS
technology, but later versions, identified by a letter "C" in their name, e.g.
80C5I. used CMOS technology and were less power-hungry than their NMOS
predecessors - this made them eminently more suitable for battery-powered
devices.
7
2.1.3 8051 Important features
It provides many Functions (CPU, RAM, ROM, l/O, interrupt logic,
timer, etc.) in a single package.
8-bit data bus - It can access 8 bits of data in one operation (hence it is an 8-bit
microcontroller).
16-bit address bus - It can access 2 I ( > memory locations - 64 kB each of RAM
and ROM.
On-chip RAM - 128 bytes ("Data Memory").
On-chip ROM - -I kB ("Program Memory").
Four byte bi-directional input/output port.
UART (serial port).
Two 16-bit Counter/timers.
I wo-level interrupt priority.
Power saving mode.
A particularly useful feature of the 8051 core is the inclusion of a boolean
processing engine which allows bit-level Boolean logic operations to be carried
out directly and efficiently on internal registers and RAM. This feature helped to
cement the 8051's popularity in industrial control applications. Another valued
feature is that it has four separate register sets, which can be used to greatly
reduce interrupt latency compared to the more common method of storing
interrupt context on a slack | 8 | . The 8051 UARTs make it simple to use the chip
as a serial communications interface. External pins can be configured to connect
to internal shift registers in a variety of ways, and the internal timers can also be
used, allowing serial communications in a number of modes, both synchronous
and asynchronous. Some modes allow communications with no external
components. Once a UART - and a timer, if necessary, have been configured, the
programmer needs only to write a simple interrupt routine to refill the 'send' shift
register whenever the last bit is shifted out by the UART and/or empty the full
'receive' shift register (copy the data somewhere else). The main program then
perforins serial reads and writes simply by reading and writing 8-bit data to
8
slacks. 8051 based microcontrollers typically include one or two UARTs, two or
three timers, 128 or 256 bytes of internal data RAM (16 bytes of which are
bit-addressable), up to 128 bytes of I/O, 512 bytes to 64 kB of internal program
memory, and sometimes a quantity of extended data RAM (F.RAM) located in
the external data space. The original 8051 core ran at 12 clock cycles per
machine cycle, with most instructions executing in one or two machine cycles.
With a 12 Mil/, clock frequency, the 8051 could thus execute I million one-
cycle instructions per second or 500.000 two-cycle instructions per second.
Enhanced 8051 cores are now commonly used which run at six, four, two, or
even one clock per machine cycle, and have clock frequencies of up to 100
MHz, and are thus capable of an even greater number of instructions per second.
All Sil.abs. some Dallas and a few Atmel devices have single cycle cores.
Common features included in modern 8051 based microcontrollers include built-
in reset timers with brown-out detection, on-chip oscillators, self-programmable
flash ROM program memory, boot-loader code in ROM, EEPROM non-volatile
data storage, l-C, SPI. and USB host interfaces, PWM generators, analog
comparators, A/D and D/A converters, R'I'Cs, extra counters and timers, in-
circuit debugging facilities, more interrupt sources, and extra power saving
modes | 8 | .
2.1.4 8051 Programming
Several ( ' compilers are available for the 8051, most of which feature
extensions that allow the programmer to specify where each variable should be
stored in its six types of memory, and provide access to 8051 specific hardware
features such as the multiple register banks and bit manipulation instructions.
Other high level languages such as forth, BASIC, Pascal/Object Pascal, PL/M
and Modula 2 are available for the 8051, but they are less widely used than C
and assembly.
2.1.5 8051 Related processors
'I'he 8031 was a cut down version of the original Intel 8051 that did
not contain any internal program memory (ROM). To use this chip external
ROM is to be added that will contain the program that the 8031 will fetch
9
and execute. Hie 8052 was an enhanced version of the original Intel 8051 that
featured 256 bytes of internal RAM instead of 128 bytes, 8 kB of ROM instead
of 4 kB, and a third 16-bit tinier. The 8032 had these same features except for
the internal ROM program memory. The 8052 and 8032 are largely considered
to be obsolete because these features and more are included in nearly all modern
8051 based microcontrollers.
2.2 Memory Organization
The 8051 device has separate address spaces for program and
data memory. I here are separate memories for program storage, internal
memory, registers, I/O functions, and external data memory. They each hold up
to 64 kilobytes of instructions and data respectively. Its memory is organized in
Intes and practically all its instruction deal with byte quantities. The logical
separation of program and data memory allows the data memory to be accessed
by 8-bit addresses, which can be quickly stored and manipulated by an 8-bit
CPU. Nevertheless, 16-bit data memory addresses can also be generated through
the Data Pointer (DPI R) register, figure 2.2 shows the external code memory
and data memory connected to the 8051 chip |4J.
A D D R E S S B U S (16 bit)
8051
K/*4
•< > ( x l . ' l l i . i l E x t e n t . ) !
IIA1 A C O D E Ma.- l i loly M o m m y
( K A M I ( R O M )
Control tin**
DATA B U S <0-biO
l/i i Moil, HII Vi
I igure 2.2 805 1 chip using external memory
I he 8051 has three very general types of memory. To effectively program the
8051 it is necessary to have a basic understanding of these memory types. They
are: External Code Memory, External RAM and On-Chip Memory (internal
memory), 8051 memory organization is mapped in figure 2.3.
10
T N T External
8051 chip DATA Memory
Internal 0000 (up to 64KB)
Memory
Internal SI Ks FEFF External
COOK Internal RAM
Memory (up to
0000 64KB) 0000 64KB)
I igure 2.3 8051 memory organization
2.2.1 External Code Memory
The executable program code is stored in external code memory. This
is often in the Ibrm of an external EPROM. The code memory size is limited to
6-IKBytcs in a standard 8051. The code memory is read-only in normal
operation and is programmed under special conditions e.g. it is a PROM or a
flash RAM type of memory.
2.2.2 External RAM Data Memory
External RAM is memory that resides off-chip and often in the form
of static RAM or Hash RAM. This is read-write memory and is available for
storage of data. Up to 64KBytes of external RAM data memory is supported (in
a standard 8051). Hie External Data Memory space contains all the variables,
buffers and data structures that can't lit on-chip. It is principally addressed by
the 16-bit Data Pointer (DPI R), although the first two general purpose register
(R0. Rl) of the currently selected register bank can access a 256-byte bank of
External Data Memory. The maximum size of the External Data Memory space
is 64Kbytes. External data memory can only be accessed using the indirect
addressing mode with the DP'f'R, R0 or R l .
11
2.2.3 Ink-null Memory
litis refers lo any memory thai physically exists on the
microcontroller itself. The 8051's on-chip memory is mapped in Figure 2.4
below. 'Ihe internal memory is shown divided into three blocks, which are
generally referred to as the Lower 128, the Upper 128, and SFR [10]. The
maximum size of the Internal Data Memory space is 256-byles. However,
different 8051 family members integrate different amounts of on-chip memory
as shown in fable 2.1 below. The register implicit, indirect and direct addressing
modes can be used in different parts of the Internal Data Memory space. The
Internal Data Memory space is functionally the most important data memory
space. In it resides up to four banks of general purpose registers, the program
stack. 128 bits of the 256-bit memory, and all the variables and data structures
that are operated on directly by the program.
Lower 12S hyh'.s: OOh to t I'll Register Banks
20h lo 2Fh Bit Addressable RAM
30h to 7Fh General Purpose RAM
Upper /2 .V/m 'A'v . XOh to Fill Special Function Registers
Table 2.1 Different 8051 microcontroller produced by Intel
Device Internal Program Memory
tetital Data
Memory
Timer/Counters
(16-bit)
Interrupt
Sources
Oscillator
squency (MHz)
W5IAII -IK bytes ROM 128 2 5 3 .5 -12
0C51IJI1 •IK bytes ROM 128 2 5 0.5 - 24
87C5I •IK bytes HI'KOM 128 2 5 0 .5-24
U'5II A 8K bytes ROM 25<» •» .i 7 0.5 - 33
80C58 32K bytes ROM 256 3 6 0.5 33
2.2.3.1 Register Banks (OOli to I Mi)
I he lowest 32 bytes are grouped into 4 banks of 8 registers. The 8051
uses 8 general-purpose registers RO through R7. When the instruction is
12
executed, one of the eight registers in the selected bank is accessed. Program
instructions call out these registers as RO through R7. Two bits in the Program
Status Word (PSW) select which register bank is in use. This allows more
efficient use of code space, since register instructions are shorter than
instructions that use direct addressing | I 0 | . All of the bytes in the Lower 128
bytes can be accessed by either direct or indirect addressing. The Upper 128
bytes can only be accessed by indirect addressing.
2.2J.2 Bit Addressable RAM (20h to 2Mi)
The 8051 supports a special feature which allows access to bit
variables. Ihis is where individual memory bits in Internal RAM can be set or
cleared. In all there are 128 bits numbered OOh to 7Ph. Being bit variables any
one variable can have a value 0 or I. A bit variable can be set with a command
such as SH IB and cleared with a command such as CLR. for instance:
Sli I'B I5h : sets the bit I5h (becomes I)
( 7/v' /5// ; clears bit 15h (becomes 0)
fhe bit addressing can also be performed on some of the SIR registers, which
will be discussed later on. The Bit Memory space is used for storing bit variables
and Hags. Hits can only be accessed using the bit instructions and the direct
addressing mode.
1.1
AM ' : • l i - l>> I... i:
"Ft,
:•. '1;
General i.»u:po>e RANIaie.,.
t>0 byte-.
— — —
: - n i . — . . . . —
y~L 60 ~. p
:-au •• ~ 50 . . . . . . 4.J
12 ' - :o J L .
C'O IFK 0 - .BiiO. 1 .
'.i<.: 0 " : B 1 :
:.:FI. F' - r * 0 " .B.uJ. 1 .
•;:Z -••= = - 0 " B.-ul. 0
«0
. t s CD
I U I E I U . I L
S F R -
Iutrl l l . l l R A M
Register Baulk 0
?«E " Mil R*f « 05k R«r 5 04b 3 e g 4 Oih Re? i a:n Reg I . r .h Reg I OOh 0
l-iuniv 2.-t Oruuni/ation of ihe 8051 ink-mal memorv
2.2.3.3 General Purpose RAM (30h lo 7Fh)
80 Intes oi'lntemal RAM memory are available for general-purpose
data storage. Access to this area of memory is fast compared to access to the
main memory and special instructions with single byte operands are used. The
general purpose RAM can be accessed using by direct or indirect addressing
modes.
2.2.4 SFR Registers
The SI R registers are located within the Internal Memory in the
address range 80h to I'l'h, as shown in figure 2.5 below. Not all locations within
this range are defined. Each SIR has a very spec i lie function. S IRs include the N
Port latches, timers, peripheral controls, etc. These registers can only be accessed
by direct addressing. Sixteen addresses in SFR space are both byte- and bit-
addressable. The Special Function Register space contains all the on-chip
peripheral I/O registers as well as particular registers that need program access.
These registers include the Slack Pointer, the PSW and the Accumulator.
S.-OI i
t o n K . . - . 0
r\cgi'..:ei-fv>.3p|>eJ P o n s
•iailicj^ea tlicrt en;: in OH •> 311
P o / t P i n s .£OC'.m''.|:cltC<r
;ctc.i
figure 2.5 Special lunction Register layout
The standard SOS I has four 8 bit I/O ports: PO, PI, P2 and P3. All four ports in
the 80C5I are bidirectional. I'aeh consists of a latch (Special Function Registers
PO through P3), an output ilriver. and an input buffer. The output drivers of Ports
0 and 2, and the input buffers of Port I), are used in accesses to external memory.
In such application. Port 0 outputs the low byte of the external memory address,
lime-multiplexed with the h u e being written or read, while Port 2 outputs the
high byte of the external memory address when the address is 16 bits wide.
Otherwise, the Port 2 pins continue to emit the P2 SFR content. All the Port 3
pins are multifunctional. They are not only port pins, but also serve the functions
of various special features. I.isl of all special function registers and their
addresses is shown in fable 2.2 below
15
table 2.2 Special I unction Register Nantes. symbols and addresses
Ace.. .
1*S\\ '
SI'
L>!T1< ....
... !>i'!.-...
i>!'H
_ . H !
. . _.!'J_
_ i ' 2
... "I".. .
... !l: !M<!>.
\2( ON
. ! ! !"
... i ' l ' . . . .
J U !
. . 1 1 1
I! !.2
!L? .._
J « A I ' ? ! !
. K(.'A!'?.L SCON
._ siuJ!:....
.-mm.....
. _ _ . . . . . _
AeeuniulatDL
^register
l'«'M'!!!!' -iW."A \V«»rd ....
.^Ki'oi ' iKr ... ..
.. . . !>J«a.lK>!!««.l2l?iJ«a_
.!,"": H\'c... _.
... ._..JiiKhHytc . _
\*m _.
... ! • !« ! ._ ._ _
l jili—.1?—
» _
<JL)»U.....
» ! ! •_ . .
.JSb._
-_V«iL
a oJl
M .
i i i r a H .L'rJyrti' VsmM.
JnitrryiH <•:!»!>!?!«. *i!!U!(>L !'ii!UT'(;oiinter Mode (JojilroL .
' '!'.">•'.'. *VlJ»'V*< .L**.»ll!l.,>i
Tlnwr/«'«'yv!'2i.:«,.«iL':».>!
| W t j ^ r < i m B ! i » > i t t .
!'i»»sr/r^iM!.»y!.L«i
li HeT/0>U.»M].].•^»!iiiliiV:•.... .n!nsr^»J!s?ji ij |hBj!c_.
C2 Capture UegJI ig j . L»YJe .
[Li'2 CL'Wuic Reg. J a w I»vie„
...... JJsda!.OS>ir«l ... ^naLOalaJJulTcr
_. J ' ^ e r C o n l r o l _
M l
_ a « l _ _
.m.
m..
i:A!>.
l?! l ._
2.2.4.1 Program Status Word (PSW) register
The Program Status Wort! (PSW) register configures register banks and user
defined Hag. fable 2.3 below shows bits distribution in the bit addressable
register PSW 11()|.
16
I able 2.1 Program Stains Word (PSW) bits distribution
l'SW7 I'SWl) PSW5 PSW-4 PSW.? PSW2 PSWI PSWU
CY AC It) RSI RSO OV - p
etpi psw inil, 0 ;value/br/>sw (which re}> bank to use)
IIIOV psw, ///».vir /'///'/ initialize program stains word
The first line initializes psw inil variuhle by zero while (ho second line
configures PSW by zero making all Hags disabled, and selecting register bank
/ero by making register bank selectors (RSO and RSI) zero.
selh psw. 5 ;sel /lag sinee there is display
jnb psw.5, pintl6h ;olherwise jump if no previous
display
Here PSW.5 (10 llagt) available lor user) is used to signal previous letter display
to continue displaying small characters. It has to be stated that PSW.5 (user
defined (lag) is used several time for different tasks.
2.2.4.2 Power ('ontrol (PCON) register
The Power Control (PCON) register configures power consumption
mode of the chip whether it is IDLE or in POWER DOWN mode, fable 2.4
below shows different bits distribution in the non bit addressable register PCON
| I0 | .
table 2.1 Power < 'onirol (PCON) register bits distribution
P( C)N7 ('()N() ( 'ON5 ( ()NI CON? CON2 ('ON 1 CONO
SMOI) - - - ( i l l CIO PI) 11)1.
IIIOV /Htm, IMxtSO ;coiifi}>iire peon for fast baud (doubled)
17
II is clear Ilial power saving mode is not enabled and only SMOD is enabled
which impl} baud rale doubling. Power saving is enabled when battery powered
electronic circuits is implemented lor example in data loggers when used in
remote areas.
2.2.4.3 Timer/Counter Mode Control (TMOD) register
The 80C51 has two 16-bit Timer/Counter registers. timcrO and
timer I. Doth can be configured to operate either as timers or event counters. This
is defined by Timer/Counter Mode Control TMOI.) special function register. In
this program timerO and timer I are used lo measure the baud-rate of the host PC
to start communication with the PC. After measuring the baud-rate and
calculating the baud-constant using the following equation
band const 256 - (crystal (12 * 16 * baud-rale))
Timer/Counter Low Byte (II .) and Timer/Counter High Byte (I'll) are loaded
with the baud-constant calculated to establish automatic reloading 110|.
<•//• a .clear A
IIIOV till, a .clear timer!) low byte
IIIOV tht). a .clear limerO high byte
mov ill. a .clear timer I low byte
IIIOV l/il. a ;clear timerl high byte
The upper five lines initialize 1'1.0,'f 110. II. I and II11 with zeros to start
measuring the baud rale for example.
IIIOV a. ill) .•move tiinerO low byte to A
IIIOV rl). a .move A content lo rO
IIIOV a. l/iO ;movc limerO high byte to A
IIHIV rl. a ;move A content to rl
The upper four lines load (he measurement result into rO and r l .
IIIOV till, a ;move the reload value to till
18
mov ill. a ;mo\e the reload value to til
The tipper two lines reload time I with some value to start counting down.
The Timer/Counter Mode Control register (TMOD) configures timer/counter.
Table 2.5 below shows bits distribution in the non bit addressable register
TMOI).
I able 2.5 Timer/Counter Mode ( onlrol( I'MOD) register bits distribution
TMOD7 "MOIM) MOD5 MODI 1 MOD'S MO 1)2 MODI I'fvfODO
G A T I : ( 7 ! Ml Ml) l i .V l i : ( 7 T Ml MO
Timer//1 Timei7/()
IIIOV tinod. Ii0x2l .set timer III for H hit auto-reload and
limeiilOJiir 10 hit auto reload mode
2.2.4.4 Serial Control (SCON) register
The Serial Control (SCON) register configures the serial port. Table
2.6 below shows the different bits distribution in the bit addressable register
SCON 110|.
I'able(2.6) Serial Control (SCON) register bits distribution
SCON 7 SCON<> SCON5 iC< )N4 SCON.3 CON2 SCONI JCONO
SMO SMI SM2 Kl-N i n s RH8 II Rl
Our program configure the SCON twice, once at the begining of autohaud
subroutine.
mov scon, 110x42 -.configure scon for Shit var-baud,
receive disabled
fhe second at the end of autohaud subroutine to set the new baud-rate
Mov scon. 110x52 .configure serial port control
Now REN is enabled for receiving data through the serial port
cin: jnh ri. cin :loop if receive interrupt flag not set
clr ri ;clear receive interrupt flag
I1)
In the first line the program loop until receive interrupt is high; when it is high, it
clear it in the second line and continue cin subroutine processing.
coul: jnb //', caul .display it
clr ti .clear transmit interrupt
In the first line the program loop until receive interrupt is high; when it is high, it
clear it in the second line and continue coul subroutine processing. The serial
port receive and transmit registers both access the serial buffer SBUF. Writing to
SBUF loads the transmit register, and reading SBUF accesses a physically
separate receive register.
cin: jnb ri. cin .loop if receive interrupt flag not set
clr ri .clear receive interrupt flag
mov a. sbuf .put serial buffer into A
ret .return
In cin subroutine sbujcontent (which is coming from the serial port) is moved to
A for further processing.
coiit: jnb ti. cout .display it
clr ti .clear transmit interrupt
mov shut, a :put A into serial buffer lo send
ret .return
while in cout subroutine A content is moved to sbufio be sent by the serial
port.
It has to be stated that the program developed has very limited use of special
function register and only when very necessary so as to spare them for the user
program developed by the developer. Also the register used should not be
modified in the user program to avoid eon diet. This means the baud rate
specified should he kept. The resources used for example like the serial port
should not be used by the developer as it is specified for communication with the
host PC at a certain baud rate.
20
2.2.4.5 Interrupt Enable (IE) register
The 80C51 provides 6 interrupt sources as follows:.
External interruptO (IE0)
External interrupl (IEI)
TimerO overflow interrupt (TEO)
Timer I overflow interrupt (TF1)
Timer2 overflow interrupt (TE2)
Serial port interrupts (Rl or TI)
These interrupt are enabled by the bit addressable. Interrupt Enable (IE) register
as shown in Table 2.7 below [10].
Table 2.7 Interrupt Enable (IK) register bits distribution
IE bit No. IB7 11-6 11-5 II-4
Interrupt Name - - n ; 2 Rl or T
Enable Signal KA - KT2 l-S
113
TP I
i : i i
1122
ii: i
I :XI
ii:i
n o
irro
*EA= Enable All
** All bits arc set by the programmer.
clr a .clear A
mov ie, a ;reset interrupt enable register
The above two lines disable all the interrupts by putting zeros in all IE bits
2.2.4.6 Interrupt Priority (IP) register
All interrupts are internally prioritized as follows INTO. TEO, IN'I'I,
TF1 and lastly the serial port interrupt (Rl or TI). But any interrupt source can be
individually programmed to one of two priority levels to achcivc some kind of
flexibility. These interrupt are prioritized by the bit addressable Interrupt Priority
(IP) register as shown in Table 2.8 below [10].
IKO
•:xo
21
table 2.S Interrupt I'rioiilv (II') register bils distribution
II' bit No. 11*7 Il'o Il'5 ii'-i IIM ll'2 IIM 11*0
IciTiipls hit name 1-2 priority K lor II 1 priority 1:1 priority 10 priority ;() priority
- -enable
>ril) enable enable enable enable enable
IlilsMllllol - - t* r> I'S I ' l l l»XI HX) l'XO
Since all interrupts are already prioritized by hardware as mentioned above,
there might be no need for making some priority changes by software.
clr a :clear A
niov //>, a ;re\cl interrupt priority register
The above two lines enable the hardware priority as they clear all IP bits
2.2.4.7 Timci7( 'ounterl Control (IX O N ) register
The External Interrupts INTO and IN'l'l (1F.0 and WW) can each be
either level-activated or edge-activated, depending on bits I TO and I'll in
register ICON. The Hags that actually generate these interrupts are bits IF.O and
1H1 in ICON. When an external interrupt is generated, the llag that generated it
is cleared by the hardware when the service routine is vectored. TimerO and
timer 1 overflow interrupt (I TO and IT I) are both activated by run bit-command
TRO and IR1 in register I'CON. The flags that are generated are bits TFO and
IT I in register ICON |10| . These interrupt are enabled by bit addressable
Interrupt Finable (III) register as shown in fable 2.9 below.
I able 12.')) I iniei i-uunler ( ontiol t I ( 'ON) register bits distribution
'let>N hit No. ICON7 ()N(> ICON5 K'ON-l ICON? ICON2 'I'CON 1 TCON0
InliTiiipls bit I I I IT inn ITU 1II) run II. 1 flag 11:1 edge or 11:0 flag 1:0 edge or
inline Overflow Dill overflow emit level level
Hap llag triggered riggered
Hit S M I I I X I I I I I I K I 1 ID IKI) II 1 III MO 110
* Kun command signals arc enabled by programmer (software)
* Edge or level signals are determined by programmer (software)
* Overflow flags are set by hardware when there is overflow and is cleared by
hardware when interrupt service starts.
* Edge flags arc set by hardware when there is interrupt and is cleared by
hardware when interrupt service starts.
Our program for example command timer I to start timing by the following line
when it is measuring baud rate
setb //•/ ;now we're timing it
It also cheeks whether timer I ovelllows by the following line
aulob2c:jb If I, auiobl :clieek for timeout while waiting
It starts limerO at a certain condition by the following line
vi7/> trO .start liming last -I bits
It stops limerO for some reason by the following instruction
• I : ! i i • ; I o p t. i i ih.- 1 0
2.2.4.8 Tiinoi7('ounter2 Control (T2CON) register
Timer/eounler2 is not available in all 8051 microcontrollers
particularly old ones. It is found in 8052 chips. It offers a third timer/counter
beside timer/counterO and timer/counter I. All timer2 configuration bits are
within T2CON register as shown in fable 2.10 below 110| .
I able 2.10 rimcr.Vuimter2 Control ( I 2CON) register bits distribution
h ' o n t)ii n . i l.'l O N 7 i ; r o N i . I J l ' O N > .H O N I 21'«)N2 JMONI T2CONO
I'll lumie 1 line i \ i i la.' < Koeeiu - ll.ilr.nill 1 xt l la j ' Slail oi ('oimlci l ine i» reload
m e i l l n u
llas>
CIJ-ll lIC Ol
Iclil.hl)
rliK-k eloek eiialilo
stop HI Inner lliif.
till h>nilnil II -J 1 X 1 2 I U I K ICI K .XI N2 TR2 iv r C1VKI.
Reside timer2 configuration 12CON contains other bits as follows
23
*<P/RI. bil determine capturing time of a certain event triggering timcr2 input
(12) or reloading a counter by a certain value when counter input (T2) is
triggered.
*EXEN2 bit determine capturing or reloading occurs by a signal at timer
external input (I'2MX).
* I ( I K bit determine serial transmission clock (whether timer I or Iimer2).
*R('I.K bit determine serial receiving clock (whether timer I or timer2).
*l XI 2 bit determine whether capturing or reloading is due to T2 or T2EX.
It has to be mentioned that the program developed used timcrO and timer I
overflow interrupts lo measure the host computer baud rate during jiowcron
subroutine only. Also it uses serial port interrupt during communication with the
host, lo use any of the interrupts in the 80C5I family, (he following steps must
be considered.
1. Set the I-A (enable all) bit in the Hi register to I.
2. Set the corresponding individual interrupt enable bil (EXO, 1:10. EX I, ET1,
l-S and li I 2) in the Hi register to I.
3. f inter overflow interrupt ( l i t ) , I I I and 11'2) have to be started by bits in
IXX >N (TRO and IRI ) and T2CON (TR2) while serial port interrupt (RI or Ti)
and external interrupt (Hit) and Hi I) do not need starting.
4. External interrupt (110 and IE I) have to defined whether they arc edge
triggered or level triggered within ICON by bits (110 and f f l ) .
5. Begin the interrupt service routine at the corresponding vector address of that
interrupt.
6. Serial port interrupt Hags (Rl or TI) has lo be cleared (bits in SCON) by
software after the transmit or receive operation, while external interrupt flags
(11-0 and IE I) in ICON and timer overflow interrupt flags (TEO, TE1 and TE2)
(within IX ON and T2CON) are cleared by hardware when the interrupt routine
is serviced.
7. Interrupts priority may be modified by bits (PXO, 1T0, 1WI, I T 1 . PS and
8. Timer overflow interrupt (TEO. II'1 and TE2) are delected by flags within
ICON andT2CON.
«>. External interrupt (IEO ami I I I ) are detected by flags within ICON.
10. Serial port interrupt (Rl or 11) is detected by flag within SCON.
2.3 8051 Addressing modes
All members of the 8051 family executes the same instruction set
which is optimized for 8-bit. It provides a variety of addressing modes for
different memory types. Ureif definitions of these modes are as follows | 8 | :
2.3.1 Direct addressing:
'The address of the operand is specified by an 8-bil Held in the
instruction (only for internal RAM and SERs).
2.3.2 Indirect addressing:
1 he address of the operand is specified by a register. Used for both
internal and external memories. RO or Rl arc used for addressing.
2.3.3 Indexed addressing:
The address of the operand is specified by DPTR or PC. It is used
only for program area for reading look-up table.
2.3.4 Register instruction:
Contents of RO through R7 in the current register bank can be
accessed by these instructions.
2.3.5 Register-specific instruction:
Contents of certain register like Ace and DPTR are accessed by these
instructions.
2.3.6 Immediate constants:
The value following the opcode (//constant) is operated with the Acc
or DPTR.
25
It worth mentioning that the programming instructions deals with arithmetic
operations, logical operations, data transfer operations. Boolean operations,
jumping and calling operations. Details information are available in instruction
set.
2.4 Circuit Hardware
The hardware used is a simple circuit consisting of an 8051
microcontroller beside some necessary items as shown in Tig 2.6 below. The
different items are as follows:
1. 8051 microcontroller, dell tied by UI.
2. 7411( 'TOO dual input NAND gates, defined by U2 (for making RAM like
R( )M containing the code as the PSEN is active when fetching the opcode).
3. 7411( I 573 octal D latch, defined by 11.3. I his is for latching the lower
address byte to the memories as lower address byte and data are multiplexed on
porlO.
4. 27C512 normal or 301 512 Hash ROM. defined by U4 (pin compatible ICs,
even different si/e are also possible, depending on user program size).
5. 6264 static RAM (64Kbit), defined by D5 (pin compatible ICs, even
different size are also possible, depending on user data size).
6. 24COI IIC protocol Ef PROM, defined by U6.
7. PCI 8583 real lime clock, defined by 117.
8. 74 I IC'f 10 triple NAND gate, defined byU8 (for decoding and Hash writing).
9. 7805 voltage regulator, defined by 110.
10. 11.006MHz. XI Al for the microcontroller.
11. 32.768 KHz for real time clock.
12. BC857and BC847 transistors for buffering TXD and RXD signal to the
serial port, defined Ql and Q2.
13. Some resistors, capacitors, diodes and connectors.
The schematic drawing of the circuit is shown in figure 2.6 on the next page.
While the circuit is built.on a double side Printed Circuit Board (PCB). The 26
component side and the solder side arc shown in Figure 2.7a, Figure 2.7b while
the layout of the components side is shown in Figure 2.8a while the layout of the
solder side is shown in Figure 2.8b below.
27
Figure 2.6 Circuit diagram of the 8051 board
28
Figure 2.7a l o p layer (component side) I V B
Figure 2.7b Bottom layer (solder side) PCB
29
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30
Chapter Three
Development Tool
uVision is a standard Windows; application and an integrated software
development platform that combines a robust editor, project manager, and make facility.
uVision supports all of the Keil tools for the 8051 including the C compiler, macro
assembler, linker/locator, and objeel-HKX converter. uVisiou helps expedite the
development process of embedded applications by providing the following [5]:
Full-featured source code editor.
Device Database for pre-conllguring the development tool setting.
Integrated make facility for assembling, compiling, and linking your embedded
applications, and Dialogs for all development tool settings.
True integrated .source-level Debugger with high-speed CPU and peripheral
Simulator.
Links lo development tools manuals, device datasheets & user ' s guides.
Using Keil Software tools, the project development cycle is roughly the same as it is for
any other software development project [5j .
\ . CtevWe a pvotacA Vo seAce\ \\\e W>5>\ vtastae vmi\ \Y»e tool settings.
2. Create source Files in assembly or C.
.1 )hri)()y<nir:ipp)iailioii v.ith lite project tiiiitutgcr.
4. Correct evvovs in source Viies.
5. Test linked, aoplicauon.
The development . c l e described above may be best illustrated by different software of
Keil development tool features as shown in Figure 3 .1 . The uVision screen provides the
user with it menu bar for command entry, a tool bar where the user can rapidly select
command buttons, and windows for source files, dialog boxes, and information displays.
jiVision lets the user simultaneously open and view multiple source files. The menu bar
provides the user with menus for editor operations, project maintenance, development
tool option settings, program debugging, window selection and manipulation, and on
line help. The Watch window lets the user view and modifies program variables and lists
.31
the current function call nesting. The contents of the Watch Window are automatically
updated whenever program execution stops. The user can enable View "Periodic
Window Update" lo update variable values while a target program is running. The
Memory window displays the contents of the various memory areas. Up to four different
areas can be review in the different pages. The context menu allows the user to select the
output format | 5 | .
Pioiect WiiMOW
Puiiimeiai M
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I igure .1.1 Development tool features
3.1 Creating a new project
pVision includes a project manager which makes it easy to design
applications for the 8051 family. The user need to perform the following steps to create
a new project:
Create tt new design project. Select New Project from the Project pull-down menu as
shown in Figure 3.2 below |5) .
.32
B P
J
Figure 3.2 ()pen new project
The user will prompted to ehose a name for his new project. It is preferred that the user,
create a separate folder as shown in Figure 3.3 below, where all the files of his project
will he stored. The user should choose a name and click Save.
Create New Protect
Save tn: |, )EST " 3 © d* 11»
5j];lest1 Uv2
F::e name: | Teitl' Save
3 Cancel
figure 3.3 Create a new Colder
Hie following window will appear, where the user will be asked to select a device for
Target 'Target 1': as shown in Figure 3.4 below [ 5 |
I !
figure 3.4 Select devices tor target
from the list at the left. The Select Device dialog box shows the uVision device
database. The user should select the microcontroller he wants to use. When the user
clicks OK to continue, a new p o p - u p window will appear. It will ask whether the user
would like to copy the standard 8051 startup code to the project folder. The user should
select Yes when prompted t o add the start-up code to the project folder. The
STAUTUP.ASl file is the startup code for most 8051 CPU variants. The startup code
clears the data memory and initializes hardware and reentrant stack pointers. In addition,
some X051 derivatives require a CPU initialization code that needs to match the
configuration of hardware design. Then using the file menu the user can open a new file
as shown in figure 3.5 below or he may open an old one. If the file is new the user
should print his code in the window and save it with .asm or .(.' extention.
34
i"-: I F . t .^c: Let-, j 'i.^-e j j JC-OS I - C S . tisv
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m
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r
f igure i 5 open a new file
Now lhe source code is ready, but it lias not been added to the project. To add the source
code to the project, the user should right-click on Source Group I and select Add files to
Group 'Source Group / ' as shown in figure 3.6 below.
U S
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T.M C.'J .•.V.JTaryet 1
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j ATM M E * LO GROUP 'SOUITE CIIOUP 1 '
i I
l i t; 3.6 Adding tile lo (he project
A pop-up window will appear. The user should select the file he created to add or any
oilier file as shown in figure 3.7 below, and then, click on Add to add the file to the
group.
I'ig 3.7 Selecting file to add to the project
The user should cheek Create HEX File to enable the program to create hex files. This
have to be turned ON manually to generate IIKX files. The user should make sure it is
turned ON, by right-clicking on target I » Options for target 'target I', then under the
'output tab, by checking the box 'generate IIKX file' as shown in Figure 3.8 below.
This step is very important as the 11HX file is the compiled output of the project that is
going to be transferred to the microcontroller.
Pl'tiCiii* J°rIflJBet'Jj»n!et.t.' ,
I" G c £ e Batch fit
Or. | j Defaults |
I'igure 3.8 Selecting III!X file output
36
3.2 Building the project
Before testing the source code, the user has to compile his source code, and
correct eventual syntax errors. In Kfill. I DPI, this step is called 'rebuild all targets' and
has this icon: lt*l. When building an application with syntax errors, uVision will display
errors and warning messages in the Output Window - Build page. A double click on a
message line opens the source file on the correct location in a uVision editor window.
After testing the application, it is required to create an Intel HEX file to download the
software into an liPROM programmer or simulator. uVision creates HEX files with each
build process when Create HEX file under Options for Target - Output is enabled.
The build target toolbar button translates only modified or new source files and
generates the executable file. pVision maintains a file dependency list and knows all
include files used within a source file. Even the tool options are saved in the file
dependency list, so that pVision rebuilds files only when needed. With the Rebuild
Target command, all source files are translated, regardless of modifications [5 | .
3.3 Debugging the project
,pVision Debugger will lest the applications developed using the C51
compiler and A51 macro assembler. The uVision Debugger offers two operating modes
that arc selected in (he Options for Target - Debug dialog: Using Simulator allows you
to configure the p Vision Debugger as software-only product that simulates most features
(if the 8051 microcontroller family without actually having target hardware. T h e user
can lest and debug his embedded application before the hardware is ready. uVision
simulates a wide variety of peripherals including the serial port, external I/O, and timers.
The peripheral set is selected when you select a CPU from the device database for your
target. After clicking on the debug icon'-U , the user can start debugging as shown in
figure 3 .0 below. The user will notice that some part of the user interface will change,
some new icons will appear, like the run icon circled in the following figure |5J:
37
Q f i l e £dit y.iew £ ro je« £«t»ug Fljsh Pejipherals l oo t s £VC8 JJindow flelp
•m fe^puHS « a * Target I
T4>.j«t; I
j H : Sourc* Group 1
I
01 02 03 04 05 08 0/ 08 09 10 11 12 13 14 15 16
J U J
1
» : : : r
K:K;I i i , ».;-:.r
I'iguie .>.') Start debugging
I he user can click on Che 'Run' icon and the execution of the program will start as shown
in I'igure 3.10 below. The user can see the behavior of the pin 0 or port one, but clicking
on 'peripherals, I/O ports. Port 1'. The user can always stop the execution of the program
by clicking on the stop button ( 'O ) and can simulate a reset by clicking on the 'reset'
button K i t . The user can also control the execution of the program using the following
icons: ^ ^* ^ which allows following the execution step by step. Then, when
finished with the debugging, the user can always return to the programming interface by
clicking again on the debug button ('-'l ).
3X
Qfi'« I d * J£i*w PioJ«ct £ebu.j F l i j h jp«riph«rjlj} Jool i § V C S Jgindow fcjgle
, ; v ; j .| 'l/O-Puitt
I Symbols
01 02 Oi 04 05 lu', 0/ 00 09 10
OH 12 13 14 IS 16
Timer
Port 0
Port l
Port J
Port 2
>:r. *:
ci. : i . : t i : :
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I -'inure 3.10 I ' lounini execution
3.4 CPU Simulation
(iVision simulates up ti) 16 Mbytes of memory from which areas can be
mapped lor read, write, or code execution access. The uVision simulator traps and
reports illegal memory accesses. In addition to memory mapping, the simulator also
provides support for the integrated peripherals of the various 8051 derivatives. The on-
chip peripherals of the CPU selected are configured from the Device Database selection
the user have made when he created his project target [5 j .
39
*
Chapter Four
Emulation Concept
Developing software and hardware for microcontroller-based systems
involves the use of a range of tools that can include editors, assemblers, compilers,
debuggers, simulators, monitors, emulators and programmers. To the newcomer
microcontroller based system development is often not clear. How all these different
components play together in the development cycle? And what are the differences for
example between emulators and simulators? To complicate matters more, there are
quite different approaches and technologies for emulation available that make it
difficult for embedded system engineers to choose the right tools. Good approach for
understanding the tools is the review of the development cycle which is reduced in the
following four steps 11 f> |.
1. Writing the code
2. Translating the code
3. Debugging the code from mistakes
4. Programming Hash or OTP (One Time Programmable) memory of the microcontroller
The cycling is clear coming from the nature of the process which indicates that
whenever a mistake is discovered (which is always happening and several times) the
whole process is repeated again. Therefore the development tools mentioned above are
used in all these four steps of the process as follows:
4.1 Writing microcontroller code
Software code for a microcontroller is written in a programming language
(often Assembler or C). This source code is written with standard ASCII text editor and
saved as ASCII text file. Of course programming in Assembler requires learning the
microcontroller specific instruction set (assemble mnemonics) and result in compact
and fastest code. A higher level language like C is independent of a microcontroller
specific architecture, but requites controller specific extensions to the standard Imgunge
to be able to control all of the chip's peripherals and functionality. The code yielded is
40
portable and fast to develop but the penalty is larger eode size (40% compared to
assembler). This will require more space and the program will run 4 0 % slower than
assembler code. Also the programmer has to be familiar with the C language.
4.2 Translating the code
The source code needs to be translated into instructions the microcontroller
can execute. The microcontroller instruction set is represented by op codes which are
Unique sequence of bits (zeros and ones). These op codes are decoded by the
microcontroller's instruction decoder logic and then executed. Instead of writing op
eodes in bits they are commonly represented as hexadecimal numbers, where one hex
number represents four bits within a byte. So it takes two hex numbers to represent
eight bits (one byte). For this reason microcontroller code in machine readable form is
also called hex code and the file that stores that code is called hex tile. Assemblers or C
compilers translate the source code into "hex code" that represents machine instruction
"op codes". To support modular programming useable libraries of codes most
assemblers and compilers come with linkers and librarians. I-inkers are used to link
code modules saved in different files together into a single final program. At the same
time they lake care of chip 's memory allocation by assigning each instruction a,memory
address in such a way that different modules do not overlap, l ibrar ians help to manage
anil organize a library of re usable code modules. Once the ASCII source code text file
has been assembled (with an assembler) or compiled (with a compiler) and the files has
been linked (with a linker), the output results a number of files that can be used for
debugging the software and programming the actual microcontroller memory.
4.3 Debugging the code
A debugger is a piece of software running on the PC, which has to be tightly
integrated with the emulator used to validate the code. For this reason all emulator are
accompanied with their debugger software. I "Jul also some compilers include debugger,
which work with certain emulator. Debugger allows the download of code to emulator
memory and then control all the function of the emulator from the PC. Common
debugging feature include the capability to examine and modify the microcontroller's
on-chip registers, data and program memory; pausing and slopping program execution
4 1
at dc/incd program locations by setting break points; single stepping (execute one
instruction at a time) through the code: and looking at the history of executed code. So
far text editor, assembler, C compiler, linkers, librarian and debugger are mentioned.
This can become a big challenge to alternate back and forth between all these programs
during the debugging process (discover a bug, edit the source code, compile it again,
link it again, download the modified code again to the emulator, and so on). This is
where an Integrated Development Hnviroiunent (IDH) comes in. An integrated
development environment puts all of the previously discussed software components
under a common unified User Interlace, so that it become possible lo make a code
change and get the modified code loaded into the emulator with a few mouse clicks
instead of dozens. A good IDH allows for example, lo click on a syntax error message
produced by the compiler and have the source code with the highlighting offending
instruction pop-up for editing the text editor. One click of a button and the modified
code gets translated, linked, anil downloaded to the emulator. An lDli stores the
configuration setting for the project such as compiler switches and so on, so as to
recreate easily the project later. When it comes to debugging code and testing
applications, there are different tools that can be utilized. 'I'hey differ in development
time spent and debugging features available. These are simulators, monitors and
emulators. •
4.3.1 Si in ula tors
Simulators try to model the behavior of the complete microcontroller in
software. Sonic simulators go even a step further and include the whole system
(simulation of peripherals outside the microcontroller). No mailer how fast the host PC
is, there is no simulator on the market that can actually simulate the microcontroller
behavior in real-time. Simulating external event can become a time consuming
exercise, as the developer have to create "stimulus" files that tell the simulator what
external waveforms to expect on a particular microcontroller pin. A simulator also can
not talk to the target system, so functions needed by external peripherals are so difficult
lo verify, for that reason simulators are best to test algorithms that run completely
within the microcontrollers (such as math routines). They are the perfect tools lo
complement emulators for large development teams, where buying an emulator for each
developer is financially not feasible.
4.3.2 Monitors
Monitors commonly bundle hardware boards anil in-system programmer
with some software components (assemblers, linkers, debugger and code-size limited
compiler). They allow very basic emulation and debugging functions. They are usually
with Hash-based microcontrollers, as they allow an actual microcontroller to emulate
itself. This is done by including in-system programmer to download the code into the
Hash and execute it. The monitor code in the hardware board allows stopping of
execution (break) and examine memory. Of course, it uses some of microcontroller's
resources (interrupts, stack memory, data memory and some pins). That is why this
approach is called intrusive or non-transparent emulation.
4.3.3 I'mutators
An emulator is a piece of hardware that ideally behaves exactly like the real
microcontroller chip with all its integrated functionality. It is the most powerful
debugging tool of all. A microcontroller's functions are emulated itt real-time and non-
intrusively. An emulator by definition always works transparent or non-intrusively.
This means none of microcontroller's on-chip resources or l/O pins are lost due to
emulation. If emulation is non transparent, then it is not an emulator, but an evaluation
board. When developing a project of medium complexity, a non-intrusive emulator will
save a lot of time and effort.
All emulators contain three essential functions in different implementation forms:
I - The emulator control logic and emulation memory
2- The actual emulation device
>- The pinoul adaptor
4.3.3.1 ICiiiulatioii control logic and emulation memory
Control logic is the more difficult and expensive part of emulators, as it is
required to recreate functions that might be lost due to the emulator using these
43
resources (in other words, some standard I/O pins). My recreating such functions with
additional logic, emulators work truly transparent and non-intrusive. This means all the
pins, all the memory, and all the peripherals functions available like with the real
microcontroller. I'veu more, control logic is required to implement emulator features
such as break points, external event, single stepping, loop counters and trace memory.
An emulator uses external static RAM for the emulated program memory, because
ROM and Oi l* (One Time Programmable) memories are not suitable due to program
changes. RAM memory allows the code to be changed quickly and an "indefinite"
number of times during the software debugging process. For flash based
microcontroller which grantee 1000 times of reprogramming, Hash memories are used
for emulation despite their limited life-time and low speed for the sake of price.
4.3.3.2 The emulation device
Emulators typically vise external RAM memory for program storing. Hence
it becomes apparent that, they can not use standard sample of the emulated
microcontroller for emulation purposes. They need special bond-out chips of the
microcontroller to be emulated. Those bond-out chips have additional pins that allow
the emulator electronics to feed the external stored program information to the
microcontroller instead of the on-chip memory content in standard microcontroller.
Also they control program execution (low and access on-chip registers and data
memory. Instead of special bond-out chips, some emulators manufacturers program the
microcontroller's complete functional model into a PIT) (Programmable Logic
Device).'! he main drawback of this approach is; how accurate will the PI.l) model of
the microcontroller resemble the real standard microcontroller. Anyway it works in
real-time with models of less complexity and slow speed. On the positive side, such
emulators can easily be reconfigured to support many different derivatives of a
microcontroller family.
4.3.3.3 The pinout adaptor
A pin adaptor gives the emulator's target connector, the same "package" and
pinout as the microcontroller to be emulated. Most emulators give a range of choices of
4 4
exchangeable pin adaptors that supports the exact derivative and package of your
specific microcontroller.
4.4 Programming microcontrollers
The last step in the development cycle is programming the chip, lo carry out
the job needed in the target hardware. Microcontroller programming depends on the
chip version whether it contains Hash memory or OTP (One Time Programmable)
memory. It is also classified according to the chip's position IN or OUT-of the target
hardware as follows:
4.4.1 Out-of-C'irciiit Programming
OTP microcontrollers are typically programmed out-of-circuit. That means
the chip is programmed before being soldered in the target board, for this purpose
production grade programmers are needed; which arc special programming hardware
similar to standalone fPROM programmers. Programming process is carried through a
parallel bus of address lines, data lines, control line and 1IV programming voltage line,
therefore programmer are connected to the parallel port of the driving PC and
microcontroller programming utility is invoked. These programmers offer the choice of
optional, high quality, expensive, zero-insertton-foree (ZIP) pin adaptors to support
different packages.
4.4.2 In-Systcm Programming (ISP)
flash microcontrollers can be both in-circuit (in-system) and out-of-circuit.
In-circuil programming means that, the microcontroller is already soldered into the
target hardware and can be programmed via one of its communication interfaces
('HART, SIM). Ibis requires that, the signals needed for programming routed to an in-
system-programming (ISP) connector. ISP connector required varies from one
microcontroller lo another, so it is recommended that, before the PCI! layout is made,
which ISP connector required is decided. ISP process is done via the serial port of the
driving PC, therefore it is slower than out-of-circuil programming. But on the other
hand, ISP has some advantages as follows 116]:
1- It programs code and data memories.
45
2- It allows upgrading the system without disassembling.
3- It allows code incryplion and protection.
4- There is no need for expensive socket adaptors.
4.5 Emulation Technical approaches
Since development of microcontrollers, not only their unit volume has been
increasing over years, but also their application has been increasing too. One main
problem that has arose in using microcontrollers dealt with debugging • systems
incorporating these devices, since their program memory and data memory are
integrated inside the chip. I'mutators are designed to solve these problems. They are
used to design and run program outside the microcontroller memory to control the
process and discover the bugs. I''initiator used different approaches that can be reduced
in the following
4.5.1 Base unit and I'robecard
Many emulator consists of a base unit and probecard (the base unit is
connected to a IV via the serial, parallel or USB port) It contains the majority of
emulator electronics (emulation control logic and emulation memory), with the
exception of the emulation chip it self. The emulation chip is a special bond-out version
of the actual microcontroller and mounted on a separate small PCB, called the
probecard. This probecard connects via a ribbon cable to the base unit, and has a pinout
adaptor at the bottom, which allows the probecard to be plugged into a socket on the
actual target board in place of the actual microcontroller. The advantage of partitioning
the emulator into base unit and probeeard is that, one base unit can support many
different derivatives of the given microcontroller architecture (for example, all 8051
devices). \\y purchasing different probecards the emulator can then be changed to
support all the on-chip features and packages of the specific microcontroller derivatives.
Another advantage is that the probecard can be kept relatively small, which make it
easier to plug into the target in space constrained applications. I'robecard approach also
minimize the physical distance of the emulation chip from the location of the final
microcontroller, minimizing the impact of noise and additional capacilive and resistive
4 6
loading dial can become a big issue when analog peripherals need to be emulated.
Motherboards and daughtereards is a similar approach under different name.
4.5.2 Debug Board Modules (lHilYI)
In this approach all of the emulator electronics and the emulation chip are
combined onto one single board, large sized I'CB not housed in an enclosure. The
connection to the target system is accomplished by ribbon cable. This means that, all
signals of the microcontroller to be emulated arc routed via the ribbon cable that
connects the target system with the emulator. This is not preferred particularly when
A/I) converter signals are to be measured accurately during emulation. D B M s emulate a
single specific microcontroller and cannot be modified to support other derivative of a
family, on the other hand DBMs arc typically low priced than others, and their
debugging capabilities arc below probecard approach.
4.5.3 Dedicated emulators
There are several forms dedicated emulators, which only supports a very
narrow range of microcontroller devices (microcontrollers with identical functionality
and pinoul. but different memory sizes). They take the form of DBMs that can be
plugged directly into the target systems or base units and probecards with probecards
not being exchangeable. They are actually built on a small single I'CB with or without
an enclosure.
4.5.4 Emulators Using Microcontroller Flash Memory
With the advent of flash program memory new approach in microcontroller
becomes possible. The write/ erase capability of Hash program memory, in combination
with emulation support circuitry and code embedded in microcontroller; enable such
microcontroller to be its own emulator. This does not work with all Hash
microcontroller particularly earlier generation which lack the necessary on-chip
emulation support circuitry, flash microcontrollers with the necessary on-chip
emulation support circuitry can, regardless of the package, be soldered directly into the
target system. This of course grantee that the chip actually sees the exact environment
as the final one. This is a big advantage when it comes to emulating analog peripherals.
-17
The connection required to enable PC-based software debugging is accomplished by
few digital I/O pins of the microcontroller who have additional functions created by a
small piece of hardware. One common approach of the on-chip emulation interface is
the JTA(i interface, found mostly on 10-bit and higher microcontroller, flash
emulators do not require RAM memory to store program code, but they use lite
microcontroller's Hash memory. Another advantage is that, they also double function as
Hash programmer, since the program code can be downloaded into the chip's memory.
Also flash emulators arc in fact one. and the same emulator can support all flash
derivatives of a given microcontroller architecture. If a new device with new
functionality comes out, all needed is a sample of that new device and an update of the
debugger software. Therefore there is no need to buy new probecards or debug board
module or dedicated emulators for each new derivative. Disadvantage of using flash
emulators is that, program downloads (required after every code change) take much
longer time; also the microcontroller's flash memory life-time is limited and depends on
the write/erase cycles number given by the manufacturer.
48
Chapter Five
Debugging Strategies
For simple code, debugging is usually not an issue. However, as code size
increases, not only does the need for debugging increases, the complexity of debugging
increases as well. Debugging may further be complicated by other issues, such as the
requirement of real-time debugging or the insertion or removal of debug code into the
final product code. Consequently, thought must be given to the debug strategy that is
used in a given application. Figure 5.1 depicts the available debugging strategies for
Micro System Controller (MSC) devices. 'I'he strategies range from simulation-based to
in-system debugging. ISI) is further categorized into software-based 1SD and hardware-
based ISD. The examples used in this application note focus on C and Assembly
programming, but the principles can be applied lo other programming languages [19].
MSC Debugging Strategies
Simulator
Sc-ftware ISD HaiJv.aie ISD
h'liiiimil Mxiiiti'i
M M : MON
IDt MoiiiU'i In Circuit r.iimlator
Unlit In Debug;
M O X
figure 5.1 MSC Debugging Strategies Tree
-I')
5.1 Integrated Development Environment IDE simulator
1DI\ is a set of development tools integrated in a user-friendly, Graphic Use
Interface (GUI) environment. Development tools integrated into the same environmen
shorten the code development cycle and reduce code errors, which also enhances cod
quality. IDHs provide tools such as editors, assemblers, compilers, linkers, projec
management, and revision control, as well as device simulators in the same environmen
| 7 | . Simulators enable users to simulate code execution without requiring actual targe
hardware. Users can verily algorithms and timing, and simulate peripherals, interrupts
and l/O. This simulation is important because it al lows the user to start cod<
development and even evaluate system performance before the target hardware i:
available, f igure 5.2 below depicts the conceptual block diagram of an IDE simulato
for the MSG device. Users can perform disassembly, break point, memorj
watch/modify, code execution trace, or peripheral monitor. Simulators also support codt
coverage tools that mark the code that has been executed. Simulators also providt
performance analyzer tools that record the execution lime for functions such that uses
can profile code performance. The most common operation in simulators is codt
stepping. Simulators support single-step with step-into a target function, or step-over i
given function. The machine cycle count is accurate in the simulators, as well; therefore
execution time can easily be evaluated for inefficiencies.
t
Piocessoi Model
H • Llegistei File
Peiipheials
o a
f igure 5.2 Block diagram of an IDC simulator Concept
50
Code simulation is a low-cost approach to code development, since it does not requin
any target hardware for debugging. When the code development reaches the stage tha
requires target hardware, however, debugging in the target system. In - Systen
. Debugging (ISD) is needed.
5.2 In System Debugging
Instead of PC simulation. ISI) executes and debugs code in the actual targe
system. Ad-hoc debugging is the easiest method for 1SD. Ad-hoc debugging is simph
inserting debug code wherever needed. In Example below, for instance, two number:
(10 and 40000) of different data types arc added. An error result of 25526 will b<
stored, since the unsigned number 40000 is the same as 25536 for a 16-bit signec
number. The ad-hoc debugging method would simply add a print/ statement and inspec
the result. This style is good for simple code testing. When the code size increases
however, the number of print/ statements becomes unmanageable. Other systematic
debugging methods need to be used ( I ) .
ml i=IOJ:
unsigned int 40000:
y=/-» k:
printf("%ii ~ %d\ %d",j,i,k):
There are two categories of In-System-Debugging as shown in Figure 5.1 software
based and hardware-based ISI). Software-based ISI) is further divided into terminal-
based and IDE-based. Terminal-based debugging includes a genera I-purpose monito
and an on-chip debugger. IDE-based debugging includes a source level monitor am
flash-enabled-1 SI) . Hardware-based ISD is further categorized into In-Circuit Emulator
(ICE) and Built-in Debugger Module (BDM).
5.3 Software I S D Techniques
5.3.1 Terminal-Based General-Purpose Monitor
A terminal-based general-purpose monitor is a software monitor that reside
in code memory. The monitor program concept, as shown in Figure 5.3. acts as a
i -
51
interpreter between the user code and the terminal program. The monitor allows for
downloading code into the target system memory from PC terminal programs using the
on-chip UART, and then performing debugging features, such as memory or special
function register (SFR) read-modify, CPU status, or calling a user routine, single step, or
break.
r MSC Target
PC COM port
with Terminal Emulator
R S 232
MSC De^ice
Monitor Code
Data Metnorv
Figure 5.3 Monitor Conceptual Block Diagram
Two techniques may be used with the monitor code. First, the user code may be
downloaded together with the monitor code into the MSC Hash memory. Alternatively,
because program and data memories arc separate (that is, designed with Harvard
architecture), the user program can be stored in external data memory with the monitor
load command. When the user issues an execution command for the downloaded code,
the CPU fetches the downloaded code from external data memory. For a typical data
memory access, the memory is only accessible via a MOVX instruction. External
hardware is needed to enable the program fetch from data memory. The external
hardware may be a simple gate or diodes/resistor, which enables the data memory access
52
when the PSEN device signal is active. The biggest advantages for using the software
monitor are its simplicity and low cost. The disadvantages are:
1. Monitor debugging is only good for assembly language debugging. Since the monitor
interface is only a PC terminal emulation program, source-level debugging is not
supported. Source-level debugging functions such as single-step requires a symbol-table
and machine code to source code relationships.
2. Monitor programs have many hardware restrictions, such as needing an external
RAM memory PSEN connection and serial port baud rate setup. Greater effort is needed
to adapt the monitor program for the target system.
3. The existing monitor commands may not meet the needs of the user, and
modifications to the monitor may be needed. Furthermore, the source code for the
monitor program may not be easily available.
4. The monitor code and monitor PC communication port arc general-purpose resources
of the target system and are used for debugging purposes. Therefore, the application
code must avoid using these resources during debugging, and the application code must
be coded according to the monitor code coding style. For example, the interrupt vector is
re-mapped from OOOOh to a higher program memory address.
5.3.2 Terminal-Based On-Chip MSC Monitor Program
Some microcontroller has an on-chip, 2kB boot loader ROM that also
contains embedded debug sub-routines. Using the boot loader debug subroutines, such
as autobaud, put_string, and andjuirser, gives the user the lowest debugging setup.
Monitor programs are closely related to the target system hardware setup. General-
purpose monitor programs (most developed in the 1980s and 1990s) support EPROM
programming. The MSC devices are embedded flash memory devices. The MSC
embedded debug subroutines support not only the basic debugging commands such as
SSingleStep, B-Break, and Q-Continiie; they also support flash memory commands
such as CP-CodePageErase, CW-CodeWrite, XP-XDataPageErase, and L-LoadFlash.
For the MSCMon to translate into debug overhead, the minimum configuration is
needed; Which is only 29 bytes of flash code space, as follows:
53
Sinclude (regl210. inc)
CSEG at 807FH
db OBFH; HCRO: PM1--0 RSI-1 to protect 0-100011 Flash
CSEG at OOOOH; Monitor code start
LCALL autohaud
mov R6, iihigh greet
mov R7, iilow greet
kail jnitstring
LIMP andj?arser
greet: dh Oah.Odh, "MSC Monitor",0
CSEG at 033H
; any other Aitxlnl handler
LIMP monitor_isr
In addition, since user code is stored in Hash memory, the downloaded code can be used
for the final application. The prototypes for the available embedded subroutine of the
Boot Loader R O M typically must be provided. The MSC Monitor is Hash resident, and
the Load command is used to download user code. Since the memory requirement for
the MSC monitor is very low, the user code may be linked with the MSC Monitor. The
MSC Monitor and the general-purpose monitor require a PC terminal emulator such as
Hyper-term, Tera-lerm, Procom. or Telix. These terminal programs have no information
about the source code or monitor operation. However, PC IDE programs have special
handshaking with monitor programs for extra source code information that a general-
purpose monitor or M S C M o n do not have. These sophisticated source-level interfaces,
when combined with the debugging commands, provide a user-friendly environment.
5.3.3 IDE-based Monitor: MON51
The M O N 5 1 program is a flash memory resident program that communicates
with the IDE to achieve source-level debugging, when it is used for MSC code
54
development. Here is an example to show the usage of the debugger: Program, as shown
below, toggles P3.4 after each output message using the built-in ROM routine
putstring.
$incltide (reg 1210. hie)
CSEG at 80001{
loop: mov R6, tthigh msg
mov R7, #low mxg
leall put string
epl p3.4
pnp loop
msg: dh "Toggle P3J".Oah,(Mh.O
CSEG A T 0FFD5H
jmi string:; void put_siring(char *string):
END
The IDE GUI greatly enhances the debugging efficiency. At any time, the user can
monitor the CPU register and any memory contents. However, this debug strategy
requires external memory, putting a great burden on the systems, which do not require
external memory.
5.3.4 IDE-based Monitor: ISD51
For small memory configuration devices, with only 4kB of internal flash
memory, loading a t5'pical monitor program of around 6kB for debugging purposes is
not possible. Some monitors provide a low source-level monitor program, requiring only
500 bytes of code memory. Since it is source-level, debugging quality is much better
than assembly-level monitors. It does not need the von Neumann-type external code
memory (true In-Systcm-Debugging is possible without extra debugging hardware),
which is important for small remote sensor applications. The 1SD51 operation is
different from the general-purpose monitor, and M O N 5 1 . Those monitor programs are
preloaded into the target system and wail for user commands lor downloading user code.
Due to the small size requirement for the ISD51. it is compiled and downloaded together
with user code in the target system. For those monitor programs to implement break
point function (for example, for memory inspection), the CPU has to enter the interrupt
service routine for break address check; this is called software break-point. Some chips
have a built-in hardware break-point, that delects break addresses with hardware. 1SD51
fully utilizes the hardware break-point function, improving the execution performance
over software break-point by a hundredfold.
5.4 H a r d w a r e ISD Techniques
5.4.1 In-Circuit Emulator
ICE is hardware interfacing to the MSC device that can perform debugging
features such as trace, break-point, and stepping. It docs not use the MSC serial port or
occupy any code/data memory space, nor does it require any CPU cycle over for
debugging features. ICE can performs the debugging through control of the external
memory bus. ICE debugging requires the lowest target system over task and carries the
highest debugging capabilities. The ICE is integrated smoothly with the IDE; therefore,
the GUI, code profiling, and coverage features are supported. There arc several
disadvantages of using ICE:
1. Since ICE is hardware-based, with a deep trace and break point buffer, the
development tool cost is much higher than the software-based monitors.
2. External memory ports (PO, P2, PSEN, RD. WR. AIT-, and RST) are needed for ICH
connection. These ports cannot be used for target system applications.
3. To perform debugging, the ICE must be running at the same speed as the target
system. The max clock rate at 33MHz means optimum requirements for the ICE timing
at this speed.
4. When driving the ICE hardware at high speed, the increased loading will compromise
analog performance, which is highly undesirable for In-system debugging.
5. ICE is not suitable for low-pin-count devices that typically carry no external memory
port for ICE interfaces.
56
5.4.2 Built-in Debug Module (BDM)
The BDM is a hardware logic module that is designed within the device.
Typically, the B D M interfaces the target system with the PC via a JTAG port. The BDM
has the advantage that debugging is running at the system maximum clock rate with
minimum effect on analog performance. The debugging capabilities, however, such as
trace buffer size and number of break points are limited. It is because of the feature that
hardware occupies the device silicon area.
57
Chapter Six
Software Development
Microcontroller emulation, which is defined as the process of making
software and hardware assembly, that works exactly like a specific microcontroller
under the control of PC passed through different stages. A significant step was
production of Hash microcontroller which allows the microcontroller to emulate itself
under the control of some monitoring program controlled by a PC through the serial
port. Due to the lack of source information about IDE-based debugger for developing
IDE-based monitor, this study dealt with terminal-based monitor program whose source
code is given in appendix A. I his chapter will give an overview of the software
developed under the monitor program headings and will review the building process
carried out to produce it.
6.1 Monitor Program
The program is designed in an interactive way. It displays so many messages
and help information that guide the user during operation. Although it is covering a wide
area of program debugging still more modification is needed to make it efficient
particularly when IDE-based debugger is combined to it and hence breakpoint, single
step and trace can be meaningful. This monitor program is not very optimized for speed
and memory requirement, it is just written in a structured fashion with functions for each
task to make it easy to understand and modify. The simplest representation of this
terminal monitor program is an initialization segment shown in Figure 6 .1 , a power on
segment shown in Figure 6.2 and a loop that executes menu flowchart shown in Figure
6.3 below:
58
Start
Initialize constant parameters
Figure 6.1 Parameters initialization
Disable Interrupts Reset ports Delay 100.000 cycle Erase flash if enabled
Run start up code if any Run autobaud if not defined Display welcome message
Figure 6.2 Power on segment
59
c Menu
Prompt menu message Input characters
Look for user command in memory
Execute user command
Display nevvline
) to UploacT*^
Figure 6.3 Main menu
It is clear from the flowchart above that the monitor program supports user program
downloading, uploading, dumping memory area, jumping to some address location,
editing address content, running some program, displaying help messages, displaying
directories, erasing external area, displaying internal memory, clearing some memory
range and entering new memory location. The flowcharts shown in Figure 6.1, 6,2 and
6.3 above arc simplified. Presenting the whole flow chart requires over 100 pages.
Anyway, the initialization segment flowchart is shown in Figure 6.4 below and some
sample flow charts are shown in this chapter later on.
60
location to LIMP i i i tanipt v*ctow chutc t t o = 8OODI1
Uqu VKtot, 0x80001
(•qu p»jn, 0x80001
« q u W » w , 0 x l 0 0 0 |
«T> mi»m, OXFTRFL
I •
r |«qaen»h,0«rFTr|
j r
I I [*?i<iu k#y,'M'l
IJWJJ witJc«y. 'R*|
I *<iudnM kty.'L'l
,~r"
«-jn juiup_k«y, 7 [
4*fmlt location for tlteu<«r p t o c n m
t t f i i u t i m o f iwrttoiy
•nJ o f t l » memory
I«t tO >tOn-2»IO VftkM if fU<hit»u)WI
fi»*t nwntoiy .W^ti^it o f FHsli ROM
Iwt imntntv tocitit-m o f Flult ROM
*J>I #1 M * j-iit. 0 pi) <-3D »M* *» i«« pin f»At>n* _B5 -3Ppin 15, P3.5(T0
D * « » t f t V t
mini o f e h u tittw» to _. _ - p w * Aniitgnplovl*
„I . ) i t»cloiy
tun ptef tutt
lovl li*x fit*
new wwnmiy toctlton
hmp
Figure 6.4a Initialization segment flowchart
61
equ dumpjtey, 'H'
I equ intm_key, T
equ edit_key, 'E'
equ clrm_key, 'C
equerfr_key,'Z'
equ pgmwait, 19 equverwait, 5
equ eiwait 1,20
equ erwait2,229
equ pswjnit, 0
equ dnld_parm, 0x10
equ stack, 0x30
equbaud_save, 0x78 org base
ijitvp poweiou |.orgbase+3
_ hex dump inemoiy
hex dump internal memoty
_ —edit memoiy
clear memory
erase flash rem
_.l 1.0592 MHz
twenty delays for 11.0592 MHz
^ _ _ _ e a c h delay .5 ms @22.1184MHz
value for psw
block of 16 bytes for download
location of the stack
save baud for "warm boot, 4 bytes
reset vectoi
Ijmp vector+3 tnov dpi, ro" tnov dph, r7
,ret "A
Figure 6.4b initialization segment flowchart
62
The program developed so far, does not have subroutine to allow single stepping and
register inspection. But register inspection can be displayed by a print message in the
user subroutine. Tor example, if a user wants to examine at a certain step the value of the
B register, the following block of code may be placed at the inspection point.
push A
mov A, li
call coul
call new/hie
call cin
pop A
This method of debugging is similar to print/ function using C. The accumulator is
stored in the stack. Then register B value is moved to the accumulator. The cout
subroutine displays the value of the accumulator, which is the value of B register. The
subroutine newline places a new line after the value of the B register. The subroutine cin
waits for a character until a key is pressed on the host. Finally the value of the
accumulator is restored by poping it of the stack. These steps may be combined in a
subroutine as follows:
inspect:
mov A, B
call cout
call newline
call cin
ret
Which is called by the main as follow:
push A
call inspect
pop A
63
Structured programming is adopted, which assigns a different route for each task, to
manage a large number of routines. To make the program readable, it 's routines are
grouped in the source under the following seven headings:
1. Initialization parameters and interrupt vectors
2. Serial I/O subroutines
3. Main menu and monitor user commands
4. Memory, Management Subroutines
5. Power on and initialization
6. Multiplication and division
7. Multi-byte sequence and compressed data processing
The program is written in Assembly language to make it short and fast as required for
such objectives. Microvision development tool is used for writing, compiling and
debugging which is reviewed in one chapter before.
6.1.1 Initialization parameters and interrupt vectors
This part of the program assigns the constant addresses and values for the
following parameters:
1- Monitor base address
2- Interrupt vectors base address
3- User program starting address
4- External memory address range
5- Baud-rate constant value
6- Flash address range
7- Flash enable, erase and write address and data
8- Menu key values (help, directory, run, download, upload, new location, jump, dump,
internal memory display, edit, clear memory and erase flash ROM)
9- Power on reset vector
10- External interrupt 1 vector
11- External interrupt2 vector
64
12- Convert registers into pointer subroutine (small one)
13-Convert pointer into registers subroutine (small one)
14-TimerO vector
15- Timer 1 vector
16- Timer2 vector
17-Display dash subroutine (small one)
18- Display space subroutine (small one)
6.1.2 Serial I/O subroutines
cin: receives a character from the serial port.
dspace: sends double spaces to the serial buffer.
newline2: displays two empty lines, by sending CR and I,F to the serial port using cout
function.
ghex: gets 2 digit hex number from serial port. C = set if ESC pressed, cleared otherwise.
psw.5 = set if return pressed without input, clear otherwise.
2hexl6: gets 4 digit hex number from serial port. C -- set if BSC pressed, cleared
otherwise, psw.5 n T set if return pressed without input, clear otherwise.
fthex!6x: multiplies r3-r2 content by 16 (shift left by 4).
ehex!6y: divides r3-r2 content by 16 (shift right by 4).
asc2hex: converts ASCII character in A to its equivalent HEX. If A content is not a valid
hex value (not in the range 0, 1,2 9, A, F) carry is set (C = 1).
phex: changes the 8-bits value in A into two nibbles (4-bis). Then changes each nibble to
it's ASCII, and sends higher nibble then the lower nibble to the serial port using cout
function.
phex!6: changes the 16-bits value in the DFTR into two 8-bits values in DIM! and DIM,.
Using phex8 it sends the 4 HEX digit in ASCII form to the serial port.
pstr: prints (sends to the serial port) multiple consecutive strings without needing to
reload DPTR (which takes 3 bytes of code!)... This is useful for inserting numbers or
spaces between strings.
65
upper. Converts the ASCII code in Acc to uppercase, if it is lowercase code.
lemlr. returns the length of the string in rO. The siring mentioned starts at the DPTR
content location. The string end is either 0 or bit.7 set.
esc: Checks to see if <ESC> is waiting on serial port. C=clcar if no <ESC>. C~set if
<ESC> pressed. Then buffer is Hushed.
6.1.3 Main menu and monitor user commands
menu: first prints out the prompt I, then it prompts another message asking for input and
it waits there. When the user enters his response it looks for similar external commands
in the external memory. When it is successful it executes corresponding routine. When
finished it returns. If it didn't find in the external memory it comes and looks for it in the
internal command. If successful it will jump to it and execute it. When not successful it
returns back to the beginning of the menu to repeat the process. The details of menu
explanation are embedded within the text in appendix.
dnld: routine download hex files from the serial port. 1 lex file is a number of data
• records terminated by CR and LF. A data record example is as follows:
:xxyyyy00aabbccddee mmZZ
where : Start of record
xv No. of data byte (two hex digits)
yyyy Starting address of the record (4 hex digits)
00 Record type No. for hex file
aabbccddee....mm Hex data (two hex digit numbers., equal xx)
ZZ Checksum value of all data record digits
. The download function receives from the serial port in this form, interprets it and save it.
The procedure explanation is embedded in the text in appendix. Also a number of
messages are displayed.
jump: routine asks for the address to which it will jump. If escapc(C=l) was pressed, the
program is aborted. If no address was entered (void input, psw.5=l) , the program returns
66
to where it was. When an address is entered the program makes a stack of 8 byte length
and jump to the specified address.
dump: displays 16 lines of 16 address location in hex format, beside it displays the
ASCII equivalent of address contents. The starting address is the content of r6- r7 .
edit: routine edits external ram. It displays a message at the start to let the user enter the
address location he wants to edit. Then it displays the address beside it 's content and ask
the user to enter the new value. When hex characters are entered the routine modifies the
specified location and moves to the next address. If non hex characters entered the
routine displays a message.
dir. routine maps the display formal and send information about the directories in the
memory to the display. It starts by displaying some messages and j ump searching for
headers. It displays the name, value and type of the header it finds. It continues doing
this for the whole user memory.
run: subroutine searches file headers. When it finds a run-program, it prints its name on
the screen in a formatted layout. When il is finished, it asks for the choice to be entered
among the list. If ESC is entered the program return control to the menu, otherwise the
input is matched within some ranges to check it 's compliance with choice list. When it is
okay the headers were searched for the run-programs in sequence. When the search is
successful the function will pass the address to another subroutine (at the end), which
will make a stack of 8 byte length and jump to the specified address.
help: routine is invoked from the menu. It displays help text and j ump lo help2 to give
information about the help.
upld: routine uploads hex files to the serial port. I lex file is a number of data records
terminated by CR and LF. A data record example is as follows:-
•xxyyyyOOactbbccddee mmZZ
where : Start of record
xx No. of data byte (two hex digits)
yyyy Starting address of the record (4 hex digits)
67
00 Record type No. for hex file
aabbccddee... .mm Hex data (two hex digit numbers., equal xx)
ZZ Checksum value of all data record digits
Firstly nplil gets the beginning address in r3/r2 (r2=LSB). and the final address in r5/r4
(r4=LSB), and prints them out beside some messages. Then it reads data from the
specified address, process it, and sends it to the serial port in the above form.
clrm: subroutine clears a memory area. The range is obtained by getjnem subroutine
and the clearance is carried by the smart _wr subroutine. The subroutine will scan all the
range starting from the lower address and going upward till the end address.
nloc: subroutine prompts to the user to enter the new location. If no address was entered
or ESC was pressed the subroutine is aborted.
erfr. subroutine prompts to the user information about erasing some area. If the user
entered ' Y \ erfr erases Hash and ROM. and displays message about erasure or about
error. It uses erall for erasure.
intm: displays the content of 128 internal address locations. It organizes the display in 8
lines, each one showing 16 location content. It carries out the display in two loops one
for lines and the other for frame.
6.1.4 Memory Management Subroutines:-
tlash wait: routine polls the flash ROM wait looping until the flash ROM is stable.
DPTR must be initialized with the address to read.
flash en: routine sends the flash enable codes for writing.
prsm: routine writes Acc into flash memory at DPTR. C is set if error occurs, G is clear
if it worked. The routine uses flash en routine. It calls also flash wait routine after
writing data. The routine then checks the data written to set or reset C flag.
erall: erases all the flash ROM and return C=l if failure, 0 0 if okay. It calls erhlock
for block erasure. Then it scans all the flash area if they are not completely deleted
(deletion = FF) to signal error. When deletion is okay 0 0 otherwise O l (error).
68
erblock: is an erase command. Il is called by erall. and is intended to be callable for the
flash memory so that custom block erase code can be implemented. It uses flash en
subroutine
find: searches for header in the external memory identified by the sequence A5. R5. P.O
and A5. The memory range searched is defined by hinem and emem. The input DPTR
pointing to the start of search address (only MSB used). Output is DPTR location of next
module. C = set if a header found. C - clear if no more headers
smart wr: routine tests the presence of Hash first. If no Hash was found it write to the
ordinary RAM. When a flash was found il checks the address to be written tt). is il in the
flash range or out. When it is inside, it uses prgm subroutine to write it 's contents,
otherwise it writes it 's content in the normal RAM. Writing to f lash ROM or ordinary
RAM will be indicated. Carry bit will indicate successfully written (C=0), or not written
(C=l) .
6.1.5 Power On and Initialization:
poweron: makes the hardware to be initialized by the following routine. Description of
poweron routine is embedded in the text.
stcode: routine is invoked automatically during poweron at the start. This routine will
look for startup specifier (249) among file headers. When it is successful, it saves its
return location and j ump to that startup subroutine. When it returns it continues
searching for others and does the same until all startup routines are finished. At this
moment the function will return back to poweron routine.
aulobaud: routine is invoked automatically during poweron at the start when the
following line
equ baud const, 0 ;flag for automatic baud rate detection
is selected during initialization. To do automatic baud rate detection, measurement and
setting. It is assumed that the user will press the carriage return, which will cause the
below bit pattern to appear on port 3 pin 0 (CR = ASCII code of decimal 13 (OBh)),
69
0 1 0 1 1 0 0 0 0 1
II II start b i t — + +--lsb msb--+ + — s t o p bit
To set the baud rate, the following formula is applied in calculation.
baud const =•• 256 - (crystal/(12 * 16 * baud-rate))
Timer HI is started in 16 bit mode at the transition between the start bit and the LSB and
is stopped between the MBS and stop bit. That will give approximately the number of
CPU cycles for 8 bits. Divide by 8 for one bit and by 16 since the built-in UART takes
16 timer overflows for each bit. After division the result has to be inverted since timer
HI counts up. Of course, timer HI gets used in 8-bit auto reload mode for generating the
built-in UART's baud rate.
6.1.6 Multiplication and Division:
pintSu: prints the unsigned 8 bit value in Ace in base lO.This is carried by dividing the
number by 100 and displaying the quotient (hundredth digit), then diving the remainder
by 10 and displaying the quotient (tenth digit) and lastly displaying the remainder (units
digit).
pint!6u: prints 16 bit unsigned integer in DPTR. using base 10. The function use pintxl6
function to divide the number by 10000 to display 10000th digit, and by 1000 to display
1000th digit, and by 100 to display 100th digit. Then it uses div to divide by 10 to
display 10th digit. Lastly it displays units digit.
pint!6x: divides r2-r3 by r4-r5 and leaves remainder in r2-r3 and returns quotient in
Ace. The division is carried by sequential subtraction.
6.1.7 Multi-byte Sequence and Compressed Data Processing:
tin filter: looks for multi-byte sequences for up, down, left, right, page-up, and page-
down, as well as ordinary escape and ordinary characters. Codes are required to arrive
70
sequentially otherwise the characters are treated as ordinary user keystrokes, cin filler
returns a single byte when it sees the multi-byte escape sequence, as shown here.
return value key escape sequence
11 ( A K ) up 1 B 5 B 4 1
10 ( A J ) down 1 B 5 B 4 2
21 ( A U ) .r ight 1 B 5 B 4 3
8 ( A I1 ) left 1 B 5 B 4 4
25 ( A Y) page up 1 B 5 B 35 7E
• 2 6 ( A Z ) page down 1 B 5 B 3 6 7E
pestr: prints the compressed strings. A dictionary of 128 words is stored in 4 bit packed
binary format. When pcslr finds a byte in a string with the high bit (bil.7) set, it prints
the word from the dictionary. A few bytes have special functions and everything else
prints as if it were an ordinary siring.
Special codes for pcslr:
0 = END OF STRING
13 = CR/FF
14 = CR/LF & END OF STRING
' 31 = NEXT CAPITAL (next word code should be capitalized)
dcomp: actually takes care of printing a word from the dictionary at DPTR position in
packed words table. This function scans the dictionary sequentially till il reaches the
particular word number. Then it reads the nibbles coded in the dictionary location and
translates them using some tables. Then the translated code is printed out. The nibbles
are managed by r4. r4=0 if next nibble is low, 1*4=255 if next nibble is high. It uses
getjiextnibble function to read the dictionary.
get next nibble: gets character specifier from table and update DPI"R and switch nibble
specifier r4.
71
6.2 Prc-design Stage (Structuring and [Modularity):
It has to be staled that the hierarchical organization of the software will not
be noticed in this chapter but the deep investigation of the source code at the appendix
will illustrate that. This will prove the structural and modular nature of the program
which is composed of module and subroutines in hierarchy. The lowest subroutines are
small and general-purpose used by higher-level subroutines. Bach higher-level routine is
more specific to the application. 'litis is due to the considerable efforts devoted to the
pre-design stage of the development cycle which is usually overridden. In this stage the
problem is partitioned into relatively sub-problems. Such modularization led to
reduction in code complexity and better code understandability. Moreover, such
modularization raised the necessity of data structures. That is hierarchical charts
showing the place of each module in the system, as well as the module-calling
convention is used in this stage. Beside that, the interface between the module that
communicate together and description of inputs and outputs of each module is
developed. That is hierarchical structure was the basis of this modular and structured
program.
6.3 Post-design Stage (Maintenance and Modification):
Generally programs do not break-down, all errors were in the program when
it is developed. These errors might be due to coding errors, specification errors or
incorrect assumptions during parameters passing from one module to the other. Anyway
this is minimized by code understandability which is enhanced by clear programming
style mentioned above and combined with comment in each line in the source code in
appendix. This is regarding maintenance while modification can be carried straight
forward by adding the new subroutine and modifying the above flowchart and the jump
table in the source code. Drawing flow charts increases code understandability to the
optimum, but the problem comes in the huge number of pages needed to make such
documentation. However, some samples arc presented here for justification, for
example Figure 6.5 shown below describes the asclhex subroutine.
72
a s c 2 h e x : A S C 2 H E X
c l r c add a, # 2 0 8
Figure 6.5 ase2hex subroutine
Another sample describing pstr is shown in Figure 6.6 below
73
pstr; send string to serial port
mov c, acc.7 smla,#)x7F acall cout
" Cany?
Figure 6.6 pstr subroutine
Another sample describing run routine is shown in Figure 6.7 below
74
IUI1 ,RUN
acall newline2 Iine2 [
nov r2, #255 uov dplr, #binem Jec dph
(list print the menu, count itrins
ftgt, 8) Samp, 255. run2b
J
have w e found 'cm all'.'?
- I * , inc dph mov a, dph
cjne a. #((«neni+1) Sgt sjmp tun 3 Kail find
this one doesn't run .. find nest
print the key to press
and the command name
and continue doing this
m-<. Catty '
Yes
I In
uov dpi, #1 clra move a. (fftndptr oil a, #0000001 lb .:pla
I icall ilspace inc i 2
... inov a. # W »dd a,12 icaQ cout_sp Kcall dash_sp ttov dpi. #32
E ~hcall psl
Kcall nc sir
ncwline
r nin2|—
n.m3 at c Ihet c any to ronW
/
cjne r2. #255, rnn-1 mov dptr, #prompt5 ajmp pcstrj i
<" L a t e ' 1
Figure 6.7 Run routine (continue on next page)
75
T NOV Afttt I¥PI"->MPT3
WALL PC*LR_H
MOV A, if A' WILL CO-IT
Kali ivh
TT»I4 *<K TLW hit; TPW«T».-N'
I N W A . i ' A T
V*ALL EOUT
TNOV DPTR, #PTOMPT4
WATT PCITT_H
CM FILTTT_H
«\-*N TTU V M *JH* CHOW**
:JWT A, I¥2?, WW4*-I
KJMP RMVLUIT
MOV R3, A
NOV a, # 3 1
:LIC
ITM» A, I 2
«U*»V A, I 3
TLWY UWY ITIT V$LT .ESdP-gl
|^ALL UPP*I
C » N V ? >
. 1 . f%ll.'o.it
if ttiavtyp* 4 '! V*J Ih-IN*A*
X T . !«OV a. T3
I'LT*--L: T*T T#* IF IT** IIIVUT
3 2 , IT"*© EONV*TT LO «IPP*TF*A<»
< ' C A N Y ? >
A«3DR2 K U TH* MAXIMUM ITMUF*R Sl3
F3 h*.« tit* »UNB*T TLWY TYP«4
TTVN* * , ( 2
l . C
•IT* A. T3
IF TLWY TYPT'I OR«T TIN M I X
X
Figure 6.7 Run routine (continue on next page)
76
count til we find the one they want
mov dpi, UA clr a
move a. fc$«+dptr
rpl a
inc i 3 movdpU'.flbmem foe dph
cJjnz t3, nui5 icaflnewline mov dpi, #64 ajtnpjumpvdoit
this one doesn't run... find next
Inc dph "-•Hnov a. dph
_ X . sjtnp 11 mS *r-ntt find
>, 8j &4INP, mn5b
CANY? "H'TNL.IN'T ' V I D« THIS
Figure 6.7 Run routine
6.4 Program development
KEIL uVision is the name of software dedicated to the development and
testing of a family of microcontrollers based on 8051 technology, The software can be
downloaded and evaluated from the website. Most versions share merely the same
interface. KEIL uVision is used for the development and testing of our different
subroutine• and the overall program. Here in these paragraphs, the different step
undertaken to carry the development process arc reviewed | 5 | .
6.4.1 Creating the project
To create a project, write and test the previous example source code, open
Keil and start a new project follow the following steps:
77
1- To create a project, write and test the previous example source code, the
follow the following steps in figure 6.8 below | 5 | .
user should
J ^ S ^ i ^ ^ & ^ ^ B B ^ ^ W J ' p*iiP h*"'* I ° ° ' s l y e s hiimIOO H«*
!" ; ,3"2^iT»'tV.J. M,- Components, gnvironmont. Books...
import pVislonl Project...
£ p « n Projoct...
Hi •as
•I U •»
1 C!\«l«ctronics\|iioj»cts\Oir."-Oksol»t»V»i>ti t»st\t»<t.l lo2
2 Cs\«l«CWonicsVproj«ct«\DACOS\OAO rESTIt«3Vl*C.Uv2
3 Cl \«l«ctronics\piojects\DFM01 (rrtqutney m t t « r j \ A T 8 9 C 5 2 \ l V « t tst.Uv2
£ Cl\»lectronlcs\piojects\DrM01 (ti«<iuency m»t«rl\AT8«C52\f(«<i.Uv2
5 C : \oloctronicsVrojoctsWOBOCOtAAl 89(.°S2\cUl«i 2 7 - 1 1 •jnue.llvi § . C ! \ « l « c t r o n l c s \ | > r o J « « s \ D T H E R M O \ A T 8 ? S 5 2 \ H O . « i m o . U v 2
7 C ! \ « 1 « « r o n i c s \ p i o i « c t s \ R O B O C O t l R l \ T . i c ' . i c i i < o n U o l \ A T O ? S S 2 \ e o n U o l l * f . U v 2
8 - C i \ « l « c t r o n i c s \ p r o j e c t s \ R o b o c o n R l _ b « a \ A T 0 9 S 5 2 \ s l a v « . U v 2
2 Cl \*l«ctronlcs\proj«cts\Robocon-Rt_bK»\AT89SS2\M»»Mr_B_2.Uv2
. X° C{\oltctronics\proj«cts\Robocon-Rl_bot»\AT89S32\M»st«r.Uv2
I L L
1
>ste a new project
Fijiure <>.X Clonic new projori
2- The user will be prompted to choose a name for his new project. Create a separate
folder where all the files of his project will be stored, choose a name and click save as
shown in Figure 6.9 below.
78
• Project v;orks
Create Mew Project:
By Recent PocuT-en:*)
Device
My Documents
% Computer
Place* Seve o t>pe. ^ect *. es:'
a d1 ra* Egg
I I T l \ B u i M A Command A fWnFtes /
Figure 6.9 Make new folder
I- The following window in Figure 6 .10 will appear. The user will be asked to select
levice for target 'Target 1':
$ r , .„ . .„ . . . ^ „ . . . . . .
ffll« i *;a«. | ( '£ftM;,Fli«h. P.tlfktr.li Lol. JVC8 Kind.. B«l|>. '.; <- -*-iW1 a>.'iimliTai' A A> t«
r U»Ei«^'Ur*er(L><S1) inU«ado(BL5l . ,
r ll.-f' EiwrMtoJ Auftnbh: &V; | j ; « i4 i1« /A« l
a AT89LV51 ] | Q AT89LV52 | ! a AI89LV55 ' • AT89S2051 , Q AT89S4051 J
l-a AT89S4D12 1 |-a AT89S51 • BWMUH. ] i a AT89S53 1 f Q AT89S8252
1 Q AT89S8253 i ! • ATS«C5122 j AT9tC140
6051 b«i^Fi<Sl<A:CMOSc<>«i<iteivith'lhiM'L«nlPlogiMi . Moraylock. 32I/Otwt,3TiMtt/Counien.'8 iMemptaSoucM. :
i r^^^^^W '^fSr - ' ' ' '" I •••'OK f - Cancel |" ' •• ' • ' • He*
II'I,,' i I
•'imiie 10 Select <lovio
79
4- From (he lisl at the left, select brand name ATMEL. then under ATMUL, select
AT89S52. A brief description of the device appears on the right. Leave the two upper
check boxes unchecked and click OK. The AT89S52 will be called your 'Target device',
which is the final destination of your source code. The user will be asked whether to
'copy standard 8051 startup code' click No.
5- Then click File. New, the following window in Figure 6.11 should appear. 'I"he box
named 'Text l ' is where your code should be written later.
^;ii^)^:fj^^^^^^{';p^Mlis . Ioo'ls . $ V C S Window M«lp
i' G ? B 0 , i ' ^ . t e ' i 'S ' i :W if A % % * %\ "
'iJ*#-V"A"" few---
U s 'Text l
1 K f l l l H H
# 1 > (Simulation-
l-'if.uiv ( t . 11 Make new fik
6- Use 'Save as' and choose a file name for your source code ending with the letter
'mm', 'monlest' for example.
80
7- Then add this file to your project work space at the left as shown in Figure 6.12. by
pointing the mouse to source group 1 in project work space, and right mouse click.
wtorlsl_l - pVtsfon 3 iini • i . . . . . . . ^ n , „, ^^^^^^•>:>^-Yrii"*.
I I Target 1
1 ! So'urc« <3>oup n mm Options for Group 'Source Croup 1'
g*buiW target
; £ | y ftuildttrott
Hew Group
Add File* to Gioup 'Source Group 1*
' tSl ld* r > a 9* Components
; R«mo«« Group 'Some* Group I ' »nd its nl«s
ln,c1udt D«p«ndtnci*s
1
1 mprpnrJT
ISmulation
Figure 6.12 Adit life m l.'inid
After right-clicking on 'source group / ' , click on VlriV//7/t«.y to group...', then you will be
prompted to browse the file to add to 'source group 1', choose the file that you just
saved, eventually 'montesl.asm' and add it to the source group. You will notice that the
file is added to the project tree at the left.
81
8- Make sure that option to generate HEX file is turned ON. This is done by right-
clicking on target 1, selecting Options for target 'target 1*, then clicking 'output' tab.
Check the box 'generate HEX file' as shown in Figure 6.13. This step is very important
as the HEX file is the compiled output of our project that is going to be transferred to the
microcontroller |5J.
Options for Target 'Target T
Device | Target Output J Ustm g j User | C51 | A51 | BL51 Locate j BL51 Msc | Debug | U M e t |
Name of Executable: r;'"*" r2
m
Select FoWerforObjects..
• Create Executable: .vnonitorz
P Debug Information S* Bra-.vse Information
| P Oeate HEX File H E X Format:
<" Create Ubrar/: .'mon<tor2.L!B I ' Create Batc'i Fi'e
Figure 6.13 Create hex file window
9- Now the user can start to write the source code in the window tilled 'monies!.asm'
Then before testing the source code, the user have to assemble your source code, and
correct eventual syntax errors. In KEIL IDE. this step is called 'rebuild all targets' and
has this icon: S .
82
6.4.2 Building the project
The user can use the output window to track eventual syntax errors as shown
in Figure 6.14 below [5J.
monteit - nVfs!on3 - [C:\Dpcutnerits and totlr>gsVibdulmori^mVD«ktop\coskiiri»moiKHm\8051n)oi).asm)
j)Efe Eit &oject BfibuQ Flash Periphwa's I o * S'.'CS 'Mo--' t£%>
$ Kl 0 Hi : :•
i 09 a <a !|lpl'•:•>
ijectivori-space
tMa)
0529 0530 0531 0532 0533 0531 0535 0536 053? 0539 0539
El SC51W. [
3C
x c h •>, r l
a o a l l
n<->\' a , r 2
s w a p a
o r ! a . r 3
2 3 5 I r . c r . . a e r . i - H 7 l t : e r r c r > . ? : syrrrAX S ? * C R S v S l r c o r . . a « r . f : e r r o r ^ 2 : S T ? ~ . ^ T : F - . * I ' . * A 7 " ; : , s : r . e r . . a s B H « ' H i : w a r r . i r .e A 4 i ; : : i s s : : : 3 'E::B- 3rATE : - !s: :r T a r g e s n o t c r e a s e d
<_|} \> f \Bui ld / .Command A F»ri« l?»" /
I ieiiif (>. I ) Ituikliiu*. p ioccss
JaJxl l
If after correcting errors and rebuilding the targets, the 'output window' shows that there
is 0 error, then the user is ready to test the performance of his code. In keil, like in most
development environment, this step is called Debugging, and has this icon: 'Si.
6.4.3 Debugging the project
After clicking on the debug icon, the user will notice that some part of the
user interface will change, some new icons will appear, like the run icon circled in
Figure 6.15 below:
83
j n r w n t e s t - „ } i V i s f o n 3 - [ C : \ D o c u i n e n t s a n d S ^ n g s t a t H f u l m o n e i m X D e s k b ^ f
I ' i^iMV 6.15 l ) c h i i i : s . ' . i n < . " . p m c i "
The user can click on the 'Run' icon and the execution of the program will start. In this
example, the user can see the behavior of the pin 0 or port one as shown in Figure 6.15
above, by clicking on 'peripherals. I/O ports. Port 1'. The user can always stop the
execution of the program by clicking on the stop button ( O ) and he can simulate a
reset by clicking on the 'reset' button rJ t . He can also control the execution of the
program using the following icons: ^ ^ ^ which al lows the user to follow the
execution step by step. Then, when he is finished with the debugging, he can always
return to the programming interface by clicking again on the debug button (@L).
84
Chapter Seven
Results and Discussion
The source program was built using uvision development tool and then tested
(Figure 7.1 and Figure 7.2 below) [7].
QZE9D0SI
- S_I T*IM I
CI
"B j tt tU »» ^ . Build t«cget 'Tarftct 1' nssembllug moitl. *>•»... U n k i n g . . . FtOflCMx 3i*»t dat«-8.0 Kd«t(.-0 cod<!*30." •123" • 0 Krrorto), (I tKtrnlneto) •
H~
Figure 7.1 Building the project
E<# V«W> D«MTT ORTMQ PMR^VALT LOCK SVCS WIDOW TJT»
PrOled, WMfeJfttCW - * J TMMM I
load **C:\\t>oci«nj*nt» *nd 3»*tt.«o*\\c©9kt)n_1j*J
ASM ASSIGN BrRthMonble IttenhRimltle •< I ' I - 1 . K WNM X(<MIW»MMI X risdkililM VII « f
Figure 7.2 Testing the project
85
All features of the program that do not require external RAM were tested using the
simulator and found perfect; for example:
Help command of the program when tested showed the result in Figure 7.3.
,= U ART. 01 -8 0 5 1 M i c r o p r o c e s s o r M o n i t o r i n g L e a r n i n g » B o a r d
A D D R : 8 0 0 0 s m o n » H e l p
S t a n d a r d C o m m a n d s ? - T h i s h e l p l i s t H - L i s t p r o g r a m s R - R u n p r o g r a m L - D o w n l o a d U - U p l o a d N - N e w l o c a t i o n J - J u m p t o m e m o r y l o c a t i o n H - H e x d u m p e x t e r n a l m e m o r y I - H e x d u m p i n t e r n a l m e m o r y E - E d i t i n g e x t e r n a l r a m C - C l e a r m e m o r y
U s e r I n s t a l l e d C o m m a n d s
ADDR: 8 0 0 0 £ m o n » ADDR: 8 0 0 0 « r o o n »
•
V
Figure 7.3 Running of the Help command of the program
Internal memory display in which the program displays the contents of the internal 256
RAM area showed the result in Figure 7.4 [7J.
•• UAUt #1 .. , A D D R : 0 0 0 5 £ m o n » H e x d u m p i n t e r n a l m e m o r y
0 0 : 0 0 0 0 0 1 OB 4 3 0 0 0 5 0 0 B 6 0 8 0 0 0 0 0 0 1 0 : 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 no 2 0 : 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 0 : 0 0 DF 0 1 8 2 0 7 0 7 8 4 0 1 4 3 BE OE EA OA 4 0 : 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 0 : 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 0 : 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7 0 : 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FA FA AF FA 0 0 BO: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 9 0 : 0 0 0 0 . 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AO: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BO: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CO: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DO: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EO: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 r o : 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
A D D R : 0 0 0 5 « r o o n > > |
0 0 0 0 0 0 0 0 0 0 no 0 0 0 0 0 0 0 0 OA 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 7.4 Running the displays to see the internal RAM
86
Clear internal memory feature in which the program will clear the internal RAM showed
the result in Figure 7.5 [7]
39E1 40 0 0 00 0 0 00 00 00 00 00 0 0 00 0 0 0 0 00 0 0 0 0 0 0
so 0 0 00 0 0 00 00 00 00 0 0 00 0 0 00 00 0 0 0 0 0 0 0 0 60 00 00 0 0 0 0 00 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7 0 0 0 0 0 0 0 0 0 0 0 00 0 0 0 0 FA FA AF FA 0 0 0 0 0 0 0 0 8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Of)
9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
AO 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
BO 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CO 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 o u DO 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EO 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FO 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
A D D R : 0 0 0 5 s m o n > > C l e a r m e m o r y
F i r s t L o c a t i o n : 0 0 0 0 L a s t L o c a t i o n : FOOO A r e y o u s u r e ?
ADDR: 0 0 0 5 6 n r o n »
Download, upload, directory, run, jump, dump, edit and erase commands could not be
tested at this stage as they need external memory. In fact some steps were taken in all
these features until encountered by the lack of external memory, hence aborted by
escape character. This is clear evidence that it is running perfectly.
Using EPROM programmer the HEX file of the source at the appendix was loaded in
8952 microcontroller chip which contains 8Kbyte Hash memory for holding the
program. Then the chip is inserted in the circuit described in Chapter 2. Making serial
connection between the host PC and the circuit, and then powering up the circuit are the
only two steps needed. Using the hyper terminal in (he host PC for communication the
test went on as expected as follows when the circuit is powered on the hyper terminal
received some characters from the monitor indicating communication and waiting for
baud rate measurement. Pressing carriage return makes the monitor enter baud rate
measurement and respond by welcome message:
Figure 7.5 Display of the clear command running
87
Downloading some program using L command resulted in successful download as
shown in Figure7.6.
W e l c o m e t o MON2
8 0 5 1 M i c r o p r o c e s s o r M o n i t o r i n g L e a r n i n g « B o a r d
P r o g r a m N a m e l i s t S i n g l e - S t e p M e m o r y E d i t o r ( V T l O O )
L o c a t i o n T y p o 1 0 0 0 1 4 0 0 1 8 0 0
E y. I. e r 11 n 1 <: oiniti a n d E x t e r n a l c o m m a n d E x t e r n a l c o m m a n d
ADDP. L o c : 2 0 0 0 > D o w n l o a d
B e g i n a s c i i t r a n s f e r o f I n t e l e x f i l e , o r E S C t .o a ) > o r t
D o w n l o a d c o m p l e t e d
S u m m a r y : 1 1 4 l i n e s r e c e i v e d
1808 b y t e s r e c e i v e d 1808 b y t e s w r i t t e n N o e r r o r s d e t e c t e d
When the RAM is not working properly, an error like (Unable to write) should appear.
Other errors such as checksums, unexpected hex digits are indicated as download
problems.
Running the user program command using R showed what is shown in Fig(7.7) below.
To run the example without a header, use the "Jump" command by pressing "J".
Program will ask you for the address where it will j u m p to run the program. You can
type 2000 or just press enter if the default value is 2000.
J
(C JnecTed 0 : 0 3 : 2 3 " ' JAuto delect"~ |57BW 8-N-i
Figure 7.6 Downloading some program
88
seiial_poit - HypeiTetminal BIQ0E3 EJe Edit Vjew £a» Itarofet Help M*wwwJ*lwrtl MwmAiiflrtiJ IWIIWIIMMHIIM *m*mmm "
31 A P D R L o c : 2 0 0 0 > J u i n p t o m e m o r y l o c a t i o n
J u m p t o m e m o r y l o c a t i o n ( 2 0 0 0 ) , o r E S C to q u i t : i ' 0 0 0
r u n n i n g p r o g r a m :
P l e « « « *"yr« a w o r d ( 4 c h a r m a x ) : TKOT
iHtititltlt!! MMUM Mtiltlftt HttittiUM #n#ifit1f1t ####### ####### MfMM
## ## ## ## ## ## ## ## ## ###### ##### ## ## ## ## ## ## ## ## ## ## ####### ####### ## ## ####### ###### ##
P r e s s a n y k e y _
C6Wledft11:29 • •: TiAutodeled"' (57600Wfl {lE&OtI."*'|?>JPT'fRFsT*JC*'*|Ff,-«*;i I'igure 7.7 Running some user program
It has to be mentioned that the serial port is used by the monitor program for
communication with the host PC; therefore the user should be careful not to change the
baud rate and he should be capable of differentiating between communicating with
monitor or the user program. Also the hardware can be developed by adding another
serial port connector which the user can use freely. Beside this some Programmable
Peripheral Interface (PPI) integrated circuits like 8055 can be added to the circuit which
allows the user to connect parallel input and output devices like switches and displays.
This can be very useful for troubleshooting beside the serial port. This monitor program
is designed for using flash memory and static RAM in the external memory. The flash
memory (although not present now) is very useful for storing program in the absence of
power. In this case all flash parameters have been defined in the source code as required
and the (has_flash) parameter should be changed to one. When flash is added also flash
erase facility is also imported and should be added using a jumper or push button as in
some cases the user need to erase the flash content on reset. To load a program in the
flash region it has to be built in the memory range of the flash; therefore the flash range
89
(eflash and bflash) in the source code need to be known by the user and considered in
making the hex file.
Single stepping and tracing (the most powerful tools for debugging) could not be
executed by this program because they are not included in the program. This is due to
the fact that this program is terminal-based monitor, while single stepping and tracing
require IDE-based monitor in which the user interface communicates with the monitor
by a series of characters rather than single character as in terminal-based monitor.
However this program can be developed to achieve single stepping and tracing if
thorough investigation is carried out for IDE based communicat ion protocols.
90
Chapter Eight
Conclusion and Recommendations
Results found in the last chapter indicate that the emulator developed
is working properly. Regarding user program downloading, uploading, displaying
memory area, jumping to source location, editing, running .displaying directories,
erasing, and displaying internal memory showed excellent results.
Although emulation capabilities are limited in the above features only, they are
quite enough for debugging significant portion in the emulation process. It worth
mentioning that, the work targeted exploration of the emulation process assisting in the
development of microcontroller based equipment. It ended up with different strategies
for debugging and different approaches, not expected, aiming to incorporate the
necessary hardware and software for debugging inside the microcontroller itself. This is
why the work concentrated on basic emulation feature and left advanced emulation
features like single stepping, tracing and pausing for future work. This could be
accomplished if some host PC emulation program is developed or studied thoroughly and
this monitor program is modified lo carry out more intelligent communication with the
new PC environment.
Furthermore this study could be nucleus for source-level debugging investigation which
is optimum debugging when under stood, taking in mind recent trends for debugging and
emulation.
It is inevitable to mention here the advantages of such emulator regarding simplicity
and low cost while the disadvantages arc the following limitation:
1- Not supporting source-level debugging
2- Hardware restrictions such as external RAM requirement and serial port set up.
2- Commands many need modification.
4- General purpose resources like the serial port is used for debugging so it must not
be used in the application.
5- Applications must be coded according to the monitor coding style .
91
As a conclusion this work tried to disclose emulation of 8051 microcontroller so as to
facilitate the debugging process and fortunately achieved significant success and
hopefully pointed out some point as recommendations for further investigation.
92
REFERENCES
1. 8051 Tutorial, Vault Information Services, 1999.
2. Eight-Bit 80C51 Embedded Processors. A M D Corp.. 1990.
3 . 8-Bit Embedded Controllers, Intel Corp., 1990.
4. 8-Bit Embedded Controllers Handbook, Intel Corp., 1998.
5. Getting Started and Creating Applications. Keil I Iser's Guide 2000.
6.1 leffcrnan, D., 8051 Tutorial, 2002.
7. Keil uVision IDE A S M compile tutorial, Hi-Tronic, 2005.
8. Karakehayov, Z., Christensen, K. S., Winthcr, (). , Embedded System Design with
8051 Microcontroller: Hardware and Software, 1999.
9. 80C51 family and hardware architecture. Philips Semiconductors. 1996.
10. 80C51 family programmer 's guide and instruction set. Philips Semiconductors.
1995.
11 . Microcontroller Users ' Guide, Signctics Corp., 1989.
12. Steiner, C , The 8051/8052 Microcontroller: Architecture, Assembly Language,
and Hardware Interfacing.
13 . Yeralan, S., Ashutosh, A.. Programming and interfacing the 8051
Microcontroller, Addison Wesley Publishing Company, 1995.
14. Douglas V. Hall, Microprocessors and interlacing Programming and hardware,
McGraw- Hill Book company, 1986.
15. URL: http://www.futurlec.com Augst 2008
16. URL:http://www.farnel.com/datashcct June 2008
17. URL:http//wvvvv.NXP.com June 2008
18. URL:http//www.faq.om/microcontrollcr Augst 2008
19. URL:htto//www.spvfu.com Augst 2008
20. URL:http//www.patents.com Atmst 2008
93
Appendix A
Terminal b a s e d Monitor program s o u r c e code
I n i t i a l i z a t i o n p a r a m e t e r s a n d . I n t e r r u p t V e c t o r s
T h e s e t w o p a r a m e t e r s c o n t r o l w h e r e MOM2 w i l l b e a s s e m b l e d , a n d w h e r e i t : w i l l a t t e m p t t o LJMP a t t h e i n t e r r u p t v e c t o r l o c a t i o n s .
b a s e e q u 0 x 0 0 0 0 ; a d d r e s s l o c a t i o n f o r MON2 v e c t o r e q u 0 x 2 0 0 0 / a d d r e s s l o c a t i o n t o LJt-H' i n t e r r u p t , v e c t o r ; :
/ T h e s e t h r e e p a r a m e t e r s t e l l MON2 w h e r e t h e u s e r ' s m e m o r y i s i n s t a l l e d . ;"emem" d e f i n e t h e s p a c e t h a t w i l l b e s e a r c h e d f o i p r o g r a m b e n d e r s , u s e r ; commands , s t a r t - u p p r o g r a m s .
pgm e q u 0 x 2 0 0 0 bmem e q u 0 x 1 0 0 0
• emem e q u O x F F F F
'bmem" a n d i n s t a l l e d
/ d e f a u l t : a d d r e s s l o c a l i o n t o r t h e u s e r p t . o q r a m ; t h e b e g i n n i n g o f e x t e r n a l m e m o r y ; e n d o f e x t e r n a l m e m o r y
;To s e t t h e b a u d r a t e , u s e t h i s f o r m u l a o r s e t ; = 2 5 6 - ( c r y s t a l / ( 1 2 * 16 * b a u d - r a t e ) ) . ;Most e m u l a t i o n p r o q r a m s i n t r o d u c e i n t e n t i o n a l
t o 0 t.oi a u l . o d e t e c t i o n b a u d c o n s t
d<> 1 .!\ wh'Mi S ' M i d i n q n s c i i . d a t a , ;which y o u w o u l d w.mL t o t u r n o i l (<>i d o w n l o a d i n g l a i ' . i " » p i o g i a m s i n t o RAM. ; f l a s l i ROM, t h e max imum s p e e d i s s e t b y t h e t i m e it t,\i:>-:; t o p r o g r a m o . - fh . • l o c a t i o n .
Ko r
b a u d _ c o n s t b a u d _ c o n s t b a u d _ c o n s t b a u d _ c o n s t b a u d _ c o n s t l i n e d e l c i y
e q u e q u e q u e q u e q n e q u
0 2 5 5 2 5 3 2 5 2 2 4 3 6
/ f l a g f o r a u t o m a t i c b a u d r a t e d e t e c t i o n ( w h e n 0) ; 5 7 6 0 0 b a u d - r a t e w i t h 1 1 . 0 5 0 2 Mllr. , 1 9 2 0 0 b a u d - r a t e w i t h 1 1 . 0 5 9 2 MHz , - 1 9 2 0 0 b a u d - r a t e w i t h 1 4 . 7 4 5 6 MHz ;480f t b a u d - r a t e w i t h 12 MHz ; N o . o f c h a r t i m e s t o p a u s e r i m i n g u p l o a d s
; These a r e f l a s h ROM p a r a m e t e r s . I f " h a s f l a s h ' , ' f e a t u r e s a r e t u r n e d o f f , o t h e r w i s e " b f l a s h " anr /memory r a n g e w h i c h i s f l a s h ROM. ; " e r a s e _ p i n " a l l o w s y o u t o s p e c i f y t h e b i t a d d r e s s .•will t e l l MON. t o e r a s e t h e f l a s h ROM c h i p w h e n i t ;you d o w n l o a d p r o g r a m s w i t h t h e " s t a r t - u p " b o n d e r s ; in t h e f l a s h ROM c r a s h e s .
i s s e t t o z e r o , a l l f l a s h rem " o f l a s h " s h o u l d s p e c i f y ' b e
f o r a p i n w h i c h ( i f h " Id l ow) s t a r t s u p . T h i s i s u s e f u l i i
o n t.bem a n d I h e c o d e y o u ' v e pui
h a s _ f l a s h b f l a s h e f l a s h e r a s e _ p i n e r a s e p i n
o q u e q u e q u e q u e q u
0 / f l a s h i n s t a l l e d f l a g ( w h e n no t . Z>MO) 0 x 8 0 0 0 / f i r s t , m e m o r y l o c a t i o n o l F l a s h R O M OxFFFF / l a s t m e m o r y l o c a t i o n of. F l a s h R<>K
0 ; 0 0 - d i s a b l e e r a s e p i n f e a l u i . o 0 x B 5 ; B 5 = p i n 1 5 , P 3 . 5 (Tl.) ( e r a s e p i n a d d r e s s )
/ S p e c i a l f l a s h ROM p r o g r a m m i n g a d d r e s s e s w e r e met. b y b a s e a d d r e s s a d d e d t o f l a s h ;memory r e g i s t e r a d d r e s s e s . T h i s i s d o n e f o r f l a s h ROM e n a b l i n g , w r i t i n g a n d / e r a s i n g .
f l a s h _ b a s e e q u b f l a s h / f l a s h s t a r t - 0 x 8 0 0 0
f l a s h _ e n l _ _ a d d r e q u 0 x 5 5 5 5 + f l a s h b a s e / s e n d d a t a t o a d d r . f o r f l a s h e n a b l e f l a s h _ e n l a d d r e q u 0 x 5 9 5 A + f l a s h b a s e / d i f f e r e n t , f l a s h v e r s i o n f l a s h _ e n . l _ d a t a e q u OxAA
f l a s h _ e n 2 _ a d d r e q u 0x2AAA + f l a s h _ b a s e / s e n d d a t a t o a d d r . f o r f l a s h e n a b l e f l a s h _ e n 2 _ a d d r e q u 0 x 2 6 A 5 + f l a s h _ b a s e / d i f f e r e n t f l a s h v e r s i o n
94
/. I a s h o n 2 da i a qu f'.xf.:.
C l a s h wr a d d r o q u ()xr>i>5!> ' I l.eish b a s e ;N<MI'I l r Lash wr a d d r o q u 0x5<-*5A + f l a s h b a s e / d i f f e r e n t f l a s h w> d a t a , OxAO
•> a d d r . Cm i . l a s h v e r s i o n
! a:;h wr i t<
CJ a s h o r I a d d r o q u 0x!°-> i f l a s h b a s e / s«=nd d a t a t . o a d d r . f o r C l a s h e r a s u r e f l a s h e r l a d d r e q u Ox.'^'vA » f l a s h b a s e ; d i f f e r e n t f l a s h v e r s i o n f l a s h _ e r l _ d a t a e q u 0 x 8 0
f l a s h _ e r 2 _ a d d r e q u 0 x 5 5 5 b t f l a s h b a s e ; s e n d dat .a t o a d d r . f o r C l a s h e r a s u c f l a s h _ e r 2 a d d r e q u 0 x 5 9 5 A t f l a s h b a s e / d i f f e r e n t l l a s h v e r s i o n f l a s h e r 2 d a t a e q u 0 x 1 0
;Koy do f i n i . l i on: . - f o j MOM. i h e l p k e y o q u / h e l p .••croon
• d i r k e y Oqll •M' ; d i I o i -1 n r y
r u n k e y oqu ' R' ; r u n p r o q r a m d n t d k e y e q u • IV / d o w n l o a d u p l d k e y e q u • u * ; u p l o a d n l o c k e y e q u 1 M' / n e w memory l o c . i t i • >ii jump . k e y o q u ' J ' / j u m p 1 " memory lo<vi» i o n <.lurap k e y e q u * i r ; h e x <lump m e m o t y in tra k e y o q u ' i • ; h e x dump i n t e r n a l ; ; emoty
e d i t k e y e q u ' E ' / e d i t memory c lrm__key e q n ' C ; c l e a r m e m o i y e r f r _ k e y e q u ' Z ' / e r a s » f 1 a s h r om
;Tiniing p a r a m e t e r s f o r s o m e f l a i l ROMs. ; p g m w a i t e q u J 0 ; 2 2 . 1 1 8 4 MH:-. c r y s t a l a s s u m e d ( d e l a y ? M.
p g m w a i t e q u 19 ;1.1 . 0 5 9 2 MHz v e r w a i t e q u 5
; e r w a i t l e q u '10 ; f o u r t y de lay . - - 0 2 2 . 1 1 K 4 MH:-. e r w a i t l e q u 2 0 ; t w e n t y d e l a y s f o r 1. I.0T>"2 MH?.
; e r w a i t 2 e q n 22 9 ; o a c h d e l a y . ' > m s (J22 . 1 11'< 4M11 /.
/These s y m b o l s c o n f i g u r e MON i n t e r n a l monuuy u s a g e . psw i n i t e q u 0 ; v a l u e l o r psw ( w h i c h r e u b a n k t o u s e ) d n l d _ p a r m e q u 0 x 1 0 ; b l o c k o f 1 <*> b y t e s f o r d o w n l o a d s t a c k e q u 0 x 3 0 / l o c a t i o n o f t h e s t a c k b a u d s a v e e q u 0 x 7 8 r s a v e l o c a t i o n f o r baud-'*on.-*t warm b o o t , (4 b y t e s )
;The f o l l o w i n g map s o m e MOM s u b r o u t i n e s o r g l j m p
o r g l j m p
r 6 r 7 t o d p t r : mov mov r e t
o r g
b a s e p o w e r o n
b a s e I 3 vect .orH 3
d p i , r 6 d p h , r7
b a s e i 11 v e c t o r - i - l ]
; s t a r t from b a n e ; j u m p t o p o w e r on r e s e t : v e c t o r
. * * * * * * * * * * * * * * • * * * • * * * * * * * * . / s t a r t , from b a s e t ' ; jump t o e::t i n t o v e c t o r
. * > * * * * * * * * * * * * * * 4 * 4 * 4 1 *• * l .
; e < > u v M ; t r ' " i d r 7 i n t o d p t i
/ m o v e rti t o d p i / m o v e rG t o dph / r e r u r n
* * * * * * * » * * * . A * * * * * * * * * * * . * .
/ s i . a r t from b a ' II ; i u i n p t o t i n t ' M 0 \ - . > c l o t
d p t r t d r 6 r 7 : mov mov r e t
r 6 , d p i r 7 , d p h
/ c o n v e r t d p t r . i n t o i:6 a n d r l /move 1 d p i t o t:C / m o v e dpli t o r7 / r e t u r n
95
o r g l j m p
clash: mov ajmp n o p
o r g l j m p
c o u t _ s p : a c a l l a jmp n o p
o r g l j m p
d a s h _ s p : a c a l l a jmp n o p
o r g 1 jiiip
b a s e ^19 v e c i '.r:+l
a , » ' - ' C O t . l t
b a s e t 2 7
v e c t o r + 2 7
C O U t
s p a c e
b a s e i 3 5
v e o t . o r + 3 5
d a s h
s p a c e
b a s e i 4 3
v e c t o r * 43
/ s t a r t - t rom b a s e i 1-i / j u m p t o oxt i n t l v e c t o r
. 4 * * * * * * * * * * * * * * * 1 * * •* * * » * * .
; l o a d (••) i.nl o A / j u m p t o output : e h a i a e t e r ( - ) / n o o p e r a t i o n
. * * * * * * * * * * * * * * * * * * •* * * I - * - - * .
/ s t a r t I 'ram b a s e i 27 / j u m p ti> t i m e r ! v e c t o r
.*****•**•** + ****+*••*•*•»< ***** . / c a l l con!: t o o u t p u t ; e h a r a e i o i / j u m p t o d i s p l a y a s p a c e / no o p e t a I i * h i
* * * * * * * * * * * * » * * * * * * . * * * *•* . .
/ s t a r t t rom b a s e '• 35 / j u m p t o u a r t v e c t o r
. * * * * * * * * * * * * * * * * * * * * * * * * * . / c a l l t o d i s p l a y d a s h / j u m p t o d i s p l a y s p a c e / n o o p e r a t i on
. * * * * * * * * * * * * * * * * * * * * * * * , * . f *
/ s t a r t front b a s e i 4 3 / jump t o timer;*, vec t . ru (fcor>.>)
.lump T a b l e Lot F't out am'.-. "nbroiit . i t i e s f a l l s
/Never c h a n g e t h i s l i n e ! ! O t h e t pt.ogt. ims d e p e n d on t h o s e l o c a t i o n s t o a c c e s s mon / f u n c t i o n s .
org base- i 4 6 ; st a r t a jmp p h o x 1 /*-:!•:; ( o o t 4< ajmp c o u l ; 3 0 a jmp c.i.n / 32 a jmp p h e x / 3 4 a j m p p h e x 1 6 ; 3 6 ajmp p s t r ;3ft a jmp g h o x ;3A a j m p g h e x 1 6 ; 3C ajmp e s c /4F, a jmp u p p e r ; 4 0 l j m p a u t o b a u d ; 4 2
pcs tr_h: I j m p p e s t r ; 4 5 • a j m p n e w l i.ne / 4 0
l j m p l e n s t r / 4A I j m p p i n 1811 / 4 n l j m p p i n t s / 50 I j m p p i n t : lt'iu ; 5 3 l j m p cmar 1. wi ; 5 0 l j m p prgm ; 5 9 l j m p e r a l l ;5C l j m p f i n d / 5 F
cin_f i l t e r _ h : l j m p c i n _ f t I t e r ; 6 2 ajmp a s c 2 h e x ; 6 5 l j m p e r b l o c k ; 6 7
S e r i a l 1 / 0 S u b r o u t i n e s
; c i n r e c e i v e - a o h a 1 n o t e r from t h e s e r i a l por<
c i n : j n b c l r mov r e t
r i , «.:in r i
. a , s b u f
; .1 o o p i l r o c t t i v o i n t e r r u p t f l a g n o t s e t ; c l e a r r e c e i v e i n t e r r u p t f l a g ; p u t s e r i a l b u f f e r i n t o A ; r e t u r n
; d s p a c e s e n d s d o u b l e s p a c e s t o t h e s e r i a l b u f f e r
d s p a c e : aca.l I. s p a r e s p a c e : mov a , I! ' ' c o u t : _ j n b t i , c o u t
c l r t i mov s b u f , a r e t
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ghex g e t s 2 d i g i t h e x number from s e r i a l p o r t . (' - s e t .if. KSC p r e s s e d , c l e a r e d o t h e r w i s e , p s w . 5 ~ s e t i f r e t u r n p r e s s e d w i t h o u t , i n p u t , c l e a r o t h e r w i s e .
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c l r a / c l e a r A r e t /RET urn c j n e a , # 1 3 , g h e x S h / j u m p i f n o t a c a r r i a g e r o t n i n s e t b p s w . !'i / s e t THE u s o t 1 ie 1 i n e t 1 1 ! a q c l r c / c l e a r c c l r • a / c 1 e a t A r e t / ROT 1.11 11 mov r 2 , a /move ch . u tmsb) i nt •• 1 2 aca . l I a s c 2 b e X ; c o n v e r ! a s c i i t o h e x t o c h e c k
qhex i - ' c / j ump i ! n e t h e x x c h a , I:2 /EXCHAIKI .i h e x c h a r (msb) and c h a r a c a l l c o u t / d i s p l a y c h a r (msb)
a c a l ! c i n _ l i 1 tot . h / u e r s e c •nd d i t | i •• (isl-)) a c a l l u p p e T: / c o n v e r t TO u p p e r c a s e c j n e a , # 2 7 , g h e x S k / j u m p i1 NOT e s c a p e c h a r s j m p a h e x B d / j uinp i f e s c a p e c j n e a , # 1 3 , ghexi im / j ump i. f n o t a c a r r i a g e r e t u r n
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s j m p g h e x 8 c ; j u m p b a c k g h e x 8 p : c j n e a , 921, g h e x B q ; j u m p i f n o t a n e g a t i v e a e k n o w 1 e d g e
s j m p g h e x 8 n ; j u m p i f n e g a t i v e a c k n o w l e d g e g h e x 8 q : mov r 3 , a ; m o v e c h a r ( I s b ) i n t o r '<
a c a l 1 a s c 2 h e x / c o n v e r t a s c . i l t o h « x t o c h e c k j o g h e x 8 j / j u m p i f c a r r y (non h e x o n a r ) x c i i a , r 3 / e x c h a n g e h e x c h a r ( I s b ) a n d c h a r ( I s b i a c a 1 1. c o u t / d i s p l a y c h a r M s t o mov a , r 2 / m o v e h e x c h a r (msb! i n t o A s w a p a / s w a p A ( e x h a n g o t h e n i b b l e s ) o r l a , r 3 / o r A vi i V i i h e x c h a r t I s b ) c l r c / c l e a r c r e t / r e t u r n
g h e x l 6 g e t s 4 d i g i t , h e x number f rom s e r i a l p o r t . (' - s e t i f ESC p r e s s e d , c l e a r e d o t h e r w i s e , p s w . 5 — s e t i f r e t u r n p r e s s e d w i t h o u t i n p u t , c l e a r o t h e r w i s e .
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mov i :3 , 110 / c l e a r r? mov r 4 , #4 / n u m b e r o f d i g i t s l o f t . c l r p s w . 5 / u s e r d e f i n e d f l a g b i t
g h e x 1 6 c : a c a l i c i n f i l t e r h / s e r i a l i n p u t a c a l 1 u p p e r / c h a n g e i n p u t c h a r t o u p p e r c a s e c j n e a , i f27 , g h e x l 6 d / j u m p i f i n p u t , i s not. a n e s c a p e s e t b c / h a n d l e e s c k e y c l r a / c l e a r A mov d p h , a / c l e a r dph mov d p i , a / c l e a r d p i
• r e t / r e t u r n g h e x l 6 d : c j n e • a , If8, g h e x l f i f / j u m p i f t h e i n p u t not a b a c k s p a c e
s jir.p g h e x 1 6 k / j u m p d o w n , s i n c e b a c k s p a c e g h e x l 6 f : c j n e a , # 1 2 7 , gh.ex.16q / j u m p i f i t 127 g h e x l 6 k : c j n e r 4 , # 4 , g h e x l 6 e / j u m p i t s o m e d t q i t s e n t e r e d
s j m p g h e x 1 6 c / j u m p i f n o d i g i t , e n t e r e d g h e x l 6 e : a c a l l c o u t / d i s p l a y i n p u t
a c a l l g h e x l 6 y / d i v i d e b y 16 i n c r 4 / i n c r e m e n t r4 s j m p g h e x l 6 c / j u m p t o g e t . a n o t h e r d i g i t
g h e x l 6 g : c j n e a , # 1 3 , g h e x l 6 i / j u m p i f n o t c a r r i a g e r e t u r n k e y mov d p h , r 3 / m o v e r 3 t o d p h mov d p i , r 2 / m o v e r 2 t o d p i c j n e r 4 , » 4 , g h e x l C h / j u m p i f s o m e d i g i t s e n t e r e d c l r a / c 1 e a i A raov d p h , a / c l e a r dph mov d p i , a / c l e a r d p i s e t b p s w . 5 / s e t g e n e r a l p u r p o s e j t i t e r r u p t
g h e x l 6 h : c l r c / c l e a r c r e t / r e t u r n
g h e , x l 6 i :mov r 5 , a / k e e p a s c i i v a l u e o f t h e d i g i t a c a . 1 1 a s c 2 h e x / c o n v e r t t o h e x j c g h e x l 6 c / j u m p i f n o t h e x x c h a , r 5 / p r e p a r e a s c i i d i g i t : t o d i s p l a y l e a 11 c o u t / d i s p l a y d i g i t i n r 5 mov a , r 5 / r e t u r n h e x d i g i t f o r f u t t h e r p r o c e s p u s h a c c / s a v e t h e d i g i t f r o m d e s t r u c t i o n a c a l l g h e x l 6 x / m u l t i p l y b y 16 p o p a c c / r e s t o r e t h e d i g i t ( 1 s t b y t e )
98
a d d a , t;2 ; a d d d i g i t . a !' t e i mu .11 i p ! i c a t i o n mov • r 2 , a ; s t o r e new v a l u e j u r2 c l r a / c l e a r A acldc a , r 3 / a d j u s t t h e ( 2 n d b y t e ) mov r 3 , a / s t o r e r.3 c l j n z v l , g h e x l 6 c / j u m p i f r'1 n o t z e t . - . , t i b r i n g t h e n e x t . c l r c / c l e a r o mov d p i , r 2 / p u t . r 2 i n t h e p o i n t e r ( 1 o w e r b y t e ) mov d p h , r 3 / p u t t 3 i n 1 h e p<> i n! «"r ( h i g h e r b y t e t re!:. / 1 oi u i n
/ g h e x l 6 x taul t i p l i e s r 3 - r 2 c o n t e n t by Id ( s h i f t l e f t b y 4 ) .
ghexlfc .x: mov a , r 3 / l o a d r 3 i n t o A s w a p a / s w a p A ( t o p r o c e s s l o w e r n i b b l e ) a n l , # 1 1 1 1 . 0 0 0 0 b / m a s k out ( u n w a n t e d n i b b l e a f t e r s w a p p i n g ) mov v 3 , •i / p u t i t b a c k i n f o r mov a , r 2 / l o a d r2 i n t o A f o r p r o c e s s i n g s w a p c ! / s w a p A f o r f u r t h e r froce^Ping a n l a , # 0 0 0 0 1 1 1 1 b / m a s k h i g h e r n i b b l e o r l a , i 3 / a n l A w i t h R3 mov ' r 3 , a / s v e r e s u l t i n t o t 3 mov a , r 2 / . l o a d A w i t h r 2 s w a p a / s w a p A f o r f u r t ho t p i o e o s s i n g a n l a , HI I . 1 1 0 0 0 0 b / m a s k out l o w e r n i b )} e mov r 2 , a / s a v e A i n t o i 2 r e t / r e t u r n
/ g h e x l C y d i v i d e s r 3 - t : 2 c o n t e n t b y 16 ( s h i f t r i g h t b y 4 ) .
g h e x l 6 y : mov a , r 2 / l o a d r 2 i n t o A s w a p a / s w a p A ( t o p r o c e s s h i g h e r n i b b l e ) a n l a , tfOOOOllllb / m a s k out. ( u n w a n t e d n i b b l e a f t e r s w a p p i n g ) mov r 2 , a / p u t . i t . b a c k i n t o r 2 mov a , r 3 / . l o a d r 3 i n t o A f o r p r o c e s s i n g s w a p a / s w a p A f o r f u r t h e r p r o c e s s i n g a n l a , # 1 1 1 1 0 0 0 0 b / m a s k l o w e r n i b b l e o r l a , r 2 / a n d A w i t h R2 mov r 2 , a / s v e r e s u l t i n t o r 2 mov a , r 3 / l o a d A w i t h r 3 s w a p • a / s w a p A f o r f u r t h e r p r o c e s s i n g a n l a , # 0 0 0 0 1 1 1 1 b / m a s k o u t h i g h e r n i b b l e mov r-3, a / s a v e A i n t o r 3 r e t / r e t u r n
a s c 2 h e x c o n v e r t A S C I I c h a r a c t e r i n A t o i t s equ. iva. lent- . IIKX. I f A c o n t e n t i s n o t v a l i d h e x v a l u e ( n o t i n t h e r a n g e 0 , 1 , 2 , 9 , A, F) c a r r y i s s e t (C = .1 ) .
a s c 2 h e x : a d d j n c a d d j c a d d c l r r e t
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a , # 2 0 8 / a d d t o e x e c l . u d o d i g i t s w i t h a s c i i l o w e r t h a n z e r o h e x _ n o t . / j u m p i f n o c . a i r y , d i g i t l o w e r a , # 2 4 6 / a d d t o e x e c l u d e d i g i t s w i t h a s e i . i h i g h e r t h a n n i n e h e x j u a y b o / jump i f e a t . r y , d i g i t may b o A, H, 0 , I), K or F a , # 1 0 / a d d t o c a n c e l 2 4 6 add.il . i o n c / c l e a r c
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j n c h e x n o t / j u m p i f n o c a r r y , d i g i t l o w e r a d d a , # 2 5 0 ; a d d t o e x e c l u d e d i g i t s w i t h a s o i i h i g h e r thar j c h e x n o t ; j u m p i f c a r r y , d i g i t i s n o t A , B, C, D, E n o r a d d a , # 1 6 ; a d d t o c a n c e l l a s t a d d i t i o n s c l r c ; c l e a r c. r e t ; r e t u r n
h e x _ n o t : s e t b c ; s e t c r e t ; r e t u r n
; p h e x c h a n g e s t h e 8 - b i t s v a l u e in A i n t o t w o n i b b l e s (1 - I d s ) . Then c h a ; n i b b l e t o i t ' s A S C I I , a n d s e n d s h i g h e r n i b b l e t h e n t h e 1 o w e r n i b b l e t ; p o r t u s i n g e o u t f u n c t i o n .
p h e x : p u s h •rl CO ; s a v o A b e c a u s e we h a n d l e n i b b l e - ( h i g h ! s w a p a ; s w a p t h e n i b l e s a n l a , # 1 5 ;mask out l o w e r n i b b l e a d d a , #24C / a d d t i . c h e c k whet h o i h e x h i <ihe i ' h in •> j n c p h e x b ; jump t o a d d 5 8 , i l ri"l h i iter I li a d d a , #7 ; i f h i g h e r t h e r e f o r e d i d i t i s A , B, c , b ,
phex b : a d d a , # 5 8 ; a d d 58 t o a d i u s t it t o a s o i i
a c a . l 1 e c u t ; o u t p u t A c o n t e n t p o p a c t : ; i o s t o r e A t o r 2 n d n i b b l e { 1 o w e r u i b b 1 e )
p h e x l : p u s h a c c ; s a v e A a n l a , # 1 5 ;mask o u t h i g h e r n i b b l e a d d a , # 2 4 6 / a d d l o c h e c k whet h e t h".-: h i g h o i t nan '.' j n c p h o x c ; jump t ( i a d d '•(!, i f n o t h i g o r t h a d d a , #7 / i f h i g h e r t h e r e f o r e d i g i t i s A , B, C, 1),
p h e x _ c : a d d a , # 5 8 ; a d d 58 t o a d j u s t , i t t o a s o i i a c a l . 1 c o u t ; o u t p u t A c o n t e n t p o p • a c c / r e s t o r e A r e t ; r e t u r n
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p h e x l 6 c h a n g e s t h e 1 6 - b i t s v a l u e i n t h e d p t t i n t o tw>> s < ~ b i t s v a l u e s in dph a n d d p i . U s i n g p h e x H i t s e n d s t.he 4 H E X d i g i t in A e f ' M l" in i t o t h e s e r i a l p o r t .
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; s a v e A ; l o a d h i g h e r p o i n t e r e o n t o u t ; e a . l l 8 b i t o u t p u t f u n c t i o n ; l o a d l o w e r p o i n t e r c o n t e n t ; c a l l 8 b i t o u t p u t f u n c t i o n / r e s t o r e A
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p s t r : p u s h a c c / s a v e A p s t r l : c l r a / c l e a r A t o u s e i n t h e p o i n t e r
m o v e a , @ a + d p t r / g e t a d d r . c o n t e n t i n c d p t r / p o i n t , t o n e x t a d d r . j z p s t r 2 / j u m p i f i t i s z e r o mov c , a c c . 7 / s t o r e b i t 7 i n c a r r y ( e n d f l a g ) a n l a , # 0 x 7 F / m a s k b i t : 7 o f A c o n t e n t . a c a l l c o u t / d i s p l a y c h a r a c t e r j c p s t r 2 / j u m p t o t h e e n d i f c a r r y s e t s jmp p s t r l / o t h e r w i s e , jump t o b e g i n i n q
p s t r 2 : p o p acc / r e s t o r e A r e t / r e f u i ri
1 0 0
/ u p p e r C o n v e r t s t h e a s c i i c o d e in A c c t <• ' i p p e t c - i s - - , i f i ! j s l o w e r e a s * .
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u p p e r 2 . : j c u p p e r 4 / j ump i f c h a r l o w e r t h a n ( a ) c j n e a , # 1 2 3 , u p p e r 3 / j ump i f c h a r i s (r.!
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l e n s t r r e t u r n s t h e l e n g t h o f t h e s t r i n g i n rO. The s r i n q m e n t i o n e d s i a t t s a t t h " d p t r c o n t e n t l o c a t i o n . The s t r i n g e n d i s e i t h e r (.) ot. b i t . 7 s o t .
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l e n s t r l : c l r a / c l e a r A m o v e a , 0 a + d p t r / l o a d A w i t h a d d r . c o n t e n t j z l e n s t r 2 / i s i t e n d o f s t r i n g mov c , a c c . 7 / l o a d c a r r y w i t h a c c ; . 7 ( e n d f 1 i n c rO / i n c r e m e n t c o u n t e r J c l e n s t r 2 / j u m p t o e n d i f c a r r y SP-' i n c d p t r ; i n c r e m e n t p o i n t e r s j m p l e n s t r l / l o o p b a c k
l e n s t r 2 • p o p a c c / r e s t ' o r e A r e t / r e t u r n
e s c C h e c k s t o s e e i f <ESC> i s w a i t i n g on s e r i a l p o r t , ' . ' - c l e a t i f n o '.KSC>, C=s<?t i f <ESC> p r e s s e d . T h e n b u f f e r i s f l u s h e d .
esc: p u s h a c c / s a v e A t o u s e t h e a c e u m l a t o r c l r c / c l e a r c j n b r i , e s c 2 / j u m p i f r e c e i v e i n t e r r u p t i s n o t s e t mov a , s b u f / . l o a d A w i t h s e r i a l b u f f e r c o n t e n t s c j n e a , # 2 7 , e s c l / j u m p i f s e r i a l b u f f e r c o n t e n t s i s n o t a n e s c s e t b c / i f s e r i a l b u f f e r c o n t a i n e s c . S e t c a r r y f l a g c l r r i / c l e a r r e c e i v e i n t e r r u p t p o p a c c / r e s t o r e A r e t • / r e t u r n
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/menu f i r s t p r i n t s out . t h e prompt. 1 , t h e n it p r o m p t s a n o l b e t m e s s a g e a s k i n g f o r / i n p u t a n d i t w a i t s t h e r e . When t h e u s e r e n t e r h i s r e s p o n s e i t l o o k s f o r s i m i l a r / e x t e r n a l c o m m a n d s i n t h e e x t e r n a l , m e m o r y . When i t i s s u c c e s s f u l i t e x e c u t e s / c o r r e s p o n d i n g r o u t i n e . When f i n i s h e d i t r e t u r n s . I f i t d i d n ' t f i n d i n t h e / e x t e r n a l m e m o r y i t c o m e s a n d l o o k s f o r i t . i n t h e i n t e r n a l c o m m a n d . I f s u c c e s s f u l / i t w i l l jump t o i t a n d e x e c u t e i t . When n o t s u c c e s s f u l i t r e t u r n s b a c k t o t h e / b e g i n i n g o f t h e menu t o r e p e a t t h e p r o c e s s . The d e l a i l s oJ menu e x p l a n a t i o n i s / embedded w i t h i n t h e t e x t , menu:
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/ g e t t h e i n p u t c h a r a c t e r / j u m p t o menuO, i f no t : ; o t h e r w i s e down I o a d ; j u m p t o menu / • c h a n g e A c o n t e n t t o u p p e r c a s e
; P u s h r e t u r n a d d r e s s o n t o s t a c k t o e n a b l e j u m p i n g t o t h e p r o g r a m . mov b , # ( m e n u & 2 5 5 ) ; l o a d r e t u r n a d d r e s s l o w b y t e p u s h b ; p u s h t h e r e t u r n a d d r e s s mov b , if (menu >> 8) ;J .oad r e t u r n a d d r e s s h i g h b y t e p u s h b / p u s h t h e r e t u r n a d d r e s s
; l o o k t h r o u g h memory f o r a p r o g r a m / w i t h t h e p r e s s e d u s e r command.
h e a d e r t h a t , i s u s e r i n s t a l l e d command, t o m a t e !
menux:' mov b , a ;now s e a r c h f.<.>r e x t o i n a l c o m m a n d s . . mov d p t r , ft bittern ; l o a d dptr. w i t h bmem
m e n u x l : : a c a l l f i n d ; f i n d h e a d e r o f f i l e s j n c m e n u x e n d ; j u m p , s i n c e a l l commands s e a r c h e d mov d p i , #4 / p o i n t t o f i g u r e out i t s t y p e c l r a / c l e a r A m o v e a , @ a + d p t r / . l o a d i t s t y p e c j n e a , # 2 5 4 , m e n u x 2 ; j u m p i f n o t e x t command (FK) i n c d p i / • i n c r e m e n t t o f i n d s p e c i f i e r c l r a ; c l e a r A m o v e a , d a + d p t r ; m o v e s p e c i f i e r i n t o A c j n e a , to, m e n u x 2 ; j u m p i f s p e c i f i e r a n d B n o t e q u a l a c a l l s p a c e / d i s p l a y s p a c e mov ' d p i , # 3 2 ; p o i n t t o h e a d e r name a c a l l p s t r / d i s p l a y i t a c a l l n e w l i n e / d i s p l a y new l i n e mov d p i , # 6 4 / p o i n t t o h e a d e r c l r a / c l e a r A jmp @ a + d p t r / j u m p t o i t !
menux2: i n c d p h / i n c rente n t dph mov a , d p h / m o v e dph Co A f o r e o m p a r i s i o n c j n e a , # ( ( e m e m U ) >> 8) 1 2 5 5 , m e n u x ] / j u m p b a c k i f not
m e n u x e n d : mov a , b / m o v e c h a r i n B t o A
; S i n c e n o u s e r i n s t a l l e d command w a s f o u n d , u s e t h e b u i l t . i n o n e s . m e n u l a : m e n u l b : c j n e a , # h e l p _ k e y , m e n u l c
mov d p t r , # h e l p cmd2 / p o i n t t o m e s s a g e a c a 1.1 p e s t r h z d i s p l a y i t a jmp h e l p / j u m p t.o s u b r o u t i n e
m e n u l c : c j n e a , # d i r _ k e y , m e n u l d mov d p t r , # d i r _ c m d
• a c a l l p e s t r h a j m p d i r
m e n u l d : c j n e a , # r u n _ k e y , m e n u l e mov d p t r , # r un_ cmd / p o i n t t o m e s s a g e a c a .1.1 p e s t r h / d i s p l a y i t a j m p r u n / j u m p t o s u b r o u t i n e
m e n u l e : c j n e a , # d n l d _ k e y , m e n u l f mov d p t r , # d n l d _ cmd a c a l l p e s t r h a j m p d n l d
menuIf : c j n e a , # u p l d _ k e y , m e n u l g
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102
mov d p t r , # n l o c cmd ; p o i n t t o m e s s a g e a c a l l p c s t r h ; d i s p l a y i t a j m p n l o c ; j u m p t o s u b r o u t i n e
m e n u l h : c j n e a , Hjump k e y , m e n n l . i mov d p t r , I t j u m p c m d a c a l l p c s t r h a j m p j unip
m e n u l j . : c j n e a , t d u m p k e y , m e n u l i mov d p t r , ttdump emd a c a l l p c s t r h a j m p dump
m e n u l j : c j n e a , H e d i L _ k e y , m e n u l k mov d p t r , # e d i t cmd ; p o i n t t o m e s s a g e a c a l l p c s t r h ; d i s p l a y i * a j m p e d i t ; j ump I. o s u b t o u t i n e
m e n u l k : c j n e . a , i f c l r i n j t e y , m e n u l 1 mov d p t r , # c l r m _ c m d a c a l l p c s t r h a j m p c l r m
m e n u 1 1 : c j n e a , # e r f r k e y , m e n u l m mov a , # h a s _ f l a s h j z menu e n d mov d p t r , # e r f r cmd ; p o i n t t o m e s s a g e a c a l 1 p c s t r _ h / d i s p l a y i ' a j m p e r f r ; j u m p t o s u b r o u t i n e
m e n u l m : c j n e a , # i n t m k e y , m e n u I n mov d p t r , # i n t m _ c m d a c a l l p c s t r _ h l j m p i n t m
m e n u I n : / I n v a l i d i n p u t , n o c o m m a n d s t o r u n . . . . , So n e w l i n e wi 1.1 j u s t r e t u r n t o m e n u . m e n u _ e n d :
a j m p n e w l i n e
d n l d r o u t i n e d o w n l o a d h e x f i l e s f r o m t h e s e r i a l p o r t . . Hex f i l e i s a number o f d a t a r e c o r d s t e r m i n a t e d b y CR a n d h F . A d a t a r e c o r d e x a m p l e i s a s f o l l o w s : -
: x x y y y y O O a a b b c c d d e e mmZZ w h e r e : S t a r t o f r e c o r d
x x N o . o r d a t c i b y t e ( t w o h e x d i g i t s ) y y y y S t a r t i n g a d d r e s s o f t h e r e c o r d (-1 h e x d i g i t s ) 0 0 R e c o r d t y o e N o . f o r h e x f i l e a a b b c c d c i e e . . . . mm Ilex d a t a ( t w o h e x d i g i t , n u m b e r s . , e q u a l x x ) ZE C h e c k s u m v a l u e o f a l l d a t a r e c o r d d i g i t s
The d o w n l o a d f u n c t i o n r e c e i v e s f r o m t h e s e r i a l p o t t i n t h i s f o r m , i n t e r p e t t s a n d s a v e i t . The p r o c e d u r e e x p l a n a t i o n i s e m b e d d e d i n t h e t e x t . A l s o a number m e s s a g e s a r e e x p l a i n e d a s f o l l o w s : d n l d s l = " B e g i n s e n d i n g I n t e l HEX f o r m a t f i l e <ESC> t o a b o r t " d n l d s 2 = " D o w n l o a d a b o r t e d " d n l d s 3 = " D o w n l o a d c o m p l e t e d " 16 b y t e p a r a m e t e r t a b l e : ( e i g h t 16 b i t v a l u e s )
* 0 = l i n e s r e c e i v e d * 1 = b y t e s r e c e i v e d * 2 b y t e s w r i t t e n * 3 = b y t e s u n a b l e t o w r i t e ** 4 = i n c o r r e c t c h e c k s u m s * 5 = u n e x p e c t e d b e g i n o f l i n e * 6 u n e x p e c t e d h e x d i g i t s ( w h i l e w a i t i n g f o r b o ! ) * 7 u n e x p e c t e d n o n - h e x d i g i t s ( i n m i d d l e o f a l i n e )
d n l d :
103
mov d p t r , ttdnldsl / p o i n t t o m e s s a g e t o d i s p l a y
a c a l l p e s t r _ h a c a l l d n . l d _ i n . i t
;Lo.ok f o r b e g i n l n g o f l i n e m a r k e r d n l d l :
d n l d 2 :
; C h e c k d n l d 2 b
a c a l . I t c i n c j n e ' a , # 2 7 , d n l d 2 s j m p d n . l d _ e s c c j n e a , # ' : ' , d n l d 2 b s j m p d n l d 2 d
t o s e e i f i t ' s a h e x d i q i t ,
r " b e g i n s e n d i n g f i l e c a l l i n i f i a l i s a t i o n i . t
; g e t i n a c h a r a c t e r ; j u m p i f n o t e s c a p e / j u m p s i n c e e s c a p e ; j u m p i f n o t : ; j u m p s i n c e ( : } t o e e r r o r i f i t i s .
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d n l d 2 d
; c o n v e r t a s c i i t o h e x ; i f c a r r y s e t ( n o t h e x ) jump b a c k / s p e c i f y t h e c o u n t e r Cor u n e x p e c t e d h e x / i n c r e m e n t c o u n t e r / j u m p b a c k
" c h a r a c t e r .
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d n l d 4 : d n l d 5 :
mov a , # , A ' ; m o v e c h a r a c t e r t o A a c a l l c o u t ; d i s p l a y c h a r a c t e r a c a l l d n l d i n i t ; c a ] l i n i t i a l i z a t i o n b e l o w
: mov r l , # 0 / s p e c i f y c o u n t e r f o r Mo. o f t r i a l s a c a l 1 d n l d i n c ; i n c r e m e n t . c o u n t e r
t a k i n g i n t h e r e c o r d l i n e o f d a t a ;mov a , # ' . ' ; m o v e ( . ) i n t o A ; a c a l l ' c o u t ; d i s p l a y c h a r a c f e i mov r 4 , # 0 ; i:4 w i l l c o u n t up c h e c k s u m a c a l l d n l d g h e x / g e t h e x c h a r a c t e r ( N o . o f d a t a b y t e s ) mov rO, a / m o v e N o . <>f d a t a b y t e s t o rQ mov a , V .' ; m o v e ( . ) i n t o A a c a l ] c o u t / d i s p l a y ' . ' e h u r a e t o t a c a l ] d n l d g h e x ; q e t h e x c h a r a c t e r ( s t a r t i n g adck . msb) mov dp i t , a / H i g h b y t e o f l o a d a d d r e s s a c a l l d n l d g h e x ; g e t h e x c h a r a c t e r ( s t . a r t i n f a d d r . ] s b ) mov d p i , a ; l . o w b y t . e o f . l oad a d d i e s s aca . l 1 d n l d g h e x ; g e t : h e x c h a r a c t e r ( r e c o r d t y p e . . h e x e t c ) c j n e a , # 1 , d n l d 4 / j u m p i f r e c o r d t y p e n o t 1 i . e . ( h e x t y p e ) s j m p d n l d e n d / j u m p i f r e c o r d t y p e i s ] ( n o n h e x t y p e ) j n z d n l d u n k n o w n ; j u m p i f r e c o r d t y p e i s n o t z e r o mov a , rO ;mov i n t o N o . o f d a t a b y t e s A j z d n l d g e t c k s u m ; j n m p a f t e r l a s t : d a t a w a s w r i t t e n a c a l 1 d n l d g h e x / G e t d a t a b y t e mov r 2 , a ; m o v e d a t a b y t e t o r:2 mov r l , # 1 / s p e c i f y c o u n t e r b y t e s r e c e i v e d a c a l l d n l d i n c ; i n c r e m e n t e o u n t e r mov , a , r2 ; l o a d A w i t h d a t a b y t e l c a l l s m a r t wr ; w r i t e b y t e , c = l i f an e r r o r w r i t i n g c l r a ; c l e a r A a d d c a , #2 ,-add 2 t o c a r r y ( 2 ~ w r i t t e n , 3 " not . w r i t t e n ) mov r l , a / s p e c i f y c o u n t e r t y p e ( w r i t f e n o r n o t w r i t t e n ) a c a l l d n l d i n c / i n c r e m e n t c o u n t e r i n c d p t r / i n c r e m e n t d p t r ( p o i n t t o t h e n e x t l o c a t i o n ) d j n z r O , d n l d S / j u m p b a c k t o w r i t e t h e r e s t .
t c k s n m : a c a l l d n l d g h e x / g e t h e x a n d a d d c h e c k s u m t o i 1 c o n t e n I mov a , r 4 / m o v e c h e c k s u m v a l u e t o A j z d n l d l / j u m p i f n o t z e r o , t o r e c o r d c h e e k sum e r r o r
d n l d _ s u m e r r : mov a c a l l s j m p
/ s p e c i f y c o u n t e r t y p e / i n c r e m e n t c o u n t e r / j u m p t o b e c i i n i n g
r l , #4 d n l d _ i n c d n l d l
f o r c k s u m e r r o r :
104
; I l a n d l e u n k n o w n . l i n e t y p e . d n l d _ u n k n o w n :
mov a , i 0 / m o v e N o . of ' . lata hyt '•• A j z dri) d g e t o k s u m / s k i p d a t a i f s i z e i s r:ot*>
d n l d _ u k n 2 : a c a l ) d n l d _ g h e x / c o n s u m e a l l o f unknown d a t a d j n z r O , d n l d _ u k n 2 ; d e c r e m e n t a n d jump i f d a t a not . f i n i s h e r s j m p d n l d _ g e t _ c k s u m ; j u m p t o g e t c h e c k s u m
. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * .
/ H a n d l e s t h e p r o p e r e n d - o f - d o w n l o a d m a r k e r . d n l d _ e n d :
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; g o t t h e l a s t c h e c k s u m /•move c h e c k s u m value? t o A ; j u m p i f n o t z e r o ; c a 1.1 d e l a y ; p o i n t t o m e s s a g e , - d i s p l y " d o w n l o a d t h a t may h a v e b e e n
; jump i f r e c e i v e in / • i n p u t c h a r a c t e r ; j n m p t o summary
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d n l d _ g h e x a , r<l d n l d _ s u m e r r d n l d _ d l y d p t r , # d n l d s 3 p c s t . r _ h
/•Consume a n y CR o r LF c h a r a c t e r j n b r i , d n l d _ s u m a c a l l c i n s j m p dn . ld sum
. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * '
/ •Handle e s c r e c e i v e d i n t h e d o w n l o a d s t i e n m . d n l c l _ e s c :
a c a l l d n l d d l y / c a l l d e l a y mov d p t r , # d n l d s 2 / p o i n t t o s t r i n g a c a l l , p c s t r h / d i s p l a y " d o w n l o a d s j m p d n l d _ s u m / jump t o summary
. A * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * » * * * * 1 * * * * * * * . / / /A s h o r t d e l a y s i n c e m o s t t e r m i n a l e m u l a t i o n p r o g r a m s w o n ' t b e r e a d y / a n y t h i n g i m m e d i a t e l y a f t e r t h e y ' v e t r a n s m i t t e d a t i l e . . . T h e f o l l o w i r / e s t i m a t e d a s r o u g h l y 1 2 8 k c y c l e s , a p p o x 0 . 1 s e c d n l d _ d l y :
/ l o a d rO w i t h z e r o / l o a d r l w i t h z e r o / d e c r e m e n t r l , l o o p i f n o t z e r o i n the. / j u m p b a c k i f n o t z e r o / r e t u r n
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/ C o u n t e r i n c r e m e n t i n g , p a r a m e t e r s p e c i f i e d b y r l . ! l " t e , v a l u e s i n A c e a n d Rl a r e / d e s t r o y e d . d n l d _ i n c :
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d n l d i n 2 : r e t
a , r 1 a , ttOOOOOlllb a a , # d n l d _ p a r m r l , a @rl a , @rl d n l d i n 2 r l @rl
/ r l s p e c i f r e s p a r a m e t e r t o i n c l e m e n t / a n d j u s t i n c a s e / r o t a t e t o r e s e r v e t w o l o c a t i o n s ( I s b , msb) / d e f i n e a d d r e s s o f l s b t o i n c r e m e n t / n o w r l p o i n t s t o l s b / i n c r e m e n t l s b / m o v e t o c h e c k I s b / j u m p i f n o t z e r o / o t h e r w i s e p o i n t t o n e x t l o c a t i o n (msb) / i n c r e m e n t msb / r e t u r n
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105
; G e t p a r a m e t e r ; a n d i n c t o n e x t o n e ( @ r l ) , c a r r y c l e a r iI p a t a m e t ; b i t v a l u e r e t u r n e d I n d p t r . d n l d _ g p :
s e t b c ; s e t . c a r r y Cor nun r.er •> parm mov d p i , @rl ;put: w h a t a t a d d r . a s d p i i n c r l / p o i n t t o t h e n e x t mov d p i ) , t?rl / p u t what a t a d d r . a s Iph
• i n c r l ; p o i n t t o t h e n e x t mov a , d p i / m o v e t o c h e c k i f d p ! i s z e r o j n z d n l d g p 2 / jump i f d p i i s it"! .:<. t ! • mov a , dph / m o v e t o c h e e k i f dph i s z » r o j n z d n l d g p 2 / j u m p i f dph i s not r e r o c l r c / c l e a r c
d n l d g p 2 : r e t . **< * * * * * * * * * * * * * *
/ r e t u r n f i r * * * * * * * .
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/ A s p e c i a l v e r s i o n o f g h e x j u s t l o r t h e d o w n l o a d . D o e s n o t l o o k f o r c a r r i a g e / r e t u r n o r b a c k s p a c e . H a n d l e s ESC k e y b y p o p i n g t h e r e t u r n a d d r e s s a n d t h e n j u m p s / t o t h e e s c . k e y h a n d l i n g . T h i s g h e x d o e s n ' t e c h o c h a r a c t e r s , a n d i f it. s e e s ' : ' , / i t p o p s t h e r e t u r n a n d j u m p s t o an e r r o r h a n d l e r f o r ' : ' i n t h e m i d d l e o f a / l i n e . N o n - h e x d i g i t s a l s o jump t o e r r o r h a n d l e r s , d e p e n d i n g o n w h i c h d i g i t . d n l d _ g h e x : d n l d g h l : a c a l l
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c m u p p e r a , # 2 7 , a c c a c c d n l d _ e s c a , # " ' : ' , r l , # 5 d n l . d _ . i n c a c e a c c d n l d 3 a s c 2 h e x d n l d g h 6 r l , #7 d n l d _ i n c d n l d g h l r 2 , a c i n u p p e r a , # 2 7 , d n l d g h 2 a , I " : * , d n l d g h 4 a s c 2 h e x d n l d g h A . r l , #7 d n l d _ i n c d n l d g h 7 a , r 2 a a , r 2 r 2 , a a , r 4 r 4 , a a , r 2
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/ i n p u t 1 s t d i g i t / c o n v e r t c h a r t o / j u m p i f n o t e s c . / e l s e p o p 2 n d p u s h e d / p o p t h e I s t p u s h e d / j u m p t o e s c a p e / j u m p i f n o t ( : } b o u i u i tig > / s p e c i f y c o u n t e r Cor wi o n q / i n c r e m e n t c o u n t e t / p o p 2 n d p u s h e d ; p o p 1 s t p u s l i ed / j u m p t o b e g i n ! n g ( w e ' r e o n
/ c a l l a s c 2 h e x / j u m p i f h e x / s p e c i f y c o u n t e r f o r n o n e h e x / i n c r e m e n t c o u n t e r / j u m p b a c k t o b e g r u i n g / k e e p f i r s t d i g i t i n r 2 / i n p u t 2 n d d i g i t / c o n v e r t t o u p p e r c a s e
n o t e s c . e s c . n o t :
/ j ump / j ump / j u m p / j ump
i f i f i f i f
: c o n v e r t : j ump i f
t o h e x n o t h e x
/ s p e c i f y c o u n t e r f o r n o n e h e x / i n c r e m e n t c o u n t e L / j u m p b a c k / e x c h a n g e 1 s t a n d 2 n d d i g i t s / s w a p 1 s t d i g i t / o r 1 s t a n d 2 n d d i g i t s / s t o r e r e s u l t i n r 2 / a d d new number t o p r e v i o u s c h e c k s u m / s t o r e r e s u l t i n t o r4 / m o v e nev; number t o A / r e t u r n
. * * / * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * . / d n l d s 4 = / d n ' l d s 5 =
' S u m m a r y : " ' l i n e s r e c e i v e d '
106
/ d n i d s d a - " b y t e : - r e c e i v e d " / d n . l d s 6 b ~ " b y t e s w r . i t - t . e n " ; P r i n t , o u t d o w n l o a d s u m m a r y , d n i d sum:
mov a , r 6 ; m o v e p o i n t e r low b y t e i n t o A p u s h a c c ; p u s h i t mov a , rl ; m o v e p o i n t e r h i g h b y t e i n t o A p u s h a c e ; p u s h i t mov ' d p t r , K d n l d s l ; p o i n t 1o m e s s a g e a c a l l p c s t r h / d i s p l a y i t mov r l , U d n l d p a r m ; m o v e d o w n l o a d p a r a m e t e r v a l u e i n r 1 mov t . 6 , # d n l . d s 5 (, 2 5 5 ; m o v e " l i n e i e o e i v e . 1 " low b y t e i n ! (>
mov r 7 , fldnldsS » ; move " l i n e r e c e i v e d " h i g h b y t e i n 1
a c a l 1 d n l d iO ; c a 1 1 d o w n l o a d i t e m d i s p l a y m<>v i t > , l ldnl .dsGa h ,'. •:.'> ; tin i v o " b y t e | e e e j v e < | " low b y l e i i i ! 1.
mo v r'l, fldnldsfia -• >i ; mov" " b y t e t e . i v e < l " h i g h b y t e in r a c a l J d n l d _ i 0 / e a I .1 11.>wn 1 o n . 1 i Ve in d i s p 1 • i y mov r 6 , i f d n l d s C b S ;;.'.;> / m o v e " b y t e wt . i t t e n " l o w b y t e i n t i.
mov r 7 , # d n l d s 6 b >• o ; m o v e " b y t e w i i l t e n " h i g h b y t e i n i 7 a c a l l d n l d _ i ( ) ; c a l l d o w n l o a d i t e m d i s p l a y
4 * * * 4 * 1 ; * * * * * * # * * * 4-+* » * 4 * * 4 * .
t d n l d _ e r r : ; n o w p r i n t o u t e r r o r summary mov r 2 , # 5 ; m a k e r ? a s a c o u n t e r
d n l d e r 2 : a c a l l d n l d _ g p ; g e t p a r a m e t e r s j c d n l d e r 3 ; j u m p i f a n y e r r o r s d j n z r 2 , d n . l d e r 2 / d e c r e m e n t a n d jump t.o s e e o t h e r p a i a m e t e r
/No e r r o r s , s o we p r i n t t h e n i c e m e s s a g e mov d p t r , # d n l d s l 3 ; p o i n t , t.o m e s s a g e a c a l l , p c s t r _ h / d i s p l a y i t "No e r r o r s d e t e c t e d " s j m p d l n d _ s u m _ d o n e / j u m p t o summary d o n e
/ T h e r e w e r e e r r o r s , s o now we p r i n t t h e m . d n l d e r 3 :
mov d p t r , # d n l d s 7 / p o i n t t o m e s s a g e a c a l l p c s t r _ h / d i s p l a y i t " E r r o r s : "
l e t ' s n o t b e n a s t y . . . o n l y p r i n t i f n e c e s s a r y / B u t mov mov mov a c a l l
mov mov a c a l l
mov mov a c a l .1. mov mov a c a l l
mov mov a c a l l
r l , # ( d n l d p a n n i 6) r 6 , # d n l d s 8 & 2 5 5 r 7 , ttdnldsS » i! d n l d _ i t e m r 6 , # d n l d s 9 S 2 5 5 r 7 , # d n l d s 9 » ft d n l d _ i t e m r 6 , # d n l d s l O & 2 5 5 r 7 , ( f d n l d s l O » 8 d n l d _ i t e m r 6 , # d n l d s l l & 2 5 5 r 7 , # d n l d s l l » 8 d n l d _ i t e m r 6 , # d n l d s l 2 & 2 5 5
' r 7 , # d n l d s l 2 » 8 d n l d _ i t e m
* * * * * * * * * * 4 * * * * * H * t * »
m o v e " b y t e s u n a b l e t o w r i t e " l o w b y t e i n r<.> m o v e " b y t e s u n a b l e t o w r i t e " h i g h b y t e in r7 c a l l d o w n l o a d i t e m d i s p l a y m o v e " i n c o r r e c t , c h e c k s u m s " l o w b y t e i n r 6 move " i n c o r r e c t c h e c k s u m s " h i g h b y t e i n r7 c a l l d o w n l o a d i t e m d i s p l a y move " u n e x p e c t e d b e g i n o f f i l e " l ow b y t e i n rC wove " u n e x p e c t e d b e g i n o f f . i l*»" h i g h b y t e j n r7 o n 1 I down 1 oa-1 i t e m < I i s p 1 a y m o v e " u n e x p e c t e d h e x d i g i t s " l ow b y t e i n r 6 move " u n e x p e c t e d h e x d i g i t s " h i g h b y t e i n r7 c a l l d o w n l o a d i t e m d i s p l a y m o v e " u n e x p e c t e d i ion h e x d i g i t s " l o w b y t e i n rt . m o v e " u n e x p e c t e d n o n h e x d i g i t s " h i g h b y t e i n r7 c a l l d o w n l o a d i t e m d i s p l a y
1 * * * * 4 • * • * * * * * * * * * .
d l n d _ s u m _ d o n e : p o p a c c mov r 7 , a p o p a c e
" mov r 6 , a a j m p n e w l l n e
/ p o p p u s h e s a n d p u t i n r 7 a n d r 6 / m o v e A t o r 7 / p o p t o A / m o v e A t o r 6 / d i s p l a y n e w l i n e a n d r e t u r n t o menu
. * * * * * * * * * * * * * * * * * * * * * * . * * * * * * * * * * * * * * * * * * * * * * • * * * * * * . d n l d _ i t e m :
a c a l l d n l d g p / g e t p a r a m e t e r s ( e r t o t c o n d i t i o n s /
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mov rO, t d n l d parm dnldO: mov PrO, !I0
i n c rO c j n e 1.0, I)dnld parm I 16, dnldl) ; 1 oop l o c l e a t ; r e t / t o t i u n
/jump i f e r r o r s / d i s p l a y s p a c e / p r i n t v a l u e /make p o i n t e r t o t h e m e s s a u o / d i s p l a y t h e m e s s a g e / r e t u r n A * * * * * A A * * A * * A * A A . A i * A i * * » A » i »
/ n o n - e r r o r condi f.i.ons /jump t o r2
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/dnlds '7: / d n l d s S : / d n l d s 9 : / d n l d s l O : / d n l d s l l : , - d n l d s l 2 : / d n l d s l 3 :
K t r o r s : " b y t e s u n a b l e l o w r i t e " i n c o r r e c t checksums" u n e x p e c t e d b e g i n o f l i n e " u n e x p e c t e d h e x d i g i t s " u n e x p e c t e d n o n - h e x d i g i t s "
'No e r r o r s d e t e c t e d "
/jump r o u t i n e a s k s for I he a d d r e s s t o which il w i l l lump. II e s c a p e [ C ~ I I was / p r e s s e d , t h e program i s a b o r t e d . Tt NO a d d r e s s was e n t e r e d ( v o i d i n p u t , psw.!f>-/ t h e program l e t u r n s t o where i t w a s . When h i i a d d r e s i s e n t e r e d t h e program mak / s t a c k o f 6 b y ! e l e n g t h and jump t o i h e s p e c i f i e d a d d r e s s , jump:
mov d p t r , HP romp T (1 / l o a d p o i n t e r w i t h m e s s a a e a d d r . aea .1.1 pos t r H / d i s p l a y t h e m e s s a g e a c a 11 r6r7 tx» ip tr / t o p r e p a r e d a t a in dpt I FOR n e x t 1 unc i ion a c a l l phex1b / d i s p l a y a d d r e s s c o n t e n t mov d p t r , #prompt4 / l o a d p o i n t e r w i t h m e s s a g e add . a c a l l • p e s t r _ h / d i s p l a y t h e m e s s a g e a c a l 1 g h e x 1 6 / g e t hex v a l u e (dptr v a l u e ) j b psw.!», j ump3 /jump i f f l a g sol j n c jump2 /jump i f c a r r y not. set. ajmp a b o r t 2 / o t h e r w i s e abort
juirtp2: a c a l l DPT I T ..T-l.RV / s a v e dpf i •••line IN I a n d I /
jump3 :. a c a l 1 new Li ne / outpu I: a .1 i no mov d p t ) , '1 runs 1 / t o a d po in t ET w i t h m e s s a g e ictrir . a c a l I p c s t i . II / d i s p l a y THE mes sage aca 1.1 r6r7t o d p t r / r e s t o r e p o i n t e r
/Jump t o u s e r c o d e I'dpur: ( t h i s u s e d by run command a l s o ) j u m p d o i t :
c l r a / c l e a r A mov psw, a /move A t o psw mov b , a /move A t o B mov rO, #7 /move 7 t o r 1) ( l o a d c o u n t o i )
j d i t c l r :mov @r0, a / c l e a r . 7 a d d r e s s e s d j n z rO, j d i t c l r / l o o p t o c l e a r mov s p , #8 / s t a r t w/ sp**7, l i k e a r e a l r e s e t push a c c / u n l i k e a r e a l r e s e t , push 0000 push a c c / i n c a s e t h e y end w i t h a RF'.T jmp @a+dptr /jump t o t h e a d d r e s s
108
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a c a l i mov a c a ! L c l r m o v e i n e aril c j n o c l r a d d j c c l r a d d a c a l l d in: : a c a l l a c a l l a c a l l a c a l l j c d j n z a j m p
' r 2 , # 1 6 n o w l ino> ' r(»r7l odpfcr p h e x l ( > a , » ' : ' e o u t s p r 3 , #lf> r b i :7 l ' . . i lp l i a a , H a l d p l . i . dpt . r p h e x s p a c e r 3 , dump? d s p a c e r 3 , # 1 6 c 6i:7 t o d p t . i a a , @ a i c l p t r d p t i
, a , # 0 1 1 1 1 1 1 l b n , # 1 2 7 , dtinip31> n a , # 2 2 4 duiop4 a a , # 3 2 c o u t r.5, d n m p 3 n o w l i n e l i n e d l y d p t r t o r f > r 7 e s c dump 5 r 2 , d u n i p l n o w l i n o
; N o . o f ! i n e s i*> • or i ul / d i s p l a y new I i t ie / t o p r e p a i " d a i a i n dp i r !•>• n e v i !un>:! i"i; / d i s p l a y a d d r . l o c a t i o n i o 'lump i n / m o v e : t o A / d i s p l a y : / r 3 N o . o f h y f e s t o p i i n t / t o p i e p a i o dp i i I . a u< -xl t i m e t i o n / c l e a t A / r e a d .uk i i i ' s r . • • o i l o i l / i n o i o n i o n ! dp i i / d i s p l a y e a c h b y t e i n he:-: / d i s p l a y s p a c e / . l o o p I f>t n e x t ' b y t e . / d i s p l a y d o u b l e s p a c e z r 3 N o . o f b y t e s t o d i s p l a y h e x a n d n o n - l i e s / m a k e t h e p o i n t e r a t t a i n / c l e a r A / r e a d a g a i n / p o i n t t o n e x t . / a v o i d u n p r i n t a b l e c h a r a c t e r s • 127 / c h e c k i !.' i s no t | 21 / i f .127 d e l e t e e h a t a e l / a d d t.o s c r e e n c o n t r o l e h a r a e t e t s / c a r r y m e a n s n o e o n l i o ) c h a t a c t ••! / a v o i d c o n t r o l e h n r a e l " r s / a d d i t i o n t o c o m p e n s a t e f o r X24 a d d i t i o n ; d i s p I a y c h a i a c t o t / l o o p a g a i n t o d i s p l a y n e x t c l i a i a c l e i / d i s p l a y a new l i n e / d e l a y / s a v e d p t r i n r 6 a n d i.7 / c a l l e s c a p e / j u m p i f e s c w a s p r e s s e d / l o o p b a c k u p t o p r i n t n e x t , l i n e / j u m p t o n e w l i i i e t o r e t u r n t o m e n u
/ e d i t r o u t i n e e d i t s e x t e r n a l , ra in . I t d i s p l a y s a l u o s s a c i " at . t l i e s t a r t t o lc-t l i r e / u s e r e n t e r t h e a d d r e s s l o c a t i o n h e w a n t s t.o e d i t . T h e n It. d i s p l a y s t h e a d d r e s s / b e s i d e i t ' s c o n t e n t a n d a s k t h e u s e r t o e n t e r t h e n e w v a l u e . When h e x c h a r a c t e r ; / a r e e n t e r e d t h e r o u t i n e m o d i f y t h e s p e c i f i e d l o c a t i o n a n d m o v e t o t h e n e x t / a d d r e s s . I f n o n h e x c h a r a c t e r s e n t e r e d t h e r o u t i n e d i s p l a y s a m e s s a g e .
e d i t :
e d i t l :
m o v d p t r , tfodit.sl / l o a d d p t r w i t h m e s s a g e a d d r , a c a l l p c s t r _h / d i s p l a y m e s s a g e a c a l 1 r 6 r / t o d p t r / t o p r e p a r e d a t a i n dpt . i t o r n e x t. f u n c t i o n a c a l l . p h e x l 6 / d i s p l a y l o c a t i o n p o i n t e d t o b y d p t r mov a , # ' : ' / m o v e : t o A a c a l 1. C O I l l . S p / d i s p l a y : mov a , 8 • ( • / m o v e ( t o A a c a l l c o u t / d i s p l a y ' ( ' a c a l l d p t r tor<>r7 / s a v e d p t t i u r<> • u id 1.7 c l r a / c l e a r A m o v e a , @ a + d p t r / r e a d dpt: i a d d i . Cent enl . a n d
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a c a l ] p h e x d.i s p ! ,<y mov d p t r , # p r o m p t 1 o l o a d dpt i v; i • h :!!«•"• s : a c a ] 1 p e s t . r h d i s p l a y m o ; : . - ' i .<• ;•••!
a c a l 1 g h e x ,.|ol now h'•:: •• a 1 'i<• j b p s w . 5 , e d i ! 2 jump 1 '• p . ; . ' '• • j c e d i 12 a 1 • i ' m i l • i t • i • r v a c a l . ] i fit 71 o d p t i 1 oa 1 1 smar 1 wr: wr i t " ' ••••! i a c a l 1 n e w ! i n o . ,ut p ip .) i|' ' ' a c a l l r 6 t . ' 7 t o d p t i . 1 , . r : ! . ,, , . , | p : , , , , ; > . i n o d p t r p o i n t t • •)!•• !!•:•:' a c a 1. 1 dpi. r I or in 7 r . a • dpt t is: t '. u>' a j m p e d i t . 1 l o o p 1 ..•,(•!•. mov . dpi: r , ( fed] 1 s 2 l o a d d p i , ' i; a j mp p e s t i. h d i S| • 1 a y ! i " " : : : ' ! !•
; d i r r o u t i n e maps t h e d i s p l a y !• ; i n t h e memory t o t h e d i s p l a y , it s / s e a r c h i n g f o r h e a d e r s . .11 d i s p 1 a y s ; f i n d s . I t c o n t i n u e s d o i n g t h i s for d i r :
mov d p t r , ttprompl '* a c a l 1 p e s ft h mov t 0 , 112 1
d i r O a : a c a l 1 space? d j n z rO, d i r O a ;mov d p t r , II p r o m p t 9b a c a l l p e s t r h mov d p h , tt(bmem > - 8)
d i r l : a c a i 1 f i n d j <-• d i r 2
d i r e n d : a jmp n e w ] i n e d i r 2 :
a c a l I d s p a e e mov d p i , in 2 a c a ] 1 p s t r mov d p i , 1(32 a c a . l 1 1 e n s t r mov
] , -a , # 3 3
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d i r 3 : aca . l 1. c o u t d j n z r O , d i r 3 mov d p i , # 0 a c a l l p h e x l 6 mov rO, # 6 mov a , # ' •
d i r 4 : a c a ] 1 c o u I d j n z rO, d i r 4 mov d p i , «4 c l r a m o v e • a , l ? a + d p t r mov L-2, d p h
d i r 5 : c j n e a , # 2 5 4 , d i r . M . mov d p t r , # l y p e l s j m p d i r 7
d i r 5 b : c j n e a , # 2 5 3 , d i r ' . c d i r 5 b b : mov dpt. r , I l t y p e 4
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; | . . = , . | s p a - - i r p / d i s p l a y s p a - - o / l o o p t o d i s p l a y / p o i n t t o h e a d o t / d i s p l a y t h e h'>.-/ ! e a I c o u n t ° i / 1o;vl ' o d i s p l , \ / d i s p l i y s p a c -/ 1 Oi >p (• t i !!•/'•.•< ; p o i n\ '. • • \ i i'.t s • / c J ' v u : A / l o a d i t s t y p o / s a v e t h i s , / jump i t <:••'. !• t / p o i n t ! .. ..;:> . . . / inrip t o I ; . •• p.-/ jui-ip i ! ti' ' H t / r •' : ;'• '• • • .•• • . i ' '
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s jmp d i r ? ; jump t o i j 7 1 u-! ok a i r 5c:: c j n e ' a , 9 3 : . , d i r l . d ; j u m p i f no t 2 "Mi
mov d p t r , # t : y p o 2 / p o i n t t o o r d i n a l y p i o q i n n 1
s jmp d i r 7 ; jump t o ,i j t / i..<» 1, ,w C i i r 5 d : e j n e a , I l 2 i ' i , d i r . ' j e ; j u m p i f not
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d b 0 x 3 0 , 0 x 0 5 , Oy.60, Ox,- ' . , 0x4 i , o x A 1, • : ••• Ox.."" d b 0 x 0 5 , 0 x 6 F , 0 x 0 1 , 0 x 3 F , 0 x 2 h , Oxl 1- , o x <o, I'X.O •' d b OxHK, Ox l b , 0.x FO, Ox'. >., OxFO, -'X-l / , a x i s ' d b 0 x 2 0 , Ox.l F, 0 x 2 \ , Ox <o, 0 x o 3 , 0 x 7 A, 0 x 0 i , t iyl . i i
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d b 0 x 0 2 , o x . ' . F , 0 x 6 4 , 0 x 1 2 , i lxAO, OxOO, o x ; : •>, •i.xF. : d b 0 x 9 F , OxCO, 0 x 1 4 , 0 x 7 7 , O x / 0 , Oxl i , 0 x 4 0 , 0x7' I
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