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EE134 1
Digital Integrated Circuit (IC) Layout and Digital Integrated Circuit (IC) Layout and DesignDesign
! EE 134 – Winter 05
" Lecture Tu & Thurs. 9:40 – 11am ENGR2 142
" 2 Lab sections– M 2:10pm – 5pm ENGR2 128
– F 11:10am – 2pm ENGR2 128
" NO LAB THIS WEEK
" FIRST LAB Friday Jan. 20
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PeoplePeople
! Lecturer - Roger Lake" Office – ENGR2 Rm. 437" Office hours - MW 4-5pm" rlake@ee.ucr.edu
! TA – Faruk Yilmaz" Office – ENGR2 Rm. 222" Office Hours – TBD" faruk@ee.ucr.edu
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EE134 WebEE134 Web--sitesite
! http://www.ee.ucr.edu/~rlake/EE134.html" Class lecture notes
" Assignments and solutions
" Lab and project information
" Exams and solutions
" Other useful links
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Class OrganizationClass Organization
! Homework assignments (10%)
! Labs (20%)" Tutorials to learn the Cadence design software
! Final Project (50%)" Design a digital circuit (eg. 4 bit adder)
" Work in teams of 3
! Midterm (20%)
EE134
Digital Integrated Digital Integrated Circuits:Circuits:A Design Perspective,A Design Perspective,22ndnd Ed.Ed.Jan M. RabaeyAnantha ChandrakasanBorivoje Nikolic
Text BookText Book
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SoftwareSoftware
! Cadence software" Online documentation and tutorials
" Sun4 UNIX Workstations
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What is this book all about?What is this book all about?
! Introduction to digital integrated circuits." CMOS devices and manufacturing technology. " CMOS inverters and gates. " Propagation delay, " noise margins, and " power dissipation. " Sequential circuits. Arithmetic, interconnect, and memories.
! What will you learn?" Understanding, designing, and optimizing digital circuits with
respect to different quality metrics: cost, speed, power dissipation, and reliability
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Digital Integrated CircuitsDigital Integrated Circuits
! Introduction: Issues in digital design! CMOS devices and manufacturing ! The CMOS inverter! Combinational logic structures! Propagation delay, noise margins, power! Sequential logic gates; timing! Interconnect: R, L and C! Arithmetic building blocks! Memories and array structures! Design methods
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EE134 Winter 2006 EE134 Winter 2006 -- Lecture 1Lecture 1
! Introduction
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IntroductionIntroduction
! Why is designing digital ICs different today than it was before?
! Will it change in future?
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The First Computer (1832)The First Computer (1832)
The BabbageDifference Engine(1832)
25,000 partscost: £17,470
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ENIAC ENIAC -- The first electronic computer (1946)The first electronic computer (1946)
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The Transistor RevolutionThe Transistor Revolution
First transistorBell Labs, 1948
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The First Integrated Circuits The First Integrated Circuits
Bipolar logic1960’s
ECL 3-input GateMotorola 1966
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Intel 4004 MicroIntel 4004 Micro--Processor (1971)Processor (1971)
19712,300 transistors108 KHz operation
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Intel Pentium 4 microprocessor (2000)Intel Pentium 4 microprocessor (2000)
42 M transistors (217 mm2)
1.5 GHz
0.18 µm
180 nm technology node
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What Happened over 30 Years?What Happened over 30 Years?
1971 2000
2,300 transistors108 KHz operation
42 M transistors1.5 GHz operation
~ 15,000 x
Automotive comparison: SF to NY in 13 seconds.
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MooreMoore’’s Laws Law
# In 1965, Gordon Moore noted that the number of transistors on a chip doubled every 18 to 24 months.
# He made a prediction that semiconductor technology will double its effectiveness every 18 months
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MooreMoore’’s Laws Law
16151413121110
9876543210
1959
1960
1961
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1971
1972
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LO
G2 O
F T
HE
NU
MB
ER
OF
CO
MP
ON
EN
TS
PE
R IN
TE
GR
AT
ED
FU
NC
TIO
N
Electronics, April 19, 1965.
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Evolution in ComplexityEvolution in Complexity
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Transistor CountsTransistor Counts
1,000,000
100,000
10,000
1,000
10
100
11975 1980 1985 1990 1995 2000 2005 2010
8086
80286i386
i486Pentium®
Pentium® Pro
K1 Billion 1 Billion
TransistorsTransistors
Source: IntelSource: Intel
ProjectedProjected
Pentium® IIPentium® III
Courtesy, Intel
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MooreMoore’’s law in Microprocessorss law in Microprocessors
40048008
80808085 8086
286386
486Pentium® proc
P6
0.001
0.01
0.1
1
10
100
1000
1970 1980 1990 2000 2010Year
Tra
nsi
sto
rs (
MT
)
2X growth in 1.96 years!
Transistors on Lead Microprocessors double every 2 yearsTransistors on Lead Microprocessors double every 2 years
Courtesy, Intel
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Die Size GrowthDie Size Growth
40048008
80808085
8086286
386486 Pentium ® proc
P6
1
10
100
1970 1980 1990 2000 2010Year
Die
siz
e (m
m)
~7% growth per year~2X growth in 10 years
Die size grows by 14% to satisfy Moore’s LawDie size grows by 14% to satisfy Moore’s Law
Courtesy, Intel
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FrequencyFrequency
P6Pentium ® proc
486386
28680868085
8080
80084004
0.1
1
10
100
1000
10000
1970 1980 1990 2000 2010Year
Fre
qu
ency
(M
hz)
Lead Microprocessors frequency doubles every 2 yearsLead Microprocessors frequency doubles every 2 years
Doubles every2 years
Courtesy, Intel
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Power DissipationPower Dissipation
P6Pentium ® proc
486
3862868086
80858080
80084004
0.1
1
10
100
1971 1974 1978 1985 1992 2000Year
Po
wer
(W
atts
)
Lead Microprocessors power continues to increaseLead Microprocessors power continues to increase
Courtesy, Intel
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Power will be a major problemPower will be a major problem
5KW 18KW
1.5KW 500W
40048008
80808085
8086286
386486
Pentium® proc
0.1
1
10
100
1000
10000
100000
1971 1974 1978 1985 1992 2000 2004 2008Year
Po
wer
(W
atts
)
Power delivery and dissipation will be prohibitivePower delivery and dissipation will be prohibitive
Courtesy, Intel
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Power densityPower density
400480088080
8085
8086
286386
486Pentium® proc
P6
1
10
100
1000
10000
1970 1980 1990 2000 2010Year
Po
wer
Den
sity
(W
/cm
2)
Hot Plate
NuclearReactor
RocketNozzle
Power density too high to keep junctions at low tempPower density too high to keep junctions at low temp
Courtesy, Intel
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Not Only MicroprocessorsNot Only Microprocessors
Digital Cellular Market(Phones Shipped)
Analog Baseband
Digital Baseband
(DSP + MCU)
PowerManagement
Small Signal RF
PowerRF
CellPhone
(889)(836)(776)(703)64851343516248Units (M)
200820072006200520042003200019981996Year
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Challenges in Digital DesignChallenges in Digital Design
“Microscopic Problems”• Ultra-high speed design• Interconnect• Noise, Crosstalk• Reliability, Manufacturability• Power Dissipation• Clock distribution.
Everything Looks a Little Different
“Macroscopic Issues”• Time-to-Market• Millions of Gates• High-Level Abstractions• Reuse & IP: Portability• Predictability• etc.
…and There’s a Lot of Them!
∝ (# Transistors)
∝ 1/(Transistor size)
?
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Productivity TrendsProductivity Trends
1
10
100
1,000
10,000
100,000
1,000,000
10,000,000
2003
1981
1983
1985
1987
1989
1991
1993
1995
1997
1999
2001
2005
2007
2009
10
100
1,000
10,000
100,000
1,000,000
10,000,000
100,000,000
Logic Tr./ChipTr./Staff Month.
xxx
xxx
x
21%/Yr. compoundProductivity growth rate
x
58%/Yr. compoundedComplexity growth rate
10,000
1,000
100
10
1
0.1
0.01
0.001
Lo
gic
Tra
nsi
sto
r p
er C
hip
(M)
0.01
0.1
1
10
100
1,000
10,000
100,000
Pro
du
ctiv
ity
(K)
Tra
ns.
/Sta
ff -
Mo
.
Source: Sematech
Complexity outpaces design productivity
Co
mp
lexi
ty
Courtesy, ITRS Roadmap
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Why Scaling?Why Scaling?
! Technology shrinks by 0.7/generation! With every generation can integrate 2x more
functions per chip; chip cost does not increase significantly
! Cost of a function decreases by 2x! But …
" How to design chips with more and more functions?" Design engineering population does not double every
two years…
! Hence, a need for more efficient design methods" Exploit different levels of abstraction
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Design Abstraction LevelsDesign Abstraction Levels
n+n+S
GD
+
DEVICE
CIRCUIT
GATE
MODULE
SYSTEM
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Next ClassNext Class
! Introduce basic metrics for design of integrated circuits – how to measure delay, power, etc.
! Introduction to IC manufacturing and design.
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