Digital signal processing: I2S in ESP32

Post on 05-Apr-2022

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transcript

Digital signal processing:

I2S in ESP32

Anthony LE CREN, F4GOH – KF4GOH1/14

(K)F4GOH, Anthony Le Cren

• Ham since 2010,

• Conception,

• Development,

• Not really active on air.

2/14

Professor of computer science at Gabriel Touchard – Washington High

School. (Le Mans, France)

3/23

ESP32

4/14

Up to 240 Mhz

WiFi

Inside ESP32

5/14

Boards description

6/14

ESP32 Sheild (top) (below)

DRA818+OLED RC Filter+PTT

ADC DAC

Smartphone and Wifi AP

7/14

• Smartphone receive and send messages with a web browser

• No specific application in the smartphone

• ESP32 encode and decode audio signal from the DRA818

FreeRTOS

8/14

• Native for ESP32

• Handle multiple tasks in parallel

• Kind of turnstile

RTTY

9/14

RTTY decoding

• Goertzel algorithm and RTTY decoder

• Wifi Acces point

• Web server

• RTTY encoder

10/14

The WEB server manque le bt config

11/14

Field exercise

12/14

Updates

• Add numeric pass band filter on reception.

• RTTY with 1,5 bit stop

• Record RTTY configuration.

• APRS decode and encode

13/14

Contact Information

14/14

• f4goh@orange.fr

• https://hamprojects.wordpress.com/