DMT 121 – ELECTRONIC 1

Chapter 4

DC Biasing – Bipolar Junction Transistors (BJTs)

OBJECTIVES Discuss the concept of dc biasing of a transistor Analyze voltage-divider bias, base bias, emitter

bias and collector-feedback bias circuits. Basic troubleshooting for transistor bias circuits.

INTRODUCTION For the transistor to properly operate it must be

biased. There are several methods to establish the DC operating point.

We will discuss some of the methods used for biasing transistors as well as troubleshooting methods used for transistor bias circuits.

BIASING & 3 STATES OF OPERATION Active or Linear Region Operation

Base–Emitter junction is forward biasedBase–Collector junction is reverse biased

Cutoff Region OperationBase–Emitter junction is reverse biased

Saturation Region Operation

Base–Emitter junction is forward biased

Base–Collector junction is forward biased

DC OPERATING POINTThe goal of amplification in most cases is to increase the amplitude of an ac signal without altering it.

DC OPERATING POINT

For a transistor circuit to amplify it must be properly biased with dc voltages. The dc operating point between saturation and cutoff is called the Q-point. The goal is to set the Q-point such that that it does not go into saturation or cutoff when an a ac signal is applied.

IB IC and VCE

IB IC and VCE

DC OPERATING POINT

Recall that the collector characteristic curves graphically show the relationship of collector current and VCE for different base currents. With the dc load line superimposed across the collector curves for this particular transistor we see that 30 mA (IB = 300 A) of collector current is best for maximum amplification, giving equal amount above and below the Q-point. Note that this is three different scenarios of collector current being viewed simultaneously.

DC OPERATING POINT

With a good Q-point established, look at the effect of superimposed ac voltage has on the circuit. Note the collector current swings do not exceed the limits of operation (saturation and cutoff). However, as you might already know, applying too much ac voltage to the base would result in driving the collector current into saturation or cutoff resulting in a distorted or clipped waveform.

Key terms DC Load LineA straight line plot of IC and VCE for a transistor

circuit.

Q-pointDC operating point along line between

saturation and cutoff

Linear RegionA region of operation along the load line

between saturation and cutoff

WAVEFORM DISTORTION

Graphical load line illustration of a transistor being driven into saturation and/or cutoff

WAVEFORM DISTORTION

FIXED-BIAS (BASE-BIAS) CIRCUIT

Simplest transistor bias configuration. Commonly used in relay driver circuits. Extremely beta-dependant and very unstable

Fixed-bias circuit. DC equivalent circuit.

FIXED-BIAS (BASE-BIAS) CIRCUIT

B

BECCB

BEBBCC

R

VVI

VRIV

0

B

BECCC

R

VVI

VCC – ICRC – VCE = 0

VCE = VCC – ICRC; then

= VC – VE since VE = 0

VCE = VC

Measuring VCE and VC.

VBE = VB – VE (since VE = 0)

VBE = VB

Since IC = IB, then

C

CECCC

R

VVI

Base – Emitter loop Collector – Emitter loop

Sensitive to Beta

Fixed-bias (base-bias) - SummaryCircuit recognition : A single resistor (RB) between the base terminal and VCC. No emitter resistor.

Q-point stability : Q-point is more dependent on βdc, so it becomes β

dependent and unpredictable. Βdc varies with temperature and IC.

Advantage: Circuit simplicity.

Disadvantage: Q-point shift with temperature

Applications: Switching circuits only. Rarely used in linear operation.

Cont’d Summary

(sat )

(off )

CCC

C

CE CC

VI

R

V V

Load line equations:

Q-point equations:

B

BECCC

R

VVI

CCCCCE RIVV

B

BECCB

R

VVI

EXAMPLEGiven that VBE = 0.7 V and βDC = 100, determine the Q-point values

EXAMPLE

Given that VBE = 0.7 V, RB=22kΩ, RC=100 Ω and βDC = 90, determine the Q-point values

EMITER BIAS

Use both a positive and a negative supply voltage on emitter or it just contain an emitter resistor to improve stability level over fixed – bias configuration.

BJT bias circuit with emitter resistor.

An npn transistor with emitter bias. Polarities are reversed for a pnp transistor. Single subscripts indicate voltages with respect to ground.

EMITER BIAS – only RE

Collector – Emitter loop

VCC – ICRC – VCE – IERE = 0

IE IC

VCC – ICRC – VCE –ICRE = 0

VCC – VCE = IC (RC + RE)

EB

BECCB

RR

VVI

)1(

EB

BECCC

RR

VVI

)1(

)(

BJT bias circuit with emitter resistor.

Base – Emitter loop

VCC – IBRB – VBE – IERE = 0

IE = ( + 1) IB

Then, VCC – IBRB – VBE – ( + 1)IBRE = 0.

Less sensitivity to beta

Since IC = IB, so IC also equivalent to

EC

CECCC

RR

VVI

EMITER BIAS –RE + DC Voltage Supply

EB

BEEEB

RR

VVI

)1(

EC

EECECCC

RR

VVVI

Base – Emitter loop

VEE + IBRB + VBE + IERE = 0

IE = ( + 1) IB

Then, VEE + IBRB + VBE + ( + 1)IBRE = 0.

Less sensitivity to beta

EB

BEEEC

RR

VVI

)1(

)(

Collector – Emitter loop

VCC – ICRC – VCE – IERE + VEE = 0

IE IC

VCC – ICRC – VCE –ICRE + VEE = 0

VCC – VCE + VEE = IC (RC + RE)

EMITTER BIAS - Summary

Circuit recognition:

Dual-polarity power supply (+ve and -ve) and the base resistor is connected to ground.

Stability :

Adding RE to the emitter improves the stability of a transistor

Stability refers to a bias circuit in which the currents and voltages will remain fairly constant for a wide range of temperatures and transistor Beta () values.

Advantage: The circuit Q-point values are stable against changes in β.

Disadvantage: Requires the use of dual-polarity power supply.

Applications: Used primarily to bias linear amplifiers.

EMITTER BIAS - SummaryWith only Resistor at Emitter

With DC Voltage supply + Resistor at Emitter

EB

BEEEB

RR

VVI

)1(

EC

EECECCC

RR

VVVI

EB

BEEEC

RR

VVI

)1(

)(

EC

CECCC

RR

VVI

EB

BECCC

RR

VVI

)1(

)(

EB

BECCB

RR

VVI

)1(

LOOP CE LOOP CELOOP BELOOP BE

Since IC = βIB , so Since IC = βIB , so

EMITTER BIAS - Summary

EB

BEEEC

RR

VVI

Less sensitivity to beta or independent to beta

Previous analysis we use IE = ( + 1) IB; but if use IE IC IB, then from previous slide we can get.

OR we also can use ( + 1) to get the same result.

•If RE >>> RB/ then we can drop RB/ in equation

E

BEEEC

R

VVI

•If VEE >>> VBE then

E

EEC

R

VI

Independent to VBE

EMITTER BIAS - SummaryLoad line equations:

Q-point equations:

EB

CCEEC

RR

VVI

)1(

EEECCCCCE VRRIVV )(

EB

CCEEB

RR

VVI

)1(

(sat )

( )CC EE CC EEC

C E C E

V V V VI

R R R R

( )CE off CC EE CC EEV V V V V

EMITTER BIAS - SummaryVoltage with respect to ground :

Emitter voltage;VE = VEE+IERE

Base voltage;VB = VE + VBE

Collector voltage;VC = VCC - ICRC

EXAMPLE Given that Vcc = +12V, VEE = -12V, RB=100kΩ,

RC=750 Ω, RE =1.5kΩ, β=200. Find the value of IB,IE and VCE

EXAMPLE

Given that Vcc = 5V, VEE = -5V, RB=10kΩ, RC=1.0k Ω, RE =2.2kΩ, β=100. Find the voltage of terminal with respect to ground

EXAMPLEFrom previous Figure, Find the voltage of

terminal with respect to ground