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ECE 255: L25
Cascode Amplifiers (Sedra and Smith, 7th Ed., Sec. 8.5)
Mark Lundstrom School of ECE
Purdue University West Lafayette, IN USA
Spring 2019 Purdue University
Announcements
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1) HW8 due at 5:00 PM Friday, March 29
2) Exam 3 is at 6:30 PM, Tuesday, April 2
3) Spice Project 3 will be due on April 17
Lundstrom: 2019
CS amplifier
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+
υi
−
+
υ0
−
D S
VDD
RD
G
Aυo= υo
υi
= −gmRD
Rin = ∞
Ro = RD
CS amplifier with active load
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+
υi
−
+
υ0
−
D S
VDD
G
IO
Ideal current source
RO = ∞ Aυo= υo
υi
= −gmro
Rin = ∞
Ro = ro
But this gain is not large enough
Aυo= −A0
Solution: cascade amplifiers
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Examples: CE:CE CC:CE CE:CC
CE:CB or CS:CG = “cascode”
Stage 2 Stage 1
Basic cascode
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+
υi
−
υ0
D S
G
VG2
“cascaded cathode”
grid
plate
cathode
Q1
Q2
Cascode amplifiers
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CG CS
Discrete transistor version first Then MOS IC cascodes
Outline
8
1) Introduction
2) Discrete cascode
3) IC MOS cascode
4) Discussion
5) BJT cascode
6) Summary
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Discrete CS:CG cascode
9
+
υi
−
υ0
VDD
RD
RSυsig
Rsig
CS
R1
R2
R3
CG
CC1
CC2
RL
Q1
Q2
CS:CG discrete cascode (without bias resistors)
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+υi
−
Aυo= Aυ1
× Aυ2
RD
+υo
−
Aυo= −gm1
1gm2
⎛⎝⎜
⎞⎠⎟× gm2RD
Aυo= −gm1RD
Rin = ∞
Ro = RD
Q1
Q2
CS:CG cascode summary
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CS CG
• Input resistance of CS • Output resistance of CS • Voltage gain of CS
(excellent high frequency response)
Aυo≈ −1 Aυo
= +gmRD
Outline
12
1) Introduction
2) Discrete cascode
3) IC MOS cascode
4) Discussion
5) BJT cascode
6) Summary
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CS:CG cascode (IC)
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+υi
−
υo
Rin = ∞
Q1
Q2
Aυo= Aυ1
× Aυ2
Aυo= −gm1 ro1 || Rin2( )× gm2Rout2
Rin2
Rout2
Recall L24
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RL
RS
Rout = ro + 1+ gmro( )Rseries
Rout ≈ ro + gmro( )RS
Rin =ro + RL( )1+ gmro( )
Rin ≈1gm
+ RL
gmro
Rout ≈ gmro( )RS
First stage gain
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+υi
−
υo
Rin = ∞
Q1
Q2 Aυ1
= −gm1 ro1 || Rin2( )
Rin2
Rout2
Rin2 ≈1gm
+ RL
gmro
Aυ1= −gm1 1 gm2( ) ≈ −1
Second stage gain
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+υi
−
υo
Rin = ∞
Q1
Q2
Aυ2= +gm2Rout2
Rin2
Rout2
Aυ2= +gm2 gm2r02r01( )
Rout 2 ≈ ro2 + gm2ro2( )RSRout 2 ≈ gm2ro2( )ro1
Total gain
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+υi
−
υo
Rin = ∞
Q1
Q2
Rin2
Rout2
Aυo= − gm1r01( ) gm2r02( )
Aυo= Aυ1
× Aυ2
Aυ1= −gm1 1 gm2( )
Aυ2= +gm2 gm2r02r01( )
Total gain of cascode
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+υi
−
υo
Rin = ∞
Q1
Q2
Rout2
Aυo= − gmr0( )2
Aυo= −A0
2
An easier way
19
+υi
−
Q1
Q2
Rin2
Rout2
gm1υi
υo = − gm1υi( )Rout2
Rout 2 ≈ gm2ro2( )ro1
Aυi= − gmro( )2
Aυo= −A0
2
gm1υi
Recall: CS amplifier with active load
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+
υi
−
+
υ0
−
D S
VDD
G
IO
Ideal current source
RO = ∞
Aυo= −gmro
Aυo= −A0
Aυo= − A0( )2Cascode:
Outline
21
1) Introduction
2) Discrete cascode
3) IC MOS cascode
4) Discussion
5) BJT cascode
6) Summary
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Implementation
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VDD
R1
Q2
IREF
Q3
cascode amplifier
υo
Implementation
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+υi
−
υ0
VG2
Q1
Q2
VDD
IO Aυo= − gmr0( )2
Aυo= −gm gmr0( )ro⎡⎣ ⎤⎦ || rop
Aυo≈ −gmro = −A0
PNP current mirror
The solution is to use a cascode current course.
(S&S p. 549)
Include a load resistor
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+υi
−
υo
Q1
Q2
Rin2
Rout2 RL
Aυo= −gm1Rout2 || RL
Rout2 = gm2ro2( )ro1
But now, can you find the gain of stage 1 (it depends on RL!). See S&S, Sec. 8.5.3
Double cascode
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+υi
−
Q2
Q1
+υo
−
Q3
⇐ R02 = gm2ro2( )r01 ⇐ R03 = gm3ro3( )R02R03 = gm3ro3( ) gm2ro2( )r01
Aυo= −gmRo3 Aυo
= − gmr0( )3
Outline
26
1) Introduction
2) Discrete cascode
3) IC MOS cascode
4) Discussion
5) BJT cascode
6) Summary
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BJT cascode
27
+υi
−
Q1
Q2
Rout2
gm1υi
υo = − gm1υi( )Rout2
Recall L24
28
RL
RS
Rout = ro2 + 1+ gm2ro2( ) RS || rπ 2( )
Q2 Rout = ro2 + 1+ gm2ro2( ) ro2 || rπ 2( )
Rout ≈ gm2ro2( ) ro2 || rπ 2( )
cannot be as larges as for the MOS case
BJT cascode
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+υi
−
Q1
Q2
Rout2
gm1υi υo = − gm1υi( )Rout2
Rout ≈ gm2ro2( ) ro2 || rπ 2( )
Aυo= −gm1 gm2ro2( ) ro2 || rπ 2( )
Aυo max= −gm1 gm2ro2( )rπ 2
Aυo max= −βgmro = −βA0
BJT cascode
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+υi
−
Q1
Q2
Rout2
gm1υi
Aυo max= −βA0
See the discussion in Sec. 8.5.6 of S&S
Outline
31
1) Introduction
2) Discrete cascode
3) IC MOS cascode
4) Discussion
5) BJT cascode
6) Summary
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Cascode:
Aυo= − gmro( )2
Summary
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+
υi
−
+
υ0
−
D S
VDD
G
Aυo= −gmro
IO
Ideal current source
RO = ∞Common Source:
Double Cascode:
Aυo= − gmro( )3
Questions
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1) Introduction
2) Discrete cascode
3) IC MOS cascode
4) Discussion
5) BJT cascodes
6) Summary