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EE5390: Analog Integrated Circuit DesignIntroduction
Nagendra Krishnapura
Department of Electrical EngineeringIndian Institute of Technology, Madras
Chennai, 600036, India
6 Jan. 2010
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Course info
http://www.ee.iitm.ac.in/∼nagendra/EE539/201001/courseinfo.html
TAs: P. Rakesh, Kunal Karanjkar
E Slot (Tue. 1100-1150, Wed. 1000-1050, Thu. 0800-0850, Fri.1400-1450)
Check it regularly for recorded lectures, assignments, andreferences
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Modern signal processing systems
DSP...0100011011...
Digital Processing
Interface Electronics
(A-D and D-A Conversion)
. . .
Sensor(s) Actuator(s)
. . .. . .
(Signal Conditioning)
Continuous-timeContinuous-amplitude
Discrete -timeDiscrete -amplitude
Continuous-timeContinuous-amplitude
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Analog circuits in modern systems on VLSI chips
Analog to digital conversion
Digital to analog conversion
Amplification
Signal processing circuits at high frequencies
Power management-voltage references, voltageregulators
Oscillators, Phase locked loops
The last two are found even on many “digital” ICs
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Image sensor[ISSCC 2004]
Chip Micrograph
Chip size: 4.74mm x 6.34mm
10b pipelined
ADC
Column
CDS circuits
Timing Generator
I/O circuit
703 x 499 pixels
(VGA format)
Voltage
Regulator
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
DRAM[ISSCC 2004]
512K
ARRAY
VPP PUMP
1088
SENSE AMPS
64 I/Os
DATA LINES
64 I/OsADDRESSES
AND CONTROL
BANK 3
BANK 2
BANK 1
BANK 0
ROW
DECODERS
COLUMN
DECODERS
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Analog IC design in India
Many companies starting analog centers
Multinationals-TI, National, ST, ADI etc.
Indian start ups-Cosmic, Manthan, Karmic, Sankalp etc.
Big demand for skilled designers
Interesting and profitable activity ⌣̈
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Course goals
Learn to design negative feedback circuits on CMOS ICs
Negative feedback for controlling the output
Amplifiers, voltage references, voltage regulators, biasing
Phase locked loops
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Course prerequisites
Circuit analysis-small and large signal
Laplace transforms, frequency response, Bode plots,Differential equations
Opamp circuits
Single transistor amplifiers, differential pairs
EE542 (Analog Electronic Circuits)/EC201 (Analog Circuits)
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Course contents-Negative feedback amplifiers
Amplifiers using negative feedback
Stability, Frequency compensation
Negative feedback circuits using opamps
Opamp macromodel
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Course contents-Opamps on CMOS ICs
Components available on a CMOS integrated circuit
Device models-dc small signal, dc large signal, ac smallsignal, mismatch, noise
Single stage opamp
Cascode opamps
Two stage opamp with miller compensation
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Course contents-Fully differential circuits
Differential and common mode half circuits, common modefeedback
Fully differential miller compensated opamp
Fully differential feedforward compensated opamp
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Course contents-Phase locked loop
Frequency multiplication using negative feedback
Type I, type II loops
Oscillators
Phase noise basics
PLL noise transfer functions
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Course contents-Design of opamps
Single stage opamp
Folded, telescopic cascode opamps
Two stage opamp
Fully differential opamps and common mode feedback
Applications: Bandgap reference, constant gm biasgeneration
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Course contents-Applications
Bandgap reference
Constant current and constant gm bias generators
Continuous-time filters
Switched capacitor filters
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Design versus Analysis
Design: Create something that doesn’t yet exist
Analysis: Analyze something that exists
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
To be able to design
Knowing analysis is necessary, not sufficient
Multiple ways of looking at building blocks
Trial and error approaches
Intuitive thinking/understanding
Curiosity
Open mind
Thoroughness
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Intuition
Intuitive thinking is not sloppy thinking!
Relate problems to other problems already solved
Use boundary conditions, dimension checks etc.Build your intuition
Solve many problemsThink about why the answer is what it isCome up with the form of the solution before applying fullblown analysis
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Circuit analysis
Nodal analysis-Kirchoff’s Current Law (KCL) at each node
Solve N simultaneous equations for an N node circuit
Mesh analysis-Kirchoff’s Voltage Law (KVL) around eachloop
Solve M simultaneous equations for a circuit with Mindependent loops
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Nodal analysis
i11(v) + i12(v) + . . . + i1N(v) = i1i21(v) + i22(v) + . . . + i2N(v) = i2
...
iN1(v) + iN2(v) + . . . + iNN(v) = iN
ikl : Current in the branch between nodes k and l
ikk : Current in the branch between node k and ground
vk : Voltage at node k ; v = [v1v2 . . . vN ]T
ik : Current source into node k
ikl can be a nonlinear function of v
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Nodal analysis—Linear circuits
g11v1 + g12v2 + . . . + g1NvN = i1g21v1 + g22v2 + . . . + g2NvN = i2
...
gN1v1 + gN2v2 + . . . + gNNvN = iN
gkl : Conductance between nodes k and l
gkk : Conductance between node k and ground
vk : Voltage at node k
ik : Current source into node k
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Nodal analysis—Independent voltage source
...
gk1v1 + gk2v2 + . . . + gkNvN = ik node k...
vk = Vo node k
Ideal voltage source Vo connected to node k
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Nodal analysis—Controlled voltage source
...
gk1v1 + gk2v2 + . . . + gkNvN = ik node k...
vk − kvl = 0 node k
Voltage controlled voltage source vk = kvl driving node k
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Nodal analysis—Controlled voltage source
gk1v1 + gk2v2 + . . . + gklvl + . . . + gkNvN = ik node k
gk1v1 + gk2v2 + . . . +vk
Rm+ . . . + gkNvN = ik node k
gl1v1 + gl2v2 + . . . + glkvk + . . . + glNvN = il node l
gl1v1 + gl2v2 + . . . −vk
Rm+ . . . + glNvN = il node l
Current controlled voltage source vk = Rmikl driving node k
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Nodal analysis—Controlled current source
gk1v1 + gk2v2 + . . . + gklvl + . . . + gkNvN = ik + gmvl
gk1v1 + gk2v2 + . . . + gklvl − gmvl + . . . + gkNvN = ik
Current controlled voltage source i0 = gmvl driving node k
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Nodal analysis—Ideal opamp
...
gm1v1 + gm2v2 + . . . + gmNvN = im node m...
vk − vl = 0 node m
Ideal opamp with input terminals at nodes k , l and outputat node m
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Nodal analysis—solution
g11g12 . . . g1N
g21g22 . . . g2N...
gN1gN2 . . . gNN
v1
v2...
vN
=
i1i2...
iN
Gv = i
v = G−1i
gkl : Conductance between nodes k and lgkk : Conductance between node k and groundvk : Voltage at node kik : Current source into node kModified terms for voltage sources or controlled sourcesMatrix inversion yields the solution
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Nodal analysis—solution
vk =
∣
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g11g12 . . . i1 . . . g1N
g21g22 . . . i2 . . . g2N...
gN1gN2 . . . iN . . . gNN
∣
∣
∣
∣
∣
∣
∣
∣
∣
∣
∣
∣
∣
∣
∣
∣
∣
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g11g12 . . . g1k . . . g1N
g21g22 . . . g2k . . . g2N...
gN1gN2 . . . gNk . . . gNN
∣
∣
∣
∣
∣
∣
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Cramer’s rule can be used for matrix inversion
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Circuits with capacitors and inductors
Y11(s)Y12(s) . . . Y1N(s)Y21(s)Y22(s) . . . Y2N(s)
...YN1(s)YN2(s) . . . YNN(s)
V1(s)V2(s)
...VN(s)
=
I1(s)I2(s)
...IN(s)
Y(s)V (s) = I(s)
V (s) = Y−1I(s)
Conductances gkl replaced by admittances Ykl(s)
Roots of the determinant of Y(s) are system poles
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Laplace transform analysis for linear systems
Input Output
X (s) H(s)X (s)
est H(s)est
X (jω) H(jω)X (jω)
ejωt H(jω)ejωt
cos(ωt) |H(jω)| cos (ωt + ∠H(jω)) (Steady state solution)
Linear time invariant system described by its transferfunction H(s)
H(s) is the laplace transform of the impulse response
s = jω represents a sinusoidal frequency ω
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Laplace transform analysis for linear systems
Transfer function H(s) (no poles at the origin)
H(s) = Adc1 + b1s + b2s2 + . . . + bMsM
1 + b1s + b2s2 + . . . + bNsN
= Adc
∏Mk=1 1 + s/zk
∏Nk=1 1 + s/pk
Single pole at the origin
H(s) =ωu
s
∏Mk=1 1 + s/zk
∏Nk=2 1 + s/pk
All poles pk must be in the left half plane for stability
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Frequency and time domain analyses
Frequency domain
Algebraic equations-easier solutions
Only for linear systems
Time domain
Differential equations-more difficult to solve
Can be used for nonlinear systems as well
Piecewise linear systems occur quite frequently (e.g.saturation)
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Bode plots
Sinusoidal steady state response characterized by |H(jω)|,∠H(jω)
Bode plot: Plot of 20 log |H(jω)|, ∠H(jω) versus log ωapproximated by straight line segments
Good approximation for real poles and zeros
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
Simulators
Very powerful tools, indispensable for complex calculations, butGIGO!
Matlab: System level analysis (Frequency response,pole-zero, transfer functions)
Spice: Circuit analysis
Maxima: Symbolic analysis
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
References: Recorded lectures
EC201: Analog Circuits
EE539: Past years’ lectures
URL: http://www.ee.iitm.ac.in/∼nagendra/videolectures/
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design
References
Behzad Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, August 2000.
Hayt and Kemmerly, Engineering Circuit Analysis, McGraw Hill, 6/e.
B. P. Lathi, Linear Systems and Signals, Oxford University Press, 2 edition, 2004.
Sergio Franco, Design with operational amplifiers and analog ICs, Tata McGraw Hill.
H. Takahashi et al., “A 3.9 µm pixel pitch VGA format 10b digital image sensor with 1.5-transistor/pixel,”IEEE International Solid-State Circuits Conference, vol. XVII, pp. 108 - 109, February 2004.
M. Zargari et al., “A single-chip dual-band tri-mode CMOS transceiver for IEEE 802.11a/b/g WLAN,” IEEEInternational Solid-State Circuits Conference, vol. XVII, pp. 96 - 97, February 2004.
K. Hardee et al. “A 0.6V 205MHz 19.5ns tRC 16Mb embedded DRAM,” IEEE International Solid-StateCircuits Conference, vol. XVII, pp. 200 - 201, February 2004.
Nagendra Krishnapura EE5390: Analog Integrated Circuit Design