Feb 20, 2004 K.Okada 1

ERT TimingIn the DMUX file

08 12 00 00 00 00 00 3003 03 01 02 00 00 00 01B4 8C28 50 00 40 0028 50 00 40 0028 50 00 40 0028 50 00 40 0028 50 00 00 0C28 58 00 00 0C

“cable delays”.

“Level-1 latency”

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tEMCal,RICHsignals

ERT clockCable to cable

GL1Level-1 Latency (ROC by ROC)

cable delays

MiscWrite serial string ( ROC by ROC)GTM (Whole arm)

Global timing tune

RBIB input

Vince’s lecture

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Timing AdjustmentThe procedure might be the following.

1. Confirm the EMCal, RICH signals are in the middle of ERT clock. Using RBIB input signals in scope, see the both edge by changing the timing. (You can use any of GTM, MiscWrite, cable delay) 2. Then the next step is Level-1 latency adjustment. Check the data taken with different setting.

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Example in Run4The next slides show the result of time scan performed on January 19, 2004. I just changed “Level-1 delay”.

Run delay data-entry GL1-entry109704 +30 yes yes109702 +20 yes yes109701 +10 yes yes109714 -10 yes yes109715 -20 marginal yes109716 -30 no yes

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So the current timing diagram must be like this

10ns~20ns

Level-1 Latency

RBIB input

Am I correct?

Feb 20, 2004 K.Okada 6

ERT Time Scan (Jan 19)In the DMUX file

08 12 00 00 00 00 00 3003 03 01 02 00 00 00 01B4 8C28 50 00 40 0028 50 00 40 0028 50 00 40 0028 50 00 40 0028 50 00 00 0C28 58 00 00 0C

Several runs with different “cable delays”.

“Level-1 latency” wasn’t changed.

See the ERT2x2 entries.

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Runs east westDefault : 28 50 : 00 50+10ns : 50 50 : 28 50 : 109701+20ns : 78 50 : 50 50 : 109702, 109703+30ns : A0 50 : 78 50 : 109704-10ns(1) : C8 C0 : A0 C0 : 109705-20ns(1) : A0 C0 : 78 C0 : 109712-30ns(1) : 78 C0 : 50 C0 : 109713-10ns(2) : C8 D0 : A0 D0 : 109714-20ns(2) : A0 D0 : 78 D0 : 109715-30ns(2) : 78 D0 : 50 D0 : 109716

To set minus value, I used anti-polarity. Since I was not sure thatwhich way the polarity twitch moves, I tried two ways.(1) Subtract 1 clock ticks. –10=+53-106 + 40.(2) Without any clock tick movement. –10=-53+40. From the continuity, (2) seems to be the right answer.

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