Post on 21-Jan-2016
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1Tung-Chien Chen @ DAPIC LAB / GIEE NTUMPEG-4 ASP with deblocking H.264/AVC Baseline
H.264 Newest video coding standard Superior compression performance Wide range of applications
Real-time mobile system / HD-DVD / DVB-H
A 1.3 TOPS H.264/AVC Single-Chip Encoder for HDTV Applications
2Tung-Chien Chen @ DAPIC LAB / GIEE NTU
Rec. MBSRAM
Deblock SRAM
Residue MBSRAM
BitstreamSRAM
Luma Ref. Pels SRAMs
Cur. Luma & Chroma MBSRAM
MC Luma MB SRAM
Main Controller
System Bus Interface
Local Bus Interface
Upper Ref. & MV SRAM
Cur. Luma MBReg.
MC Chroma MBSRAM
Upper Pels & I4MBSRAM
Total Coeff. SRAM
Upper MB QP & IntraFlag SRAM
IME Engine FME Engine
Encoder Chip
1st Stage 2nd Stage 3rd Stage 4th Stage
EC Engine
DB Engine
IP Engine
3MB LocalExternal Memory
(Ref. Frames)
AHB Master/Slave DRAM Controller
AHB
RISCVideo Input System ExternalMemory
System Bus Interface
AHB Master/Slave DRAM Controller
AHB
RISCVideo Input System ExternalMemory
BE MCDCT/ Q/IQ / IDCT VLCME
Traditional
Proposed
3Tung-Chien Chen @ DAPIC LAB / GIEE NTU
High performance HDTV720p 30fps specification wit
h competitive video quality Efficient techniques
Four-stage MB pipelining Low bandwidth Integer-ME Fully pipelined Fraction-ME Reconfigurable Intra Engine
IME
FME
Lum
aR
ef0
Pels
SR
AM
s
Lum
a R
ef1
-3 P
els S
RAM
s
Lum
a R
ef1
-3 P
els S
RAM
s
IP
EC
DB
SR
AM
s
SR
AM
s
SR
AM
s 581mW for D1
785mW for HDTV720pPower Consumption
1.8VSupply Voltage
81MHz for D1
108MHz for HDTV720pOperating Frequency
Baseline Profile CompressionEncoding Tools
34.72KBSRAM
922.8K (2-input NAND gate)Logic Gates
7.68 4.13mm2Core Area
UMC 0.18Technology
581mW for D1
785mW for HDTV720pPower Consumption
1.8VSupply Voltage
81MHz for D1
108MHz for HDTV720pOperating Frequency
Baseline Profile CompressionEncoding Tools
34.72KBSRAM
922.8K (2-input NAND gate)Logic Gates
7.68 4.13mm2Core Area
UMC 0.18 um CMOS 1P6MTechnology
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