Post on 29-Oct-2019
transcript
Hardware-Assisted Energy
Consumption Evaluation Tool for
Multi-core Embedded Systems
Shiao-Li (Charles) Tsao, Jyun-Wei Lin, QuanChung Chen,
Chen-Wei Huang, Chi-Neng Huang+
Department of Computer Science,
National Chiao Tung University, Hsinchu, Taiwan+Information and Communications Research Laboratories,
Industrial Technology Research Institute, Taiwan
Broadband Radio Access Software & System Lab. @ NCTU CS 1
Outline
Introduction
Related Work
REALprof: Our Proposed Solution
Implementation and Evaluation
Conclusions and Future Work
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Introduction
Powerful embedded systems become popular
– multi-core
– full-scale OS
Energy consumption is a critical issue for embedded systems, especially for these high-end systems
The energy consumption evaluation tools are highly demanded
– SoC design phase
– system integration phase
– end product phase
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Related Work
Model-based
– SoC design phase
– system integration phase
– end product phase
Measurement-based
– system integration phase
– end product phase
In this paper, we consider a SoC design phase tool and a model-based approach
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Model-based Approaches
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SimulatorTarget
platformor
OS
AP #1
AP #2
AP #3
Event logs
eicpudcadcaiexeciexeccpuTPNENEE
eidtmdtmdcmdcmsdramTPNENEE
aaiiststspsphd TnPTNPTNPTPE )1(
3W 0.2W 0.3W 0W
5W 0.8W 1.1W 1.5W
4W 2.1W 1.3W 0.4W
2W 0.2W 0.2W 0.1W
Powermodels
Model-based Approaches
Gate-level and circuit-level simulations
– Synopsys HSPICE and Synopsys PrimeTime
Architecture-level simulations
– Wattch and EMSIM
Require considerable simulation time for evaluating complex embedded systems
– why not utilize hardware speedup
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Model-based Approaches with
Hardware Speedup
Utilize hardware performance and energy counters/registers in evaluating the power consumption of the system
– need target SoC supports
• SoC design-in counters/registers
– introduce considerable profiling software tool overheads
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Our Solution
Reconfigurable hardware-assisted log profiler (REALprof)
– SoC design phase tool
– model-based approach
– reconfigurable profiling hardware
• A profiling hardware module which can be easily integrated into the target design
• static and run-time re-configurability at different profiling granularities
– hardware logs instead of software sampling
• Minimize the software profiling overheads
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Design Flow based on
REALprof
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Embedded hardware(SoC) design
REALprofhardware
Embedded system &application software
REALprofsoftware
Component power model & gate-level power
analysis
Profiling data
Energy evaluation reports
REALprof Hardware Design
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CPU
MEM
BUS
IOREALprof
HW
CPUCPU
CPU
REALprof Hardware Design
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REALprof monitor
Program counter
REALprof controller
System bus
Event active signals
Program counters
Clock
Program counters
En
EveAct
EnLog
Address
Data out
Status
Sampling period
Start offset
Sampling number
Event mask
Status
Sampling period
Start offset
Sampling number
Event mask
Status
Sampling period
Start offset
Sampling number
Event mask
Status
Sampling period
Start offset
Sampling number
Event mask
Control unit
REALprof monitor
Event counter
Control unit
SRAM
REALprof Software Design
Can configure event logs/parameters at the run-time
Off-line calculation based on hardware (event) logs and power models
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Event Logs/Parameters
Examples
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Implementation and
Evaluation
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GRLIB
REALprofhardware
SnapGear Linux
REALprofsoftware
Energy consumption evaluation reports
Altera Stratix III 340 FPGA/DE-340
Component power model &
gate-level power analysis
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LEON3 Events
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Detailed Power Consumption
Evaluation
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Profiling Overheads
Overhead comparison between architecture-level simulations and REALprof
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Profiling Overheads
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Comparisons
REALprofProfiling based onhardwarecounters [12]
Architecture-levelsimulation [9]
Circuit-levelsimulation [6][7]
MethodHardwareemulation
directly executeSoftwaresimulation
Softwaresimulation
Speed ~ 100 MHz real speed KIPS ~ MIPS extremely slowFlexibility ofprofiling
Y N Y Y
Profilingoverhead
Negligible (lessthan 30 cycles)
Software profilingoverhead
N/A N/A
Profilinggranularity
~30 cycles ~ millisecond ~microsecond cycle
Profilinghardwareresource
Hardwarecounters + RAM
Hardwarecounters
N N
Programbehaviorwhile profiling
Remainunchanged
influencedRemainunchanged
Remainunchanged
Operatingsystem
Y Y usually N N
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StratixIII 340 FPGA Resource
Usage
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Conclusions and Future Work
We proposed REALprof
– SoC design phase tool/model-based approach/reconfigurable profiling hardware/hardware logs
We implemented REALprof on LEON3 multi-core and Linux
Less than 1% overhead while offering microsecond-level profiling granularity
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Conclusions and Future Work
Move from EXCEL report to GUI interface
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Processview
Functionview
Thanks for your attention
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