Post on 12-May-2015
transcript
Classification of instructions of
8085 microprocessor
What is instruction?An instruction is a binary pattern designed inside a microprocessor to perform a specific function. The entire group of instructions that a microprocessor supports is called Instruction Set.8085 has 246 instructions. Each instruction is represented by an 8-bit binary value. These 8-bits of binary value is called Op-Code or Instruction Byte.
Classification of instruction2.According to size
3.According to operation
1.According to
addressing modes
1.According to addressing
modes
What is addressing ?Every instruction of a program has to operate on a data.The method of specifying the data to be operated by the instruction is called Addressing.The 8085 has the following 5 different types of addressing modes.
ADDRESSING MODES OF 8085
1.Immediate addressing mode2.Register addressing mode3.Direct addressing mode4.Indirect addressing mode5.Implicit addressing mode
1.Immediate addressing modeIn this mode of addressing ,the data is specified in the instruction itself.The data will be a part of the program instruction.EX. MVI B, 3EH - Move the data 3EH given in the instruction to B register.
2. Register Addressing mode
In register addressing mode, the instruction specifies the name of the register in which the data is available.EX. MOV A, B - Move the content of B register to A register.
3.Direct addressing modeIn direct addressing mode, the address of the data is specified in the instruction.The data will be in memory. In this addressing mode, the program instructions and data can be stored in different memory.EX. LDA 1050H - Load the data available in memory location 1050H in to accumulator in the instruction.
4.Indirect addressing modeIn indirect addressing mode, the instruction specifies the name of the register in which the address of the data is available. Here the data will be in memory and the address will be in the register pair.EX. MOV A, M - The memory data addressed by H L pair is moved to A register.
5.Implicit addressing mode
In implicit addressing mode, the instruction itself specifies the data to be operated.EX. CMA - Complement the content of accumulator; RAL
2.According to size
Instructions in terms of byte size or word size
1.1-byte instruction2.2-byte instruction3.3-byte instruction
1.One byte instructionA one byte instruction includes the
operand and the op-code in same byte.These type of instructions occupy only
one memory location.For example:
Op-code
MOV
ADD
CMA
Operand
C,A
B
--
2.Two byte instructionA two byte instruction includes the op-code
and the 8-bit data or address.This type of instruction occupies 2-memory
location.For example:
Op-code
MVI
IN
Operand
A,O5
01
3.Three byte instructionA 3-byte instruction includes the op-code and
16-bit address or data.This type of instructions occupy three memory
location.For example:
Op-code
LXI
STA
Operand
2050
2051
3.According to operation
TYPES OF INSTRUCTION SET
Data Transfer Instruction Arithmetic Instructions Logical Instructions Branching Instructions Control Instructions
1.Data transfer instructionsThese instructions move data between
registers, or between memory and registers.
These instructions copy data from source to destination.
While copying, the contents of source are not modified.
Op-code• MOV• MOV• MOV• MVI• LDA• STA • LDAX• STAX• LXI• LHLD
Operand • Rd,Rs• R,M• M,R• R,8-bit data• 16-bit address• 16-bit address• Rp• Rp• Rp,16-bit address• 16-bit address
DATA TRANSFER INSTRUCTIONS
Op-code
• SHLD• XCHG• IN• OUT• PCHL• XTHL• SPHL
Operand
• 16-bit address
• 8-bit address• 8-bit address
2.Arithmetic instructions
These instructions perform the operations like:
1. Addition2. Subtract3. Increment4. Decrement
OPERATOR OPRAND DESCRIPTION
ADD R Add data of register with aacumulator
ADD M Add data of register with accumulator
ADC R Add data of register to accumulator with carry
ADC M Add data of memory to accumulator with carry
DAD Reg. pair Add register pair to H-L pair
SUB M Subtract data of memory with accumulator
Arithmetic instruction
OPERATOR OPERAND DESCRIPTION
SBB R Subtract data of register from accumulator
SBB M Subtract data of memory from accumulator
SBI 8 bit data Subtract immediate from accumulator with borrow
INR R Increment in register by +1
DCR R Decrement in register by - 1
INX Rp Increment in register pair by +1
DCX Rp Decrement in register pair by -1
OPERATOR OPERAND DESCRIPTION
ADI 8 bit data Add immediate 8 bit data with accumulator
ACI 8 bit data Add immediate 8bit data to accumulator with carry
SUI 8 bit data Subtract immediate 8 bit data to accumulator with carry
INR M Increment data of memory by +1
DCR M Decrement data of memory by -1
3.Logical instructionsThese instructions perform logical operations
on data stored in registers, memory and status flags.
The logical operations are: AND OR XOR Rotate Compare Complement
Logical instructionsOPERATOR OPERAND DESCRIPTION
ANA R Anding data of register with accumulator
ANA M Anding data of memory with accumulator
ANI 8 bit data Immediate anding of 8 bit data with accumulator
ORA R Oring data of register with accumulator
ORA M Oring data of memory with accumulator
ORI 8 bit data Immediate Oring of 8 bit data with accumulator
XRA R Xoring data of register with accumulator
OPERATOR OPERAND DESCRIPTION
XRA M Xoring data of memory with accumulator
XRI 8 bit data Immediate xoring 8bit data with accumulator
CMP R Compare data of register to accumulator
CMP M Compare data of memory to accumulator
CPI 8 bit data Immediate compare 8 bit data to accumulator
CMA None Complement data of accumulator
CMC None Complement carry flag
OPERATOR OPERAND DESCRIPTION
RLC None Rotate accumulator left without carry
RAL None Rotate accumulator left with carry
RRC None Rotate accumulator right without carry
RAR None Rotate accumulator right with carry
4.Branch control
The branching instruction alter the normal sequential flow.
These instructions alter either unconditionally or conditionally.
Branch control instructions
Op-code
• JMP• Jx• CALL• Cx• RET• Rx• RST
Operand
• 16-bit address• 16-bit address• 16-bit address• 16-bit address• None• None• 0-7
Description
• Jump unconditionally• Jump conditionally• call unconditionally• Call conditionally• Return unconditionally• Call conditionally• Restart (software interrupts)
Op-code
• JC• JNC• JP• JM• JZ• JNZ• JPE• JPO
Description
• Jump if carry• Jump if not carry• Jump if positive• Jump if minus• Jump if zero• Jump if not zero• Jump if even parity• Jump if odd parity
Flag status
• CY=1• CY=0• S=0• S=1• Z=1• Z=0• P=1• P=0
Jump conditionally
Op-code
• CC• CNC• CP• CM• CZ• CNZ• CPE• CPO
Description
• Call if carry• Call if not carry• Call if positive• Call if minus• Call if zero• Call if not zero• Call if even parity• Call if odd parity
Flag status
• CY=1• CY=0• S=0• S=1• Z=1• Z=0• P=1• P=0
Call conditionally
Op-code
• RC• RNC• RP• RM• RZ• RNZ• RPE• RPO
Description
• Return if carry• Return if not carry• Return if positive• Return if minus• Return if zero• Return if not zero• Return if even parity• Return if odd parity
Flag status
• CY=1• CY=0• S=0• S=1• Z=1• Z=0• P=1• P=0
Return conditionally
Instructions
• RST0• RST1• RST2• RST3• RST4• RST5• RST6• RST7
Address
• 0000H• 0008H• 0010H• 0018H• 0020H• 0028H• 0030H• 0038H
Restart address table
5.Stack ,I/O,machine Control Instructions
The control instructions control the operation of microprocessor.
OPERATOR OPERAND DESCRIPTION
LXI SP 16 bit address Load 16-bit address into stack pointer register
PUSH Rp Push data of reg. pair in stack
POP Rp Pop data of reg. pair from stack
PUSH PSW Push data of PSW(accumulator + flag) in stack
POP PSW Pop data of PSW(accumulator + flag) from stack
NOP None No operation perform
HLT None Waiting state
Stack, I/O, Machine control
Op-code
• EI• DI• RIM• SIM
Operand
• NONE• NONE• NONE• NONE
Description
• Enable interrupt• Disable interrupt• Read interrupt mask• Set interrupt mask
Interrupt control instructions