Kestrel - Past, Present, Future

Post on 07-Jul-2015

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I discuss the history of my Kestrel home computer project, where it currently stands, and where I'm taking it in the future.

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KESTRELPAST, PRESENT, AND FUTURE

Samuel A. Falvo II <kc5tja@arrl.net>

Fri Jun 14 22:04:28 PDT 2013

YESTERDAY'S KESTREL

KESTREL 1CPU 65816

CPU Type 16-bit Accumulator CISCCPU/Bus Speed (MHz) 4 / 4

RAM (Min/Nom/Max, B) 32K / 32K / 32KRAM Type Asynchronous

ROM —Performance 1.00

KESTREL 1 (CON'T)Video —Audio —

Keyboard —Mouse —

Other I/O 65C22 VIA providing 1 synchronous serial port,and 16 bi-directional I/O pins.

Timers Two 16-bit count-down (65C22)System

Software—

KESTREL 1 (CON'T)

TODAY'S KESTREL

KESTREL 2CPU S16X4

CPU Type 16-bit non-Forth MISCCPU/Bus Speed (MHz) 12.5 / 12.5

RAM (Min/Nom/Max, B) 32K / 32K / 52KRAM Type Asynchronous

ROM —Performance 6.25

KESTREL 2 (CON'T)Video MGIA (640x200, bitmapped, black and white)Audio —

Keyboard KIAMouse —

Other I/O GPIA provides 32 bits of fixed, unidirectionalI/O (16 inputs, 16 outputs)

Timers —System

Software—

KESTREL 2 (CON'T)

TOMORROW'S KESTREL

KESTREL 2CPU S16X4B

CPU Type 16-bit non-Forth MISCCPU/Bus Speed (MHz) 12.5 / 12.5

RAM (Min/Nom/Max, B) 32K / 32K / 52KRAM Type Asynchronous

ROM —Performance 6.25

KESTREL 2 (CON'T)Video MGIAAudio 8-voice, 2-channel, SN76489-inspired PSG

Keyboard KIAMouse —

Other I/O GPIA provides 32 bits of fixed, unidirectionalI/O (16 inputs, 16 outputs)

Timers At least two, 32-bit count-down.System

SoftwarePort of eForth

KESTREL 3ACPU SeP64X11A

CPU Type 64-bit Forth-Optimized MISCCPU/Bus Speed (MHz) 13.0 / 13.0

RAM (Min/Nom/Max, B) 256KB / 8MB / 264

RAM Type AsynchronousROM —

Performance 6.50

KESTREL 3A (CON'T)Video CGIA-1Audio 8-voice, 2-channel PSG (Kestrel-2 compatible)

8-voice, 2-channel, 16-bit, DMA-fed DACsKeyboard KIA

Mouse KIAOther I/O GPIA-2 provides 128 bits of fixed, unidirectional

I/O (64 inputs, 64 outputs)Timers At least two, 32-bit count-down.System

SoftwareExpanded Port of eForth (vocabularies,multitasking, simple GUI)

KESTREL 3BCPU SeP64X11B

CPU Type 64-bit Forth-Optimized MISCCPU/Bus Speed (MHz) 50.0 / 50.0

RAM (Min/Nom/Max, KiB) 256 / 8192 / 264

RAM Type SynchronousROM —

Performance 25.0

KESTREL 3B (CON'T)Video CGIA-2

Same as CGIA-1 but with support for synchronous RAM

Audio 8-voice, 2-channel PSG (Kestrel-2 compatible)8-voice, 2-channel, 16-bit, DMA-fed DACs

Keyboard KIAMouse KIA

Other I/O GPIA-2 provides 128 bits of fixed, unidirectionalI/O (64 inputs, 64 outputs)

Timers At least two, 32-bit count-down.System

SoftwareExpanded Port of eForth (vocabularies,multitasking, possibly even a GUI)

KESTREL 3B (CON'T)MMU Segmented with Linear

Paging

Virtual / Effective / Real AddressSpace

264 / 280 / 223

Page Size 4096 bytesSLB Refill Method SoftwareTLB Refill Method Software

KESTREL 3B (CON'T)EXPERIMENTAL SUPPORT IN FORTH

(MICROKERNEL IN FORTH?)

EXPERIMENTAL PORT OF PLAN 9 FROM BELL LABS

CGIA BASIC THEORY OFOPERATION

CGIA BASIC THEORY OFOPERATION

SEPARATE VIDEO MEMORY FETCH FROM VIDEO MEMORYINTERPRETATION.

CGIA BASIC THEORY OFOPERATION

USE ALTERNATING LINE BUFFERS TO QUEUE RASTER DATA.

CGIA BASIC THEORY OFOPERATION

VIDEO FETCH CAN OCCUR AT MAXIMUM BUS SPEEDINDEPENDENT OF DISPLAY RATE.

(AS LONG AS IT COMPLETES BEFORE THE NEXT SCANLINE DISPLAYS, YOU'RE GOLDEN!)

CGIA BASIC THEORY OFOPERATION

CPU AND OTHER PERIPHERALS GET LEFT-OVER BANDWIDTH.

CGIA BASIC THEORY OFOPERATION

RAW MEMORY BANDWIDTH DETERMINES HORIZONTALRESOLUTION AND COLOR DEPTH.

DESIRED CPU PERFORMANCE AND FRAME RATE LARGELYDETERMINES VERTICAL RESOLUTION.

CGIA BASIC THEORY OFOPERATION

HORIZONTAL RESOLUTION25MHZ DOT CLOCK: 320, 640, AND MAYBE 1280.

65MHZ DOT CLOCK: 256, 512, AND 1024.

CGIA BASIC THEORY OFOPERATION

COLOR DEPTHS1, 2, 4, 8, AND 16 BITS/PIXEL.

CGIA BASIC THEORY OFOPERATION

VERTICAL RESOLUTION25MHZ DOT CLOCK: 200, 240, 400, AND 480 SUPPORTED.

65MHZ DOT CLOCK: 192, 384, 768 SUPPORTED.

MMU BASIC THEORY OFOPERATION

MMU BASIC THEORY OFOPERATION

PROGRAMS RUN INSIDE AN ADDRESS SPACE.

MMU BASIC THEORY OFOPERATION

RANGES OF ADDRESSES CORRESPOND TO SEGMENTS.FOR EXAMPLE, $0000-$1FFF MIGHT CORRESPOND TO THE FORTH INTERPRETER.

MMU BASIC THEORY OFOPERATION

SEGMENT REGISTERS INFORM THE CPU OF THE PROCESSADDRESS MAP.

SEGMENTS MAP INTO AN 80-BIT VIRTUAL ADDRESS SPACE.

MMU BASIC THEORY OFOPERATION

EXTRA ADDRESS BITS USED TO TELL ONE PROGRAM FROMANOTHER.

PREVENTS NEED TO FLUSH ALL ADDRESS MAPPING CONFIGURATION ON EVERY TASK SWITCH.

MMU BASIC THEORY OFOPERATION

TRANSLATION REGISTERS INFORM THE CPU WHERE PAGESOF A SEGMENT RESIDE IN PHYSICAL MEMORY.

MMU BASIC THEORY OFOPERATION

SEGMENT AND TRANSLATION REGISTERS ARE MANAGED BYSOFTWARE.

PAGE AND SEGMENTATION FAULT HANDLERS MANAGE THESEREGISTERS ON BEHALF OF THE CURRENTLY RUNNING

PROCESS.

MMU BASIC THEORY OFOPERATION

DURING A TRAP, CPU MUST PRESERVE NOT JUST PC, BUTALSO INSTRUCTION PACKET AEDDRESS, FAULTING ADDRESS,

AND INSTRUCTION SLOT NUMBER.

PSG BASIC THEORY OFOPERATION

PSG BASIC THEORY OFOPERATION

8 VOICES2 CHANNELS

STEREO GOODNESS.

PSG BASIC THEORY OFOPERATION

EACH VOICE A COMPLETE COPY OF THE SAME CIRCUIT.

PSG BASIC THEORY OFOPERATION

SQUARE WAVE AND PRNG NOISE SYNTHESIS ONLY.I MIGHT INCLUDE PULSE WIDTH CONTROL FOR MORE

INTERESTING SOUND EFFECTS.

PSG BASIC THEORY OFOPERATION

INSPIRED BY TEXAS INSTRUMENTS SN76489TEXAS INSTRUMENTS TI-99/4A

SEGA MASTER SYSTEM... COUNTLESS OTHER USES.

GITHUBKC5TJA@ARRL.NET

http://www.github.com/sam-falvo/kestrel

THANK YOU!Q & A