Post on 11-Jul-2020
transcript
1
Pipelined ADC Design
• Mathematical Model for Ideal Pipelined ADC
• Sources of Errors
2
Standard Pipelined ADC Architecture
Stage1
Stage2
Stage3
Stagek
Stagem-1
Stagem
n1 n2 n3 nk nm-1 nm
Vin
Pipelined Assembler
… …Vres1 Vres2 Vres3 Vresk Vresn-1
Vref
CLK
Dn
… …S/H
3
Pipelined Converter Stage
nk
Stage k
VreskVink
Clk Vref
wk
S/H AMP
DACADC
VREF
VINk
nk
VRESk
DOUTk
CLK
4
Pipelined Converter Stage
wk
S/H AMP
DACADC
VREF
VINk
nk
VRESk
DOUTk
CLK
Generally combined into one switched-capacitor gain stage
5
Simplified Pipelined Stage
AMP
DAC
ADC
VREF
VINh
n1
VRESh
DOUTh
Generally omitted on last stage
6
Modeling of a Pipelined ADC
• Assume all nonlinearities can be neglected
7
Pseudo-Static Time-Invariant Modeling of a Linear Pipelined ADC
DAC
ADC
VREF
VINk
n1
DOUTk
AMPVRESk
•Paramaterization of Stage k•Amplifier
•Closed-Loop Gain•From input – m1k•From DAC – m2k•From offset – m3k
•Offset Voltage - VOSk•DAC
•VDACki•ADC
•Offset Voltages - VOSAki•Out-Range Circuit (if used and not included in ADC/DAC)
•DAC Levels - VDACBki•Amplifier Gain – m4k
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Pseudo-Static Time-Invariant Modeling of a Linear Pipelined ADC
• Parameterization of Input S/H Stage
S/HVIN VIN1
CLK
0OS20in101in VmVmV +=
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Pseudo-Static Time-Invariant Modeling of a Linear Pipelined ADC
DACADC
VREF
VINk
n1DOUTk
AMPVRESk
OSk3k2kDACkkink1kRESk VmmVdVmV ++=
For notational convenience, assume 1 bit/stage
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Mathematical Representation of the n Pipelined Stages
OS13121DAC11in111RES1 VmmVdVmV ++=
OS23222DAC22in212RES2 VmmVdVmV ++=
OSk3k2kDACkkink1kRESk VmmVdVmV ++=
OSn3n2nDACnninn1nRESn VmmVdVmV ++=
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Mathematical Representation of the Pipelined ADC
OS13121DAC11in111RES1 VmmVdVmV ++=
OS23222DAC22in212RES2 VmmVdVmV ++=
OSk3k2kDACkkink1kRESk VmmVdVmV ++=
OSn3n2nDACnninn1nRESn VmmVdVmV ++=
0OS20in101in VmVmV +=
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Mathematical Representation of the Pseudo-Static Pipelined ADC
OS13121DAC11in111RES1 VmmVdVmV ++=
OS23222DAC22in212RES2 VmmVdVmV ++=
OSk3k2kDACkkink1kRESk VmmVdVmV ++=
OSn3n2nDACnninn1nRESn VmmVdVmV ++=
2n equations 2n-1 intermediate nodal voltages and Vin
1)in(kRESk VV += for k = 1 … n-1
0OS20in101in VmVmV +=
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Solution of the 2n linear equations
⎪⎭
⎪⎬⎫
⎪⎩
⎪⎨⎧
⎥⎦
⎤⎢⎣
⎡⎟⎟⎠
⎞⎜⎜⎝
⎛++⎥
⎦
⎤⎢⎣
⎡⎟⎟⎠
⎞⎜⎜⎝
⎛+⎥
⎦
⎤⎢⎣
⎡⎟⎟⎠
⎞⎜⎜⎝
⎛= DACn
1n1211
2nnDAC2
1211
222DAC1
11
211in V
...mmmmd...V
mmmdV
mmdV
⎭⎬⎫
⎩⎨⎧
⎟⎟⎠
⎞⎜⎜⎝
⎛++++ OSn
1n1211
3nOS2
1211
32OS1
11
31 V...mmm
m...Vmm
mVmm
⎭⎬⎫
⎩⎨⎧
+1n1211
RESn
...mmmV
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Solution of the 2n Linear Equations
⎪⎭
⎪⎬⎫
⎪⎩
⎪⎨⎧
+⎥⎦
⎤⎢⎣
⎡⎟⎟⎠
⎞⎜⎜⎝
⎛++⎥
⎦
⎤⎢⎣
⎡⎟⎟⎠
⎞⎜⎜⎝
⎛+⎥
⎦
⎤⎢⎣
⎡⎟⎟⎠
⎞⎜⎜⎝
⎛= +1n
REFDACn
1n1211
2nnDAC2
1211
222DAC1
11
211in 2
VV...mmm
md...Vmm
mdVmmdV
Term involvingdigital output codes
⎭⎬⎫
⎩⎨⎧
⎟⎟⎠
⎞⎜⎜⎝
⎛++++ OSn
1n1211
3nOS2
1211
32OS1
11
31 V...mmm
m...Vmm
mVmm
⎭⎬⎫
⎩⎨⎧
−+ +1nREF
1n1211
RESn
2V
...mmmV
Code-independent offset term
Code-dependent but can be bounded by ½ LSB with out-range strategy
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n n3k RESn2k REF REF
k k nin k DACk OSkn+1 n+1k 1 k 1
1j 1j 1kj 1 j 1 k 1
m Vm V VV d V Vm 2 m m 2= =
= = =
∑ ∑∏ ∏ ∏
⎡ ⎤⎛ ⎞ ⎡ ⎤= + + + −⎢ ⎥⎜ ⎟ ⎢ ⎥⎜ ⎟⎢ ⎥ ⎣ ⎦⎝ ⎠⎣ ⎦
Solution of the 2n Linear Equations
mij = 2, VDACk =VREF/2, VOSk = 0
⎟⎠⎞
⎜⎝⎛ −++= ++
=∑ 1n
REFn
RESn1n
REFn
1k1-k
kREFin 2
V2
V2V
2d
2VV
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f(residue)f(offset)dαVn
1kkkin ++= ∑
=
Solution of the 2n Linear Equations
• f(offset) is code-independent, ideally zero, and causes only overall offset error in ADC
• f(residue) is code-dependent but can be bounded by 1 lsb(causing at most ½ LSB error) with out-range protection
• No errors causing spectral distortion or INL degradation if αk are correctly determined
∏=
= k
1j1j
2kDACkk
m
mVα
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Pseudo-Static Time-Invariant Modeling of a Linear Pipelined ADC
DACADC
VREF
VINk
n1DOUTk
AMPVRESk
( )nk2 -1
RESk 1k ink 2k kj DACkj 3k OSkj=1V m V m d V m V∑= + +
If more than 1 bit/stage is used and DAC is binarily-weighted structure
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Pseudo-Static Time-Invariant Modeling of a Linear Pipelined ADC
DACADC
VREF
VINk
n1DOUTk
AMPVRESk
( )( )kn
RESk 1k ink 2k REF kj 3k OSkj=1V m V m f V , d m V
k= + +
If DAC is characterized by ( )kn
REF kj j=1f V , d
k
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( )kjh=nn n3k RESn2k REF REF
k k nin kj DACkj OSkn+1 n+1k 1 j=1 k 1
1j 1j 1kj 1 j 1 k 1
m Vm V VV d V Vm 2 m m 2= =
= = =
∑ ∑ ∑∏ ∏ ∏
⎡ ⎤⎛ ⎞ ⎡ ⎤= + + + −⎢ ⎥⎜ ⎟ ⎢ ⎥⎜ ⎟⎢ ⎥ ⎣ ⎦⎝ ⎠⎣ ⎦
Solution of the 2n Linear Equations If more than 1 bit/stage is used and DAC is binarily-weighted structure
If DAC is characterized by ( )kn
REF kj j=1f V , d
k
( )( )knn n3k RESn2k REF REF
k k nin REF kj OSkn+1 n+1j=1k 1 k 1
1j 1j 1kj 1 j 1 k 1
m Vm V VV f V , d Vm 2 m m 2k= =
= = =
∑ ∑∏ ∏ ∏
⎡ ⎤⎛ ⎞ ⎡ ⎤= + + + −⎢ ⎥⎜ ⎟ ⎢ ⎥⎜ ⎟⎢ ⎥ ⎣ ⎦⎝ ⎠⎣ ⎦
No errors causing spectral distortion or INL degradation ifterms involving dkj are correctly determined
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Pseudo-Static Characterization of Pipelined ADC with Arbitrary Bits/Stage
and Out-Range Protectionf(residue)f(offset)dαV
n
1kkkin ++= ∑
=
• the αk are functions of DAC levels and amplifier gains
• f(offset) is code-independent, ideally zero and causes only overall offset error in ADC
• f(residue) is code-dependent but can be bounded by 1 lsb(causing at most ½ LSB error) with out-range protection
• dk are boolean output variables from stage ADCs (including out-range protection if included)
• Equation applies to both sub-radix2 and extra comparatorout-range protection
•No errors causing spectral distortion or INL degradation if αk are correctly determined
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Observations
• Substantial errors are introduced if αk are not correctly interpreted!
• Some calibration and design strategies focus on accurately setting gains and DAC levels
• Analog calibration can be accomplished with either DAC level or gain calibration
• Digital calibration based upon coefficient identification does not require accurate gains or precise DAC levels
f(residue)f(offset)dαVn
1kkkin ++= ∑
=
∏=
k
1j1j
2kDACkk
m
mV:αform of
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Observations (cont)
• If nonlinearities are avoided, data conversion process with a pipelined architecture is extremely accurate
• Major challenge at low frequencies is accurately interpreting the digital output codes
f(residue)f(offset)dαVn
1kkkin ++= ∑
=
∏=
k
1j1j
2kDACkk
m
mV:αform of
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Observations (cont)
• If nonlinearities are present, this analysis falls apart and the behavior of the ADC is unpredictable !
f(residue)f(offset)dαVn
1kkkin ++= ∑
=
∏=
k
1j1j
2kDACkk
m
mV:αform of