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8/12/2019 Memories Lecture Notes
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Modeling of Non-VolatileMemories With Silvaco
D
P
A
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C
I C
N M
E E
D E I E
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Market Shares by ProductDiscretes & Opto 12.9%
0.5%Bipolar
Analog 14.9%
Logic 16.3%
Microprocessor 15.4%
Microcontroller 6.2%
DSP 3.1%
Microperipheral 5.7%
Memory
25%
Discretes & Opto 12.9%Discretes & Opto 12.9%
0.5%Bipolar
Analog 14.9%
Logic 16.3%
Microprocessor 15.4%
Microcontroller 6.2%
DSP 3.1%
Microperipheral 5.7%
Memory
25%
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Semiconductor Memory
Classification
Read-Write Memory
Volatile
Read-WriteMemory
Non-Volatile
Read-Only Memory
Non-Volatile
EPROM
E2PROM
FLASH
Random
Access
Non-Random
Access
SRAM
DRAM
Mask-ProgrammedProgrammable (PROM)
FIFO
Shift Register
CAM
LIFO
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N M A
.
E:
M C H
OP: (/)
EPOM: OM EEPOM: OM
F
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IC
SRAM DRAM ROM
EPROM
PROM
EEPROM
FLASH EEPROM
Volatile memories
Lose data when power down
Non-volatile memories
Keep data without power supply
Stand-alone versusembedded memories
This lecture: stand-alone
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N
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Cost-Performance Drivers
CostperMt
ran
sistors/bits
($)
10k
1k
100
10
1
0.1
0.011 10 100 1 10 100 1 10
ns s ms
Logic
SRAM
Logic in 1980
DRAM
ROM
Flash
EEPROM
HDD
HDD in1980
Accesstime
DRAM in 1980
10k
1k
100
10
1
0.1
0.011 10 100 1 10 100 1 10
ns s ms
Logic
SRAM
Logic in 1980
DRAM
ROM
Flash
EEPROM
HDD
HDD in1980
Accesstime
DRAM in 1980
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Characteristics of
State-of-the-art NVM
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MOFE ( )
C
Vdepletiondepletionaccumulation
Vfb
accumulation
Vfb
inversion
VT
inversion
VT
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C MO
I
Vgs
MOS transistor - simplistic
VT
I
Vgs
MOS transistor - real
VT
inversioninversionChannel charge: Q ~ (Vgs VT)
Channel current: I ~ (Vgs VT)
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C
MO : 1
F : /
Id
Vgs
MOS transistor Floating gate transistor
Id
Vgs
programming
VT
erasing
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F : ;
I .
CMO !
ControlgateFloating
gate
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C
Control gate
Floating gate
silicon
Control gate
Floating gate
unprogrammed programmed
To obtain the same channel charge, the programmed gate needs ahigher control-gate voltage than the unprogrammed gate
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L 0 1
Id
Vgs
VT = -Q/Cpp
Vread
1Iread >> 00Iread = 0
Reading a bit means:
1. Apply Vread on the control gate
2. Measure drain current Id of thefloating-gate transistor
When cells are placed in a matrix:
Control
gatelines
drain lines
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P
ControlgateFloating
gate
Floating gate
Control gateSiO2
Si3N4
Polysilicon
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B (!)
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P/
F .
H ?
I/ :
FN (FN)
C H E I (CHE)I ( : , EPOM)
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C O2
VD
VG
Dominant current components:
Intrinsic quantummechanical conduction
Fowler-Nordheim tunneling
Direct Tunneling
Defect-related:
Trap-assisted tunneling(via a molecular defect)
Current through large defects
(e.g. pinholes)
Intrinsic current is defined by geometry & materials
Defect-related current can be suppressed by engineering VB
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G
-2 -1 0 1 2 3 4 5
10-1410-1310-1210-11
10-1010-910-810
-7
10-610-510-4
10-3
VG (V)
|IG
|(A)
Hardbreakdown
Unstressed oxide
SILC
Soft
breakdown
4 nm oxide
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P/
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F
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CHE: H
Pinch-off high electric fields near drain hot carrier injection through SiO2Note: < 1% of the electrons will reach the floating gate power-inefficient
Hot holes
Hot electrons
Hole substrate current
Field kinetic energy overcome the barrier
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P: C H E I
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CHE:
H : 300 A/( : )
M :
M , ,
( )
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FN
C
L (10 A/)
:
C
D
FNFN
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FN
Non-uniform: only for erasing; less demanding for the dielectric
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A:
(, CHE )
L
ILC
M
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NO NAND
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F F :
CMOO I ()
F:E
:
C ?D :
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:
F (106
) , ()
F
( 3 . 108 )
0 1
I 10 MB , OK?
Trade-off: reliability error detection & correction
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( )
+=kT
EtVVVtV athththth expexp)0()( 00
C:
0.1%
I
A C:
= E A L:
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D
7-8 nm is the bare minimum
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: =
L > 5 M
F < 7 , F
,
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E
: O
L
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E: A
: BD
.
O2: BD= 10 C/2.
: /
0 1
G BD , CV
AQ
nfg
injbd
pe =
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I 2007: NM
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.
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D NI , , , , ,
, FN ,
, .
( ) .
B .
( )
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C
.
C ,
FN
.
I , .
.
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Cross-sections of NVM cells
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E E
FN L E M
B B
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Oxide Charging Electrons at the drain end of the
channel have sufficient energy
to overcome the barrier at theSi/SiO2 interface and betrapped in the oxide
Since the effect is cumulative, itlimits the useful life of thedevice(LDD regions are used toreduce oxide charging)
The various oxide chargingmechanisms, that lead tothreshold voltage shift, aresummarized in the figure on theright
Figure from textbook by Sze:Semiconductor device theory
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Tunneling Currents
Three types of tunneling processes are schematically shown below(courtesy of D. K. Schroder)
For tox 40 , Fowler-Nordheim (FN) tunneling dominates For tox< 40 , direct tunneling becomes important Idir> IFN at a given Voxwhen direct tunneling active For given electric field: - IFN independent of oxide thickness
- Idir depends on oxide thickness
B Vox > B
Vox = BVox < B
FN FN/Direct Direct
tox
B Vox > B
Vox = BVox < B
FN FN/Direct Direct
tox
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Fowler Nordheim Tunneling
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Fowler-Nordheim Tunneling
0
EF
B
0
EF
B
a
No applied bias With applied bias
- eEx
x-axis
The difference between the Fermi level and the top of the barrier is
denoted by B According to WKB approximation, the tunneling coefficient through this
triangular barrier equals to:
a
dxxT 0 )(2exp where: ( )eEx
m
x B= 2
*2
)(
Fowler Nordheim Tunneling
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Fowler-Nordheim Tunneling
(contd) The final expression for the
Fowler-Nordheim tunnelingcoefficient is:
Important notes: The above expression
explains tunneling processonly qualitatively becausethe additional attraction ofthe electron back to the plateis not included
Due to surfaceimperfections, the surface
field changes and can makelarge difference in the results
eE
mT B
3
*24exp
2/3
Calculated and experimental tunnelcurrent characteristics for ultra-thin oxidelayers.
(M. Depas et al., Solid State Electronics, Vol.38, No. 8, pp. 1465-1471, 1995)
Sil I l t ti
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Silvaco Implementation
In Silvaco ATLAS, the Fowler-Nordheim tunneling currents arecalculated using the following expressions:
where:
E => magnitude of the electric field in the oxide
F.AE, F.BE, F.AHand F.BH => model parameters that can bedefined via the MODEL statement
There are two different ways in which Fowler-Nordheim tunneling isimplemented within the solution procedure:
As a post-processing option => specify FNPP on the MODELstatement
Within the self-consistent scheme => specify FNORD on theMODEL statement
( )
( )EEJ
EEJ
FP
FN
/exp
/exp
2
2
F.BHF.AH
F.BEF.AE
=
=
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Silvaco Implementation (contd)
The actual implementation scheme is as follows:
Each electrode/insulator and each insulator/SC interface is dividedinto segments based upon the mesh
For each SC/insulator segment, the tunneling current expressionsgiven in the previous slide, are used to calculate JFNand JFP
The as-calculated tunneling currents are then added to the metal-insulator segment using the following two criteria:
Model one (default) => The segment that receives the currenthas to be on the path of the electric field vector at the SC/oxideinterface.
Model two (NEARFLG parameter on the MODEL statement)=> The electrode/insulator segment that is nearest to theinsulator/SC segment receives all the current
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Lucky Electron Model Explained
oxide
p-type SC substrate
n+ n+
S D
Gate
P1P2
P3
P4K.E.P1
P2P3 P4
substrate oxide gate
B
x0
P1
=> probability that the electron gains sufficient energy from the electric field toovercome the potential barrier
P2 => probability for redirecting collision to occur, to send the electron towards theSC/insulator interface
P3 => probability that the electron will travel towards the interface without loosingenergy
P4 => probability that electron will not scatter in the image potential well
Description from:K. Hasnat et al., IEEE TED43, 1264 (1996).
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Mathematical Description The various probabilities described in the previous slide are calculated
using:
=> scattering mean-free path
r => redirection mean-free path
B => barrier height at the SC-oxide interface
ox => mean-free path in the oxide (3.2 nm)
The total gate current is then given by:
=
=
=
=
ox
B
rxx
xPyPPdEE
P 04321 exp,exp,121,exp1
3/22/10 oxoxBB EE =
Zero-field barrier
height
Barrier lowering due
to image potential
Accounts for probability
for tunneling
4321),( PPPPyxJddxdyIB
ng =
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Silvaco Implementation
Assumes non-Maxwellian distribution function, which requires solutionof the energy balance equations for the carrier temperature.
The model is specified with the parameters N.CONCANNON andP.CONCANNON on the MODELS statement.
Two other parameters of the MODEL statement, which affect thenumerical integration of the current, are definable by the user:
ENERGY.STEP (default 25 meV) and INFINITY parameter (upper limitof integration).
The Concannons injection model
In the Silvaco ATLAS implementation of the lucky-electron model, theprobabilities P1 and P2 have actually been merged together.
(see description of the model and the various parameters that need tobe specified on pages 3-76 to 3-79 via the MODEL statement).
It is activated via the MODEL statement by the parameters HEI (hotelectron injection) or HHI (hot hole injection)
The implementation of the model is similar to the Fowler-Nordheim
tunneling (see slide 9 for details).
M Sil I l i
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More on Silvaco Implementation
The specification of one or more electrodes as floating isaccomplished via the parameter FLOATING on the CONTACTstatement
Modeling of the correct coupling capacitance between the FG(floating gate) and the CG (control gate) is accomplished via theparameters:
FLG.CAP additional capacitance per unit length between FG and CG
ELE.CAP
specifies the index of the (wider) control gateon the CONTACT statement
During the write or erase cycles, the gate currents arise because of:
hot-electron injection (HEI or N.CONCANNON) hot-hole injection (HHI or P.CONCANNON) Fowler-Nordheim tunneling (FNORD) band-to-band tunneling (BBT)
Gate current assignment can be:
- in the direction of highest contributing field (drift current)
- geometrically closest electrode for diffusion current (NEARFL)
More on Silvaco Implementation
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p
(contd) Additional parameters that has been specified in the EPROM example,
in conjunction with the METHOD statement include:
AUTONR Automated Newton-Richardson procedure that attempts toreduce the number of LU-decompositions per bias point
PR.TOL Absolute tolerance for Poisson equation
PX.TOL Relative tolerance for Poisson equation (P.TOL)
CR.TOL Absolute tolerance for continuity equation
CX.TOL Relative tolerance for continuity equation (C.TOL)
Parameters specified in the EPROM example in conjunction with theSOLVE statement include:
PREVIOUS Use previous solution as initial guess
PROJECT Extrapolation from the last two solutions will be usedas an initial approximation (guess)
Q Specifies charge on an electrode n
QSTEP Charge increment to be added to one or moreelectrodes
QFINAL Final charge for a set of bias increments
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D E I
E C
B B
C
P C
E M M
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E M M
EEPOM
75 120
F 1).
.
0.7
200 A.
E C
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E C
.
I BB
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I BB
F 3
.
..
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F 4
.
G C D C
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G C D C
F 5
.
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P CF 6,
,
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E
P L C
E:
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E EPOM
B P
P C = /L E
E D
12.5
Threshold voltage beforeprogramming
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Floating gate Memory
programming
# Set workfunction for the poly gates,
contact name=fgate n.polysilicon floatingcontact name=cgate n.polysilicon
#Define some Qss...
interface qf=3e10models srh cvt hei fnord print nearflgimpact selb
######### This is the Vt Test before programming ###########################################################################solve init
method newton trap maxtraps=8 autonr
log outf=eprmex01_2.logsolve vdrain=0.5solve vstep=0.5 vfinal=25 name=cgate comp=5.5e-5 cname=drain# plot idvg
tonyplot eprmex01_2.log -s eprmex01_2.set# extract vtextract name="initial vt" ((xintercept(maxslope(curve(v."cgate",i."drain"))))-abs(ave(v."drain"))/2.0)
######### This is the Programming/Writing Transient ##########################################################################
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###############################################################
# use zero carriers to get vg=12v solutionmodels srh cvt hei fnord print nearflgmethod carriers=0log offsolve initsolve vcgate=3
solve vcgate=6solve vcgate=12# now use 2 carriers
models srh cvt hei fnord print nearflgimpact selb
method newton trap maxtraps=8 carriers=2solve prev
log outf=eprmex01_3.log master# ramp up drain voltagesolve vdrain=5.85 ramptime=1e-9 tstep=1e-10 tfinal=1e-9 proj
# keep voltages constant and perform transient programmingsolve tstep=1e-9 tfinal=5.e-4# plot programming curvetonyplot eprmex01_3.log -set eprmex01_3.set# save the structuresave outf=eprmex01_2.str
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Ramping theControl gateVoltage withZero carriers
Doing the programming whileKeeping the voltages the same
######### This is the Vt Test After Programming ######################################################################
method newton trap maxtraps=8 autonr
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method newton trap maxtraps=8 autonr
log outf=eprmex01_4.log mastersolve initsolve vdrain=0.5solve vstep=0.5 vfinal=25 name=cgate comp=5.5e-5 cname=drain# plot new idvg overlaid on old one
tonyplot -overlay eprmex01_2.log eprmex01_4.log -set eprmex01_4.set# extract vt and vt shiftextract name="final vt" ((xintercept(maxslope(curve(v."cgate",i."drain"))))-abs(ave(v."drain"))/2.0)extract name="vt shift" ($"final vt" - $"initial vt")
######## This is the Erasing Test ##############################################################################
go atlas
# l t i d l
Erasing Cycle
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# select erasing models
models cvt srh fnord bbt.std print nearflg \ F.BE=1.4e8 F.BH=1.4e8impact selb
contact name=fgate n.poly floatingcontact name=cgate n.polyinterface qf=3e10
method carr=2# get initial zero carrier solutionsolve init
# ramp the floating gate charge
method newton trap maxtraps=8
solve prevsolve q1=-1e-16solve q1=-5e-16solve q1=-1e-15solve q1=-2e-15solve q1=-3.5e-15solve q1=-5e-15
# put a resistor on drain
contact name=drain resistance=1.e20
# do Erasing transientmethod newton trap maxtraps=8 autonr c.tol=1.e-4 p.tol=1.e-4
log outf=eprmex01_5.log master
solve vsource=12.5 tstep=1.e-14 tfinal=4.e-1
tonyplot eprmex01_5.log -set eprmex01_5.set
Erasing Cycle
Source current