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transcript
Tech Talk:SDRs with Epiq Solutions
August 15th, 2017
Innovative solutions for
complex problems
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Who we are:
• Established in 2005• Over 90 Staff• DoD, IC and Commercial Solutions• RF and SDR Innovation Lab• Customer Focused IR&D Program
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Phil GreenPresident
Chris HawthorneCTO / Partner
Jim McCloskeyDir. RF Solutions
Core Capability Areas
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Data Analytics
ARIIA Products
RF SIGINT Solutions
Wireless Cyber
SecurityEnterprise IT Architecture and Security
INNOPLEX and Epiq Solutions
• ARIIA• Customer Project A• Customer Project B• Customer Project C
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Lead: Chris Farrier• Modified Dell Latitude Laptop• Sidekiq integrated• Dual WiFi Processing• Custom Signals Analysis Software
Future Upgrades:• Signal Detection – (SkyLib or Custom)• Geolocation and Heat Mapping
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Customer Project A
INNOPLEX Lead: Eric Lipsius• Modified handheld ALGIZ – 10X
• mPCI-E x2 and Integrated GPS
• Sidekiq / Placekiq Integration• CentOS 7• Compatible with SALVAGE for DSP
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Customer Project B – 2 PlatformsINNOPLEX Lead: Mark Schneider
• ASUS Android Tablet & MatchstiqS10
• Matchstiq running CentOS and Epiq IP• SkyLite, ERA Pro, Spotlight,
SRFS, SODOR, and Floodlight• Planned implementation
using SALVAGE (GFE DSP)• Command and control via SERAPH
device plugin (RAPTOR-X wireless suite – a GFE GIS solution)
• Intel NUC with Sidekiq M.2
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Customer Project C
INNOPLEX Lead: Jim Sopha• Embedded Matchstiq S10• IntensePC Single Board Computer• Compatible with SALVAGE for DSP
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ART Lab Demos
INNOPLEX Lead: Jim McCloskey• LimeSDR• Analog Devices Dev Kit• GnuRadio• REDHAWK on Raspberry Pi• Project A (Nexus and MatchStiq)• ARIIA
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How to Contact Us:
ARIIA Product Line:ARIIA@inno-plex.com
Director of RF Solutions:James.McCloskey@inno-plex.com
Partnership Opportunities:Jason.Servary@inno-plex.com www.inno-plex.com
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The Many Dimensions of SDR HardwarePlotting a Course for the Hardware Behind the Software
August 2017
John OrlandoEpiq Solutions
LO
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● Founded in 2009, bootstrapped by founders
● Extensive experience developing anddelivering signal processing solutions
– Team of 30 (and growing)– Hardware, RF, software, DSP, UI, and
mechanical all in house
How we help our customers
– Deliver SDR transceiver building blocksthat radically reduce our customer's SWaPand time to market
– Deliver turnkey wireless sensing solutionsto provide detailed insight into wirelessnetworks and devices operating in areasof interest
M.2
MiniPCIe
Matchstiq
Schaumburg, ILEST 2009
N. VirginiaEST 2016Epiq Solutions in a Nutshell
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RF tuning range
Instantaneous Bandwidth
Sample Rate
Physical Form Factor
External Interfaces
Internal Interfaces
Sample Bit Width
Software APIs
CPU Options FPGA Options
Many-Dimensional Space of SDR
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Part 1: Key SDR Parameters● What are the options available today● What is coming down the pike tomorrow● What should you be thinking about now
Part 2: Platform Review● Epiq Solutions' SDR portfolio and roadmap
Part 3: Demos● Real world SDR platforms + applications in action
Outline for Today
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Form Factor
M.2
MiniPCIe
Rack mountable platforms-RF tuner(s) -FPGA processing-data converters -digital I/Q streaming
Custom form factor platforms-FPGA processing-RF tuner(s)
-data converters -CPU processing
Standards compliant cards-FPGA processing-RF tuner(s)
-data converters -high speed digital I/O
FMC(VITA57)
SidekiqFamily
Maveriq Matchstiq
Quadratiq
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Form Factor – Industry Trends
3U/6U VPX
VITA 57.4 (FMC+)
M.2 2280
“Ruler SSD”
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RF Tuning Range● RFIC based
– Analog Devices AD9361: 70 MHz to 6 GHz– Analog Devices AD9371: 300 MHz to 6 GHz– Lime Micro LMS7002: 100 KHz to 3.8 GHz
● Discrete designs– Superheterodyne covering 2 MHz to 6 GHz
● Direct RF Sampling– DC to 2 GHz (with caveats)
● Block up/down converter + RFIC– Best of both worlds– 1 MHz to 6 GHz
Matchstiq S12 Sidekiq X2
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RF Tuning Range – Industry Trends
● RFIC based– DC to 6-12 GHz
● What about higher?– 28 GHz for 5G– Hybrid block up/down
converter + RFIC● What about higher-er?
– 60 GHz to 85 GHz– Hybrid block up/down
converter + RFIC
FutureRFICs
LO
RFIC
28 GHz to 85 GHz RF
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Data Converters● Current RFICs have integrated data
converters– AD9361: Up to 61.44 Msps, 12-bit A/D, 12-bit
D/A, parallel interface
– LMS7002: Up to 61.44 Msps, 12-bit A/D, 12-bit D/A, parallel interface
– AD9371: Up to 122.88 Msps, 16-bit A/D, 14-bit D/A, serial interface (JESD204b)
● Discrete A/D and D/A converters– 16-bit for IF sampling (up to 100s of Msps)– 12-bit for direct RF sampling (up to 4 Gsps)– JESD204b most common interface these days
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Data Converters – Industry Trends
● RFICs– 100s of Msps– Topping out at 16-bits– Serial interface (JESD204b)
● Fully integrated into FPGA– Xilinx RFSoC– FPGA fabric + multi-Gsps A/D and
D/A converters– 2/4/8/16 channels– No JESD204b to worry about– Same challenges as any direct RF
sampling solution
FutureRFICs
CPU+
CustomLogic
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PCIe
PCIe
Interfaces● PCIe
– Fast (up to 16 Gbps per lane), low latency,scalable
– Optimized/efficient transport– Typically an edge connector interface– Focused on generic data transport
● Ethernet– Fast (10 Gbps), medium latency, scalable– Bulky connectors + cables (SFP+)– Focused on networking use-case
● USB 3.0/3.1– Fast (5/10 Gbps), higher latency, difficult to scale– Typically a cable interface– Focused on consumer use-cases and
peripherals (cameras, data storage, etc)
PCIe
Dual SFP+
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Interfaces – Industry Trends● PCIe all day long
– Gen5 hits 32 Gbps per lane (2019)● Thunderbolt 3
– Cabled PCIe for the masses!– Baked into USB-C connector– Up to 40 Gbps (well, 32 Gbps for PCIe...
4 lanes x 8 Gbps)– Daisy-chain multiple devices with single host
● Ethernet– 10 GbE over RJ45– Laptops need to catch up– 40G/100G
+
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CPU Classes● Key architectural questions for SDR usage
– Core CPU processing capability (SIMD options?)– I/O options to move data in/out of the CPU– Memory architecture (cache, RAM, and non-volatile)– Lots of others, but these are the big ones
● ARM– Single/dual/quad/octo core solutions– 1W – 10W typical power consumption– Ex: NXP (formerly Freescale) i.MX6 and i.MX7– Ex: Xilinx Zynq and Zynq Ultrascale System on Chip
● Intel x86– Solutions from 1 to 24 cores– 4W to 70W+– Better support for GPU usage– Ex: Atom “Apollo Lake” (1-4 cores) family very
interesting
Dual-core ARM (Zynq) Quad core ARM (i.MX6)
Quad core x86
12 core x86
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CPU Classes – Industry Trends
● Companies continue to experiment withmassive multi-core– Ex: Adapteva Epiphany CPU, Ceva DSP,
others– Still no formidable traction
● Same old same old?– ARM and Intel x86 will continue to lead the
charge– 4-8 cores seems to be the sweet spot– GPU additions continue to improve– Intel recently shuttered their really
interesting integrated CPU module business(Joule, Galileo, Edison)
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Development API / Framework● Single C/C++ API for all cards in our Sidekiq
family● Open API for end customer development● Library ported to ARM, x86-32, and x86-64● Focused on simplifying and streamlining
customer development● New releases every 2-3 months● Support for GNU Radio, Matlab, and
REDHAWK● FPGA reference design for custom FPGA
Development● Well-defined “user_app” for custom FPGA
blocks
M.2
MiniPCIe Matchstiq S10
Sidekiq X2 Sidekiq X2 w/Thunderbolt 3
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Development API/Framework – Industry Trends● Applications in higher-level languages
(Python, Matlab, others?)...but C/C++still rule the world
● Open APIs● FPGA translation tools● Xilinx SDSoC
– Translate C code to FPGA block– Really hard problem– Making progress...but...
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Summary● SDR world offers more options now than ever before● Platform variables/options are quite varied, and
making objective comparisons can be quite difficult● The tip of the iceberg, but it is a start
● Let's look at some concrete platform examples
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M.2
MiniPCIe
Sidekiq M.2● Standard M.2 3042 card● 30mm x42mm x 4mm● AD9361 RFIC + Xilinx Artix 7 FPGA (XC7A50T)● 70 MHz – 6 GHz● 2x2 MIMO capable transceiver● Sample rates between 200 Ksps and 61.44
Msps● Gen2 PCIe x1 interface to host● USB 2.0 interface to host● External PPS and reference clock input options● Typical power consumption: 2W (application
dependent)● Supported by libsidekiq API
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Sidekiq Deployment Options
Up to 8cards
Up to 6cards
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Matchstiq S12● “Candy bar” style SDR● 4.4” x 2.0” x 1.4”● Sidekiq MiniPCIe card + quad-core ARM
CPU running Linux (OpenWRT)● 1x1 RF transceiver● 1 MHz to 6 GHz● Seven Rx pre-select filters from 400 MHz to 6
GHz● Block up/down converter to extend below
70 MHz● Integrated GPS receiver● Gigabit ethernet + USB OTG + HDMI● 8W typical power consumption● Supported by libsidekiq API
LO
RFIC
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Sidekiq X2● VITA57 FMC card form factor● 84mm x 69mm x 8.5mm● Based on AD9371 RFIC● 1 MHz to 6 GHz● Multiple RF interfaces
– Phase coherent Rx pair (common LO)– Third independently tunable Rx– Phase coherent Tx pair
● 16-bit A/D, 14-bit D/A● Up to 100 MHz RF bandwidth per channel● Integrated Rx pre-select filters● 10 MHz + PPS input on front panel● Power consumption: 5W – 8W (application
dependent)● Supported by libsidekiq API
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Sidekiq X2 Deployment Options● Sidekiq X2 PDK
– FMC PCIe carrier card with Xilinx Kintex UltrascaleKCU060 FPGA
● 726K LEs, 2760 DSP slices, 38 Mb BRAM
– Thunderbolt3 Chassis for PCIe carrier– PCIe Gen3 x4 interface to host laptop/NUC/desktop
PC replaces 10 GbE● Low latency PCIe● DMA directly to host system memory● 122.88 Msamples/sec * 4 bytes/sample * 3 Rx channels =
~1500 MB/sec (12 Gbits/sec)
● 3U VPX carrier card– Xilinx Zynq Ultrascale+ ZU9EG (quad-core ARM +
FPGA)● 600K LEs, 2520 DSP slices, 32 Mb BRAM
– 4 GB DDR4 RAM– Supports conduction and convection cooled o ptions
+
3U VPX
Thunderbolt 3