Tile-Based Texture Mapping on Graphics Hardware

Li-Yi WeiNVIDIA

Texture Mapping with Large Repetitive PatternTexture Mapping with Large Repetitive Pattern

Large terrain textures are very commonGames, simulation

IssuesBandwidth for texture access

Memory/Cache for texture storage

Need texture compression

Method 1:General Image CompressionMethod 1:General Image Compression

image pattern

Implemented in graphics hardwareVQ [Beers*96], S3TC/DXT [S3 Corporation]

○ Good for general images

× Suboptimal for repetitive patterns

Method 2:Texture TilingMethod 2:Texture Tiling

Only works for repetitive patterns

○ Good compression ratio

× Requires changing texture coordinates

× No native texture filtering support

Our Goal: Texture Tiling on GPUOur Goal: Texture Tiling on GPU

○ No need to change texture coordinates

○ Native texture filtering

○ Implementation in fragment program

Texture Tiling: Simple CaseTexture Tiling: Simple Case

○ Infinite compression

○ Good for GPU

○ Fast decoding

× Repetition

Input tile

Arbitrarily large output texture

tiling

Texture Tiling: Wang TilesTexture Tiling: Wang Tiles

Arbitrarily large output texture

Input tiles

tiling

○ replace repetition by non-periodic tiling

How Wang Tile WorksHow Wang Tile Works

Input tiles

tiling

adjacent tiles share identical edge colorcontinuous pattern across identical edge color

11 22

33 44

Wang Tiles for Texture Mapping on GPU ?Wang Tiles for Texture Mapping on GPU ?

Original [Cohen*03]

× Sequential tiling

× No texture filtering across tiles

× Not good for GPU

Our approach

○ Random-accessible tiling

○ Native texture filtering across tiles

○ Good for GPU

× Need more tiles

Overview of Our SystemOverview of Our System

Packed input tiles(correct filtering across tiles) Output virtual texture

Tile hashing

Random Access by Tile HashingRandom Access by Tile Hashing

Random Access by Tile HashingRandom Access by Tile Hashing

Tile index (Oh, Ov)Hash function H()

Edge color ← (Oh, Ov)Cs = H( H(Oh) + Ov )

Cn = H( H(Oh) + Ov + 1)

Cw = H( Oh + H(2×Ov) )

Ce = H( Oh + 1 + H(2×Ov) )

○ Consistencye.g. Ce(1, 2) = Cw(2, 2)

○ Direct evaluationNo sequential dependency

○ Easy to computeOh0 1 2 3 4

Ov

0

1

2

3

4

Cw

Cs

Cn

Ce

Tile Hashing QualityTile Hashing Quality

• H() simply a permutation table

• Hashing quality depends on table size

8 entries 16 entries 32 entries

Image size 32 x 32

Random Access Needs All Possible Tile Edge ColorsRandom Access Needs All Possible Tile Edge Colors

Output virtual texture

Input tiles

No matching input!

with all edge colors

How to Filter Tiled Texture ?How to Filter Tiled Texture ?

Shader filtering○ flexible

× slow

× > 1 texture

Boundary padding○ fast

○ 1 texture

× size not in 2n

× MIPMAP

Tile packing○ fast

○ 1 texture

○ size in 2n

○ MIPMAP

× how to pack?

No good packing

(for general case)

Tile Packing for Texture FilteringTile Packing for Texture Filtering

× tiles with all colors (for random access)

○ each tile used once (no wasted memory)

○ continuous boundary (native filtering)

○ easy to compute

Packed input tiles

Tile Packing in 1DTile Packing in 1D

Index(e1, e2) =

0, e1 = e2 = 0;

e12 + 2×e2 – 1, e1 > e2 > 0;

e22 + 2×e1, e2 > e1 ≥ 0;

(e2 + 1)2 - 2, e1 = e2 > 0;

(e1 + 1)2 - 1, e1 > e2 = 0;

0 0 0 01 2 2 21 1e1 e2

○ each tile used once

○ continuous boundary

○ easy to compute

Tile Packing in 2DTile Packing in 2D

Index(e1, e2) =

0, e1 = e2 = 0;

e12 + 2×e2 – 1, e1 > e2 > 0;

e22 + 2×e1, e2 > e1 ≥ 0;

(e2 + 1)2 - 2, e1 = e2 > 0;

(e1 + 1)2 - 1, e1 > e2 = 0;

as 2 orthogonal 1D packinghorizontal: Index(cw, ce)

vertical: Index(cs, cn)

cecw

cn

cs

Implementation and PerformanceImplementation and Performance

ImplementationCg without hand optimization

Performance(million tri-linear texels per second on Geforce FX 5600)

2.7 – full fragment program implementation

20 – pre-compute tile hashing in a texture

ResultsResults

Input tiles Result with virtual texture size 8192x8192

ResultsResults

Input tiles

Traditional texture mapCorrect tile edge/corner

Correct tile edgeIncorrect low-res tile

LimitationsLimitations

× Incorrect lower-resolution MIPMAP levels

× Need tile set with all possible edge colors

× Not fast enough

Future WorkFuture Work

• Performance improvement

• Driver implementation

• Hash instruction in hardware

• 3D texture tile

AcknowledgementsAcknowledgements

Wei-Chao ChenRead the 1st paper draft

Says I should submit

John DanskinPermission to submit

Reviewers

NVIDIANS

Questions?Questions?