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Extending the TWINSCAN NXT platform
Computational lithography enables device scaling
NXE: 3300B qualified to support customer product development
ASML’s customer magazine 2013 Issue 2
images | Colofon
Editorial Board
Lucas van Grinsven, Peter Jenkins
Managing Editor
Michael Pullen
Contributing Editor
Saskia Boeije
Contributing Writers
Rudy Peeters, Alberto Pirati, Carlo Battistella,
Remi Pieternella, Gary Zhang and TK Lim
Circulation
Emily Leung, Michael Pullen, Saskia Boeije
For more information, please see:
www.asml.com/images
© 2013, ASML Holding BV
ASML, ASM Lithography, TWINSCAN, PAS 5500,
PAS 5000, SA 5200, ATHENA, QUASAR, IRIS, ILIAS,
FOCAL, Micralign, Micrascan, 3DAlign, 2DStitching,
3DMetrology, Brion Technologies, LithoServer,
LithoGuide, Scattering Bars, LithoCruiser, Tachyon
2.0, Tachyon RDI, Tachyon LMC, Tachyon OPC+,
LithoCool, AGILE, ImageTuner, EFESE, Feature Scan,
T-ReCS and the ASML logo are trademarks of ASML
Holding N.V. or of affiliate companies. The trademarks
may be used either alone or in combination with
a further product designation. Starlith, AERIAL,
and AERIAL II are trademarks of Carl Zeiss. TEL is
a trademark of Tokyo Electron Limited. Sun, Sun
Microsystems, the Sun Logo, iForce, Solaris, and the
Java logo are trademarks or registered trademarks of
Sun Microsystems, Inc. in the United States and other
countries. Bayon is a trademark of Kureha Chemical
Industry Co. Ltd. Nothing in this publication is intended
to make representations with regard to whether any
trademark is registered or to suggest that any sign
other than those mentioned should not be considered
to be a trademark of ASML or of any third party.
ASML lithography systems are Class 1 laser products.
4 8 104 NXE:3300B qualified to support
customer product development
8 ACE: a new facility for
TWINSCAN refurbishment
10 Extending the TWINSCAN
NXT platform
16 Computational lithography
enables device scaling
2
Customer-focused improvements seem
to be the theme around ASML this year.
While we continue to push forward,
making steady progress in developing
EUV, our engineers have also been
busy coming up with creative solutions
to make sure you get the most out of
our existing platforms, and in this issue
you will read about some of these new
developments.
This year we launched an extension
to the TWINSCAN platform, with the
NXT:1970Ci. This new system gives
our customers a smooth transition to
EUV and provides improvements in
productivity, overlay, and focus control.
We’ve also initiated a pilot project at
the ASML Center of Excellence (ACE)
in Taiwan, called Refurb Lite, that brings
pre-owned TWINSCAN systems to ACE to
be refurbished to an agreed specification
and shipped with a warranty. With this
new offering, manufacturers can mitigate
risk and ensure refurbishment of the
highest quality.
Recently ASML Brion completed a project
with engineers from GLOBALFOUNDRIES
that was yet another example of the
on-going innovation to support the
customer’s drive to extend Moore’s Law.
Together they demonstrated an innovative
Flexible Mask Optimization (FMO)
technology that delivers process window
gains above and beyond those possible
with standard OPC while also minimizing
run time impact.
That’s not all, with the acquisition of
Cymer this year, we were able to combine
our extensive experience and knowledge
to develop a new EUV source operating
mode to deliver higher output power.
The new MOPA-pre-pulse operating
mode uses two lasers instead of one,
which increases the conversion efficiency
2-3 times, enabling output power in line
with manufacturing requirements.
And the improvements don’t end with
our tools, the Images Magazine team
is looking at new ways for us to improve
upon the magazine and bring more value
to you, the reader. We would love to hear
your ideas, via a reader survey found
on page 19 of this issue. Please take
a couple minutes and let us know
what you think of the magazine. You’ll
influence the future of Images and also
be included in a drawing to win a new
Bose SoundLink speaker!
Happy reading
Mike
Improvements to get you where you need to be By Michael Pullen, Senior Communications Specialist
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ASML Images, 2013 Issue 2
Editor’s note
NXE:3300B qualified to support customer product deve lopmentPerformance fit for 10 nm logic and sub 20 nm DRAM
By Rudy Peeters, Senior Product Manager EUV, and Alberto Pirati, Senior Product Manager EUV Sources
4
14nm HP
Resolution shown on NXE:3300B for dense line spaces,regular and staggered contact holes; all single exposures
14nm HP
Dipole30, Dipole45,
Chemically Amplified Resist (CAR)
Inpria Resist
Quasar 30 (CAR) Large Annular (CAR)
18nm HP 19nm HP
13nm HP 13nm HP 17nm HP 18nm HP
NXE:3300B qualified to support customer product deve lopmentPerformance fit for 10 nm logic and sub 20 nm DRAM
By Rudy Peeters, Senior Product Manager EUV, and Alberto Pirati, Senior Product Manager EUV Sources
Excellent imaging
The NXE:3300B has already been showing
excellent performance. The system is
specified and qualified for production at
22 nm, and in tests at ASML it achieved
this resolution for both dense and isolated
lines with exposure latitudes above 16%
using conventional illumination. The
NXE:3300B can also be switched to off-
axis illumination at full productivity. Using
this feature, the scanner has achieved
22-nm resolution at 15 mJ/cm2 – a 20%
dose reduction.
Tests by both ASML and customers have
shown that the NXE:3300B can actually
exceed its imaging specifications. The
system has exposed dense lines at
resolutions down to 13 nm half pitch, and
contact holes down to 17 nm half pitch.
This performance isn’t limited to simple
test patterns, the system also handles real
device structures with ease. For example,
a customer has used the NXE:3300B to
print a 10-nm logic node metal-1 layer in a
single exposure and with a large exposure
window. A depth of focus of around 120
nm was achieved with hardly any best
focus difference between features.
Abstract | The first TWINSCAN NXE:3300B
production EUV lithography systems have
started shipments. The system has been
proven to reach resolutions of 22 nm with
large process windows at doses around
15 mJ/cm2. Moreover, in experiments,
9-nm line-space patterns have been
printed using spacer-assisted double
patterning. In a parallel development,
initial results from NXE:3300B sources
with MOPA-pre-pulse technology will be
able to deliver 70 wph next year, and is
upgradeable to 125 wph in 2015.
Marking another milestone in extreme
ultraviolet (EUV) lithography’s migration
to high-volume manufacturing, ASML
has qualified the first of its TWINSCAN
NXE:3300B production systems. The
NXE:3300B is ASML’s third-generation
EUV lithography system. Following on
from the Alpha Demo Tool (ADT) and
TWINSCAN NXE:3100 pre-production
system, which have allowed customers
to gain valuable EUV experience,
the NXE:3300B targets high-volume
manufacturing at the 22-nm node and
beyond. With the first three units qualified,
a further eight are in system assembly at
ASML’s dedicated EUV cleanroom facility
in Veldhoven, the Netherlands.
13nm
resolution
achieved
using EUV
single
exposure
5
ASML Images, 2013 Issue 2
Metal 1 random logic, half pitch=23nmillustrates sweet spot for EUV @0.33 NA
Focus
• Single Exposure
• Usable DoF Current >120nm
• Double Patterning (LELE)
EUV ArFi
• Usable DoF typical 40..60nm
-80nm
-60nm
-40nm
-20nm
0nm
20nm
40nm
60nm
80nm
NXE:3300B shows single-digit (9 nm HP) patterning capability!using spacer-assisted double patterning (SADP)
NXE litho(single expose, 18nm HP)
Core etch Spacer dep. Spacer etch
Demonstrated 9 nm half-pitch L/S pattern with EUV single SADP flow.
Lithob Conditions:- ASML NXE:3300B system- EUVL single expose 18nm HP- 0.33NA, Dipole-90x illumination- Resist: 50nm EUV J1099 on 20nm BS AL412 UL on stack wafer with Hard mask
9 nm HP
Source: ASML, IMEC, AMAT (Feb.’13)
Full wafer dedicated chuck overlay of <1.4nm X - axisY - axis
8Lot (1.3,1.3)
6
4
21.3 1.31.2 1.4 1.4
1.0
01 2 3
Day
Ded
icat
ed c
huck
Ove
rlay
(nm
)
99.7 %x: 1.3 nmy: 1.3 nm
5 nm
NXE-Immersion Matched Machine Overlay of <3.5nm
8Lot (3.4,3.0)
6
4
2
3.5 3.33.0
2.33.2
2.7
01 2 3
Wafer
XT:1950i reference wafersEEXY subrecipes18par (avg field) + CPE (6 par per field)
Mat
ched
Mac
hine
O
verla
y [n
m]
99.7 %x: 1.3 nmy: 1.3 nm
5 nm
X - axisY - axis
matter. In high-volume manufacturing,
overlay performance is critical to ensure
high production yields and hence
profitability. With multiple systems now
integrated, the NXE:3300B is consistently
performing beyond specification here
as well. Dedicated chuck overlay below
1.4 nm and NXE-immersion matched
machine overlay below 3.5 nm have both
been achieved on multiple systems.
ASML is continuing to explore system
enhancements to drive down overlay even
further and support customers’ planned
on-product overlay roadmaps.
System reliability is also a vital
consideration in high-volume
manufacturing. During system build-up,
over 1 million wafers have been cycled
at high scan speeds on the various
NXE:3300B tools for integration and
reliability testing.
Nearing HVM
EUV lithography offers manufacturers a
single-exposure manufacture with the
potential to support feature shrink for
a number of generations to come. With
the shipping of the first TWINSCAN
NXE:3300B systems and the development
of the MOPA-pre-pulse source (see box),
ASML is driving the technology forward
towards high-volume manufacturing at
the 22-nm half-pitch node and beyond.
The key driver for adopting EUV is this
ability to image complex patterns at
small feature size in a single exposure.
And ASML’s EUV roadmap supports the
industry’s plans to shrink feature sizes to
below 10 nm with future systems planned
with sub-10-nm resolution. However, it
is interesting to note that the NXE:3300B
has already been used to print sub-10-
nm features. ASML and partners have
demonstrated a 9-nm half-pitch line-
space pattern on the NXE:3300B using
a single spacer-assisted double-
patterning flow. This highlights not just
the excellent imaging capabilities of
the system, but also its strong CDU
performance – which has also been
shown to be better than specified.
Reliable performance
Of course, resolution and feature size
are not the only system parameters that
22-nm resolution at
15 mJ/cm2 – a 20%
dose reduction
6
14nm HP
Resolution shown on NXE:3300B for dense lines/spaces13 nm HP single exposure; 9nm HP spacer-assisted double patterning
13nm HP 14nm HP 13nm HP
(single expose,18nm HP) Core etch Spacer dep. 9nm HP
Dipole30, Chemically Amplified Resist (CAR)Dipole45, Inpria
Demonstrated 9 nm half-pitch L/S pattern with EUV single SADP flow
Focus
• Node: N10 (23nm HP) 1st insertion point for EUV
• Single Exposure
• Node: N20 (32nm HP)
EUV ArF immersion
• Double Patterning (design split)
10nm node standard cell (23nm HP), illustrates sweet spot for EUV @0.33 NA
NXE:3300B enables single exposure random logic Metal1 at large depth of focus
-80nm
-60nm
-40nm
-20nm
0nm
20nm
40nm
60nm
80nm
• Best focus difference <10nm
• Overlapping DoF current 100..120nm (expected to improve after optimization (e.g. OPC))
• Best focus difference up to 40-60nm
• Overlapping DoF typical 60nm
Position in the exposure slit -12mm 0mm +12mm
Excellent print performance over the full exposure slit
Following this successful verification, the
technology has now been implemented
in the new source design to be used
in the NXE:3300B. Output powers up
to 60 W have already been achieved.
These results confirm the current source
configuration will be capable of delivering
70 wph in 2014 and that, with some
already identified improvements, the
technology can be extended to support
125 wph in 2015. ASML and Cymer have
now focused their development resources
on the MOPA-pre-pulse technology
with the aim of making it available to
customers by the end of 2013. We have
also put in place a roadmap to extend
the technology to 250 W and meet chip
manufacturers requirements for high-
volume manufacturing in 2015.
This roadmap hinges on:
• increasing the CO2 drive laser power
from 26 to 47 kW
• improving conversion efficiency from
2.5 to 3.3%
• increasing the EUV light collector
efficiency from 34 to 40%
The key components for all three of these
enhancements have been experimentally
proven, validating the plan to deliver
250 W – enough to support a throughput
of 125 wafers per hour – by 2015.
With the imaging and overlay performance
of ASML’s TWINSCAN NXE platform now
well established, perhaps the last piece of
the jigsaw required before EUV transitions
to mass manufacturing is the availability
of EUV sources with the power output to
support high-volume throughputs.
Progress in this area hasn’t been as rapid
as hoped in the last few years. However,
over the past twelve months, ASML
and source specialist Cymer have been
working together closely to increase
synergy and accelerate the development
of suitable EUV sources, culminating in
ASML’s recent acquisition of Cymer. As
well as greatly increasing the resources
available for source development,
this deal enables optimal alignment
between Cymer’s wealth of expertise in
laser technology and ASML’s extensive
experience in technology integration.
As a result, a source operating mode that
delivers higher EUV output power has
been developed. The current operating
mode for laser-produced plasma (LPP)
sources involves aiming a single intense
pulse from a CO2 laser on to a tin droplet,
creating a plasma that emits EUV light
at 13.5 nm. By contrast the MOPA-pre-
pulse operating mode uses two laser
pulses. The first, low-power pulse heats
and flattens the tin droplet, increasing
its surface area. Then a second, higher-
power pulse is accurately focused onto
the pancake-shaped droplet to create
the EUV-emitting plasma. This approach
increase CO2-to-EUV conversion efficiency
by a factor of 2-3 times compared to the
current operating mode, therefore enabling
output powers in line with high-volume
manufacturing requirements.
Feasibility proven
ASML and Cymer first demonstrated
the feasibility of the MOPA-pre-pulse
technology on the source design used
in the TWINSCAN NXE:3100. These
sources were able to produce up to
50 W with a dose control high enough
to enable 99.9% die yield.
New source concept promises 250 W by 2015
throughput of
125 wafers
per hour
by 2015
7
ASML Images, 2013 Issue 2
ACE: a new facility for TWINSCAN refurbishmentBy Carlo Battistella, Marketing Manager Mature Products and Services
The More-than-Moore markets such
as microcontrollers are a fast growing
sector of the semiconductor industry.
Often, these markets don’t employ the
smallest feature sizes. But they do require
high-quality, cost-effective lithography
solutions – typically operating at more
mature technology nodes.
This is driving increasing demand for
pre-owned lithography systems. Pre-
owned systems give manufacturers a
route to the lithography capabilities they
need at a lower investment, something
that is particularly valuable in niche and
emerging market sectors.
ASML has been active on the pre-owned
market for many years, and aims to
bring added-value for both buyers and
sellers by giving systems a second life.
Unlike traditional re-sellers, ASML is able
to refurbish pre-owned systems to the
highest quality. So manufacturers can
mitigate risk by buying a system with an
agreed specification supported with a
warranty. We can even tailor systems to
the specific needs of the purchaser or
intended application during refurbishment.
The market for refurbished systems has
been well established in the 200-mm
wafer sector for some time. Now, with
more and more manufacturers looking to
access the economies of scale that come
with larger wafers, demand for refurbished
300-mm systems is also growing.
In response – and following a successful
pilot project – ASML is expanding
capacity for refurbishing TWINSCAN
lithography solutions by carrying out
TWINSCAN refurbishments at the ASML
Center of Excellence (ACE) in Linkou,
Taiwan as well as our headquarters in
Veldhoven, the Netherlands.
Abstract | ASML has shipped the first
refurbished TWINSCAN system from
the ASML Center of Excellence (ACE)
in Linkou, Taiwan. Adding TWINSCAN
refurbishment to ACE’s list of capabilities
allows ASML and its customers to get
more from this valuable resource and
increases ASML capacity for delivering
high-quality refurbished 300-mm systems.
8
allow ASML to increase the availability of
high-quality pre-owned 300-mm systems.
A number of customers have already
visited ACE to see the TWINSCAN and
PAS5500 refurbishment facilities for
themselves, and have been universally
impressed with the level of maturity of
the activities there. “I very much enjoyed
my visit to ACE. The people were very
friendly and helpful, and answered all my
questions. It’s really amazing the effort
you take to refurbish machines back to
factory acceptance test levels. And the
food in the canteen was delicious!”
said one visitor.
The next TWINSCAN refurbishment
project and customer for ACE are already
in the pipeline, with more projects planned
for the future. Initially, ACE will look to
refurbish two TWINSCAN systems per
year with the option to increase these
activities as demand requires
ACE: a new facility for TWINSCAN refurbishmentBy Carlo Battistella, Marketing Manager Mature Products and Services
Full refurbishment requires a much more
extensive technical infrastructure, and so
the ACE pilot was planned for a Refurb
Lite project. In the pilot, ACE refurbished
a TWINSCAN XT:1250, which was then
shipped to a customer who plans to use
the system for MRAM production.
Ready for action
Following the success of the pilot,
ASML has decided to make TWINSCAN
refurbishment a structural part of ACE’s
activities. ACE will focus solely on
Refurb Lite projects, freeing up capacity
in Veldhoven, which will focus on full
refurbishment activities. The decision will
An ACE in the pack
Using ACE as a TWINSCAN refurbishment
facility was a natural decision. ACE is
home to ASML’s 200-mm competence
center which concentrates all know-how
on small-wafer systems into one location
and has been handling all our PAS 5500
system refurbishments since 2009. In
addition to all this refurbishment expertise,
ACE also houses our global support
center which has a wealth of experience in
troubleshooting and extensive knowledge
of TWINSCAN systems.
This combination of skills and its location
make ACE a unique and valuable resource
for both ASML and our customers. And
by adding TWINSCAN refurbishment to
the mix, ACE’s activities are evolving
to reflect ASML’s current product portfolio
so that the facility continues to deliver
the best possible service.
However, our PAS 5500 and TWINSCAN
systems are very different, so preparing
ACE for TWINSCAN refurbishment is a
significant undertaking. Naturally, this
includes ensuring the right people have the
right skills and know-how to carry out the
refurbishments. But it also means making
sure the facilities themselves are ready –
right down to checking the doors on the
shipping bays were wide enough for the
physically larger TWINSCAN systems.
Pilot proves successful
Once all the preparations were complete,
TWINSCAN refurbishment activities at
ACE kicked off with a pilot project. ASML
offers two levels of refurbishment: full
refurbishment back to ATP specification
with a one-year warranty, and Refurb Lite,
where the system is refurbished to an
agreed specification and shipped with
a six-month warranty.
The Linkou team that made it happen...!
Expanding capacity for
refurbishing TWINSCAN
lithography solutions
9
ASML Images, 2013 Issue 2
Extending the TWINSCAN NXT platformBy Remi Pieternella, Senior Product Manager
10
Extending the TWINSCAN NXT platformBy Remi Pieternella, Senior Product Manager
Abstract | ASML is launching a new
extension to its TWINSCAN NXT high-
throughput, high-precision ArF immersion
lithography platform. The TWINSCAN
NXT:1970Ci offers a leap forward in
overlay and focus control plus improved
productivity. It will help manufacturers in
all segments enter volume manufacturing
at the 1x nodes, with high yields, device
performance and profitability. The new
system is part of the ongoing TWINSCAN
NXT roadmap, giving manufacturers a
smooth transition to EUV lithography.
11
ASML Images, 2013 Issue 2
ASML is extending the performance and
productivity of its TWINSCAN NXT high-
throughput, high-precision ArF immersion
lithography platform with the launch of the
NXT:1970Ci. Due to start shipping in Q4
2013, the NXT:1970Ci targets profitable
volume production at the 1x nodes
through multiple-patterning techniques.
To make that possible, the new system
offers a leap forward in overlay and focus
control – plus an increased throughput
of 250 wafers per hour.
Semiconductor industry roadmaps for
the next two years demand on-product
overlay performance of around 4 nm. To
help manufacturers meet this requirement,
the NXT:1970Ci delivers Dedicated-Chuck
Overall (DCO) of 2.0 nm and matched-
machine overlay (MMO) of 3.5 nm.
250 wafers per hourReducing overlay PARIS style
One of the key developments that
helps the NXT:1970Ci reach these
stringent overlay specifications is the
new multifunction parallel ILIAS (PARIS)
sensor. PARIS is an interferometry-based
sensor that measures the effects of lens
and reticle heating more quickly and
accurately than previously possible.
For reticle heating effects, where the
previous sensor measured just the four
corners of the reticle, PARIS measures
a total of 14 points. This allows a much
better model of the thermal distortion
of the reticle to be built up and hence
more accurate corrections to be applied
using TOP RC 2 (see page 15), which
is standard on the NXT:1970Ci.
12
New multifunctional sensor will push residuals below 1nm Parallel 7 point interferometer allows for accurate higher order corrections
2x7 points capture actual barrel shape
Lens correction using scanning lens element
Faster & more accurate measurement using Parallel Lens Interferometer (PARIS)
~0.8 nm1.8 nm
Automatic wafer to wafer lens heating correctionsNew sensor measures lens heating in between every wafer
Lens heating causes focus offsets
New multifunctional sensordetects lens heating …
And corrects it withFlexWave
Reduced process dependency by leveling with UVLSHigher pitch enables more accurate edge measurement
SiO2
Si
BARC Resist
SiO2
Si
BARC Resist
Gate Contact Gate Contact
Metal 1 Metal 1
Focus beam
Current level sensor Focus beam
New level sensor (UV-LS)
Note: AGILE sensor is used to reduce ASD effect
New sensor design greatly reduced influence of underlying stackIncreased absorption as a result of shorter wavelength
Focus error
In addition, PARIS can measure lens
heating effects across the whole slit
simultaneously, making it much faster
than previous solutions. As a result, lot
correction is eight times quicker and lens
heating can even be measured between
wafers rather than just between lots.
Corrections can then be applied wafer-
by-wafer – based on measurements of the
actual conditions rather than model-based
predictions – via FlexWave programmable
wavefronts.
Further overlay improvements come from
the NXT:1970Ci’s enhanced lens design
and wafer table. Thanks to an improved
manufacturing and smart software
model, the new lens have up to 40%
fewer aberrations and 50% better lens
fingerprint matching.
Meanwhile the wafer table includes
a multi-segment heater that ensures
a more uniform temperature around
the wafer edge reducing the thermal
overlay fingerprint.
On the level
Elsewhere, the NXT:1970Ci features
a brand-new ultraviolet level sensor
(UV-LS), to help improve focus control.
Previously, the level sensor used visible
light, but this can sometimes penetrate
the top layers of the wafer stack leading to
small errors in the wafer map. With focus
budgets becoming ever tighter as feature
sizes decreases, these small errors were
starting to become relevant. Switching
to a shorter wavelength eliminates the
stack penetration, reducing process
dependency.
Volume production
at the 1x nodes
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ASML Images, 2013 Issue 2
Novel immersion hood adopted to support 800 mm/sCO2 contained meniscus allows for full scan speed throughout the wafer
supply
lens
wafer Vscan
extraction CO2
CO2 IH enables• Tight defectivity performance • Higher scan speed throughout the wafer
The new level sensor has been extensively
tested on real customer stacks and has
been shown to significantly improve both
inter- and intra-field leveling. Together with
other enhancements, this enables a full-
wafer focus uniformity of less than 20 nm.
Cutting defectivity
Also new on the NXT:1970Ci is a novel
immersion hood featuring a carbon-
dioxide “gas knife”. The gas knife
stabilizes the immersion pool meniscus,
allowing the system to operate at the full
800 mm/s scan speed right across the
wafer while keeping defectivity under tight
control. Tests on a wide range of resists
show the new immersion hood delivers
consistently good performance, with an
average of fewer than seven defects per
wafer and no big bubbles observed.
Looking to the future
With its enhanced performance, the
NXT:1970Ci targets sub-20-nm feature
NXT:1970Ci specifications
Full-wafer dedicated chuck overlay 2.5 nm
Full-wafer matched machine overlay 3.5 nm
Full-wafer focus uniformity 20 nm
Full-wafer CDU (isolated features) 1.3 nm
Full-field throughput (96 shots) 250 wph
sizes via multiple patterning techniques.
And thanks to an improved wafer stage
and handler it also delivers the high
throughput required to enable cost-
effective high-volume production.
The NXT:1970Ci is part of ASML’s ongoing
roadmap to extend the capabilities of the
TWINSCAN NXT platform. All existing
NXT systems can be upgraded in the field
to become a fully specified NXT:1970Ci
via system node extension packages.
In addition, ASML is planning further
NXT extensions in the coming years.
The TWINSCAN deep ultraviolet (DUV)
roadmap supports multiple patterning
requirements to at least 2018, and
provides manufacturers with a smooth
transition to extreme ultraviolet (EUV)
lithography by allowing them mix-
and-match EUV and multi-patterning
immersion ArF according to the precise
requirements of the specific layer.
14
TOP RC 2 Correction Characteristic
Uncorrected
X = 3.4 Y = 6.5
Corrected with TOP RC
X = 2.3 Y = 4.0
Corrected with TOP RC 2
X = 1.4 Y = 1.6
Uncorrected, through lotreticle heating fingerprint• magY and k18 fingerprints
15 parameter correction• magY corrected.• k18 fingerprint persists
18 parameter scorrection including k18
(Barrel Shape Reticle Heating fingerprint)
5 nm 5 nm
-0.8
-0.6
-0.4
-0.2
0
0 100 200 300 400
Mag
nific
atio
n (p
pm)
Feed forward example MY
Time(s)
TOP-RC/TOP RC 2 Work Flow
…
…
Lens manipulators
WS, RS
TOP-RC
static correction per exposure
TOP-RC2scanning correction per exposure
Correction parameters
Measure/Predict thereticle temperaturefingerprint through lot
1 32 Model the reticledeformation per exposureand determine optimalcorrection set
Correct via lens and stages
• TOP RC controls reticle heating induced overlay in three steps.• Same workflow for TOP RC and TOP RC 2
As feature sizes shrink, On-Product
Overlay (OPO) requirements become
increasingly tight. With today’s complex
reticle patterns and extreme pupil shapes,
reticle heating effects have become a
major contributor to OPO performance.
They typically account for around 25%
of the OPO budget, but this figure varies
greatly depending on the application and,
crucially, the position within the lot.
The new TOP RC 2 overlay package helps
manufacturers address this issue. Like
the previous TOP RC package, it uses
measurements of the reticle temperature
map to model the thermal deformation of
the reticle, and then applies corrections
for each exposure via the lens and
stages. However, where TOP RC applies
static corrections to compensate for
y magnification fingerprints, TOP RC
2 creates scanning corrections to
compensate for the barrel-shaped
k18 fingerprint to further reduce
heating effect.
As a result, TOP RC 2 reduces intrafield
overlay fingerprint due to reticle heating
by 3.0 nm under ATP conditions. That’s
a further 1.5 nm improvement compared
to the use of just TOP RC. Compared
to an uncorrected exposure, that could
translate to an OPO improvement of
around a nanometer. However, the
actual improvements depend heavily
on the layer, with layers that use low-
transmission reticles and high doses likely
to see the biggest gains. Indeed, in beta
testing at customer sites, the intrafield
overlay fingerprint due to reticle heating
improved by as much as 5 nm.
TOP RC 2 is a software product, and
included as standard on the new
TWINSCAN NXT:1970Ci. It is also
available as a factory option and
field upgrade for the NXT:1960Bi and
NXT:1950Ai systems that are fitted with
the 1951 lens. A version for systems with
the older 1950 lens is in development.
Improving on-product overlay through reticle heating controlBy TK Lim, Product Manager
15
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40
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2012 2013 2014 2015
2x 1x
Focu
s B
udge
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]
Process Window Control
PWC
Focus monitoringand correction
R&D
Process Transfer
Process Window EnhancementPWE
Optimizing design and imaging hot spots is critical to meet on-product focus requirements
Hotspot
Pattern Matcher FullChip w/ FlexRay
3D model (mask, resist, wafer)
SMO - FlexRay SMO - FlexWave Flexible mask optimization
Production
Volume Ramp
HvM QualifiedNot qualified
Customer reguirements for scanner focus controlFocus control w/o PWCFocus control w/ PWCUsable DOF w/o PWEUsable DOF w/ PWE
Computational lithography enables device scalingBy Gary Zhang, Vice President Marketing, ASML Brion
Computational lithography plays a critical
role in driving the semiconductor industry
forward. The industry’s impressive
success over the last 40 years has been
built on aggressive shrink strategies
as described by Moore’s Law. But with
shrinking device feature sizes, it becomes
increasingly hard to fabricate them
reliably to ever tighter process margins.
Chip makers have widely adopted
computational lithography to address this
challenge. By optimizing the entire imaging
process – from illumination source and
mask to projection lens and final imaging
in resist – computational lithography
delivers the best possible process window
for a given set of design rules.
Abstract | By exploiting the complex
interaction between light and matter at
deep sub-wavelength scales, computational
lithography allows semiconductor
manufacturers to achieve high yields at the
smallest technology nodes. As a recent
project with GLOBALFOUNDRIES shows,
ASML Brion’s combination of cutting-edge
technology and in-depth understanding of
customer needs helps chip makers deliver
aggressive device scaling roadmaps with
cost-effective production.
Process window enhancement (PWE) and process window control (PWC) are both critical to meet
on-product focus requirements at 2x nodes and below.
Enabling the largest process windows
As part of ASML, we build our Tachyon
computational lithography products
on a complete set of accurate scanner
models to ensure the largest process
window and hence the best on-
product performance in production. In
addition, our long-term commitment to
customers allows us to develop a deeper
understanding of their needs and build
lasting relationships, becoming their
partner and solution provider node after
node. The combination of technology
know-how and customer intimacy has
seen ASML Brion becomes a leader in
the world of computational lithography.
16
BF-60nm
BD-2mj
BF-30nm
Best Focus
BF+30nm
BF+60nm
BF-60nm
BF-30nm
Best Focus
BF+30nm
BF+60nm
BD-1mjBest Dose BD+1mj BD+2mj BD-2mj BD-1mj
Best Dose BD+1mj BD+2mj
DOF: SMO wafer > POR wafer
POR SMO
Litho SEM image
40
50
60
70
80
90
100
110
-80 -60 -40 -20 0 20 40 60 80
CD
(nm
)
Resist top loss issue at Metal-1 during 28-nm rampSignificant AEI (post etch) hotspots found on wafer at defocus conditions
not found at ADI (post litho) verification or inspection
Simulated contour• Red - at resist bottom• Blue - at resist top
• R3D model predicts the necking and bridging at resist top• Prediction match with etch hot spots
Example of a post etch hotspot
LMC simulated with R3D SEM image after etchCD SEM Measurements
Focus (nm)
Resist CD
Etch CDResist
Etch
Brion’s Tachyon products utilize all the
resolution enhancement techniques to
maximize the common process window
across the full chip. Meanwhile ASML’s
process window control solutions keep
production closer to the center of the
process window over time and from
scanner to scanner. Holistic lithography
ties these two approaches together. And
by doing so, it allows chip manufacturers
to make full use of advanced scanner
capabilities such as the FlexRay
free-form illuminator and FlexWave
programmable wavefront. This ability to
expand process window and maximize
lithography process performance is
essential at the 20-nm node and below.
GLOBALFOUNDRIES’ wafer verification data showing that Tachyon SMO and OPC with 3D mask model
eliminated the necking hotspot issue in the 28-nm node metal layer.
The end result is fully optimized
lithography processes that offer better
performance and higher return on
investment.
Real-world gains
The ability of ASML Brion’s combination
of cutting-edge technology and
customer intimacy to drive shrink was
highlighted in a recent project undertaken
with GLOBALFOUNDRIES. In this
project, engineers from ASML Brion
and GLOBALFOUNDRIES deployed
a suite of Tachyon computational
lithography products to identify and solve
manufacturability issues in metal layers for
28-nm node logic designs.
At these feature sizes the three-
dimensional nature of imaging elements
such as the mask has a noticeable effect
on lithography imaging results and should
be incorporated into computational
lithography calculations. Hence Tachyon
OPC+, an industry-leading solution for
optical-proximity correction (OPC), features
a 3D model of the mask rather than the 2D
mask model common in other OPC tools.
This allows Tachyon OPC to accurately
correct the manufacturability problems that
other products miss. In this case, Tachyon
OPC successfully captured a necking
hotspot problem (areas of the design that
limit the overall process window) that
GLOBALFOUNDRIES’ original 2D model-
Resist top loss is increasingly significant at smaller nodes, but can be successfully predicted, optimized
and corrected by incorporating 3D resist models (R3D) into Tachyon SMO and OPC tools.
17
ASML Images, 2013 Issue 2
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4
6
8
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0 1000 2000 3000 4000 5000 1000
Nor
mal
ized
Spe
edup
Need of compute power for leading edge mask tape-outTape-out turn-around time (TAT) for 2x/1x nodes needs highly scalable solution
Recent example: customer now needs 18000 licenses > distributed processingto assure full-mask OPC tape-out times typically within 8 hours
Number of Cores Number of Cores
TATspec
Comparison of Tape-out TATTachyon vs. Other solution
0
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Tape
- ou
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(hrs
)
Ideal Speedup
N40 Metal (Brion): 99.6% @3960 cores
N20 Via (Brion): 93.8%@2890 cores
N28 Poly (Customer A): 97%@4500
N28 M1 (Customer B) 95%@2900 cores
2000 3000 4000
Tachyon TAT (hrs)
Other solution TAT (hrs)
based OPC had failed to describe and
correct this issue.
ASML Brion showed that the hotspot
problem could be solved through a source-
mask optimization that also incorporated
3D mask effects. Together, engineers
from the two companies implemented a
full chip source-mask optimization work
flow based on the powerful Tachyon SMO
and OPC tools, which employ the same
3D mask model (M3D). The new work flow
allowed GLOBALFOUNDRIES to improve
the full chip pattern coverage and expand
the common process window including
the potential hotspots in the design library.
Identifying these design weak spots
and including them in the source-mask
optimization allowed better results to be
achieved more quickly. As a result, this
approach delivered a robust OPC solution
faster than alternatives, significantly
reducing the development cycle.
Of course, the mask isn’t the only
three-dimensional elements used in the
exposure step. The Tachyon family also
offers the option to include a 3D model
of the resist stack in computational
lithography calculations. Using Tachyon
Lithography Manufacturability Check
(LMC) and a 3D resist model, ASML Brion
and GLOBALFOUNDRIES found that
resist top loss could cause significant
post etch hotspots. However, by including
the 3D resist model in Tachyon OPC,
resist top loss could be controlled thus
eliminating post etch hotspots and further
expanding the process window.
Cost-effective production
at the cutting edge
In addition to performance, cost is
a vital consideration in the highly
competitive semiconductor industry. For
computational lithography, cost is tied
to the resources required to achieve a
certain turn-around time. The time it takes
to perform the various computational
lithography operations increases
dramatically as features get smaller
and simulations more sophisticated. So
the critical question becomes: can you
implement solutions that run fast enough
to meet your tape-out schedule and
support volume production?
ASML Brion’s Tachyon solutions address
this run time challenge in two ways.
Firstly, they employ the most efficient
models, optimization algorithms and
computation work flows. Secondly, they
are designed to be massively scalable,
maintaining better than 95% productivity
per core over thousands of CPUs.
Brion has developed a Tachyon FlexTM
platform to allow customers to fully utilize
their existing computing infrastructure
by distributing their computational
lithography processing for 2x and 1x
nodes over very large numbers of CPU
cores to meet their mask tape-out turn-
around time requirements.
Going further where it matters most
ASML Brion has recently introduced an
innovative Flexible Mask Optimization
(FMO) technology that delivers process
window gains above and beyond those
possible with standard OPC while
minimizing run time impact. To do this,
the FMO technology identifies the design
weak spots and applies advanced
OPC techniques only where they are
Greatly expands
the process window
Tachyon Flex™ platform shows excellent scalability against competition in distributed processing over
thousands of CPU cores that results in substantial time and cost savings for volume production tapeout.
18
Flexible Mask Optimization (FMO) enables cost effective full chip implementation of advanced OPC
Flexible Mask Optimization (FMO)
Inside:Full correction
Outside:No change
Boundary: transition
Baseline OPC
Fullchip Verification
Advanced OPC
Tapeout
PW limiter(LMC defects)
Local enhancement
Before: PV Band = 17 nm After: PV Band = 9.3 nm
semiconductor manufacturers in their
drive to extend Moore’s Law through cost-
effective production at the leading edge.
In summary, the Brion Tachyon product
family enables cost-effective production
while delivering the optimal process
window, enabling chip manufacturers
to continue driving aggressive shrink
roadmaps. As a GLOBALFOUNDRIES
senior OPC manager puts it: “At 28 nm
and below it is necessary to explore and
realize every possible process window
improvement to achieve a manufacturable
patterning solution. We have found
that Brion’s OPC and computational
lithography solutions enable us to achieve
this goal and ensure the best possible
yield for our customers.”
really needed, to enhance lithography
performance in the local areas of the weak
spots in the chip design. Engineers from
GLOBALFOUNDRIES and ASML Brion
have demonstrated the FMO flow in a
20-nm node R&D tape-out for a hotspot
fix and are working together to implement
it in 14-nm node production. This is yet
another example of how ASML Brion’s
on-going technical innovation supports
Identify and
solve manufacturability
issues
Tachyon Flexible Mask Optimization (FMO) technology was demonstrated on customer’s 20-nm
full chip design, delivering maximum process window benefits while reducing mask complexity
and shortening turn-around time (TAT).
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ASML Images, 2013 Issue 2
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