Post on 02-Apr-2018
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Crystal Growth and WaferPreparation
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Advantages of Si over Ge
Si has a larger bandgap (1.1 eV for Si versus 0.66 eV
for Ge)
Si devices can operate at a higher temperature (150oC
vs 100oC)
Intrinsic resistivity is higher (2.3 x 105 -cm vs 47 -
cm)
SiO2 is more stable than GeO2 which is also water
soluble
Si is less costly
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The processing characteristics and some material propertiesof silicon wafers depend on its orientation.
The planes have the highest density of atoms on the
surface, so crystals grow most easily on these planes and
oxidation occurs at a higher pace when compared to other
crystal planes.
Traditionally, bipolar devices are fabricated in
oriented crystals whereas materials are preferred for
MOS devices.
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Defects
Any non-silicon
atoms incorporated
into the lattice ateither a substitutional
or interstitial site are
considered pointdefects
Point defects are important in the kinetics of diffusion and
oxidation. Moreover, to be electrically active, dopants must
occupy substitutional sites in order to introduce an energy level in
the bandgap.
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Dislocations are line defects.Dislocations in a lattice are
dynamic defects. That is, they
can diffuse under applied
stress, dissociate into two or
more dislocations, or combine
with other dislocations.
Dislocations in devices are
generally undesirable, because
they act as sinks for metallicimpurities and alter diffusion
profiles.
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Defects Two typical area or planar defects are twins and grain
boundaries
Twinning represents a change in the crystal orientation
across a twin plane, such that a mirror image exists across
that plane
Grain boundaries are more disordered than twins and
separate grains of single crystals in polycrystalline silicon
Planar defects appear during crystal growth, and crystals
having such defects are not considered usable for IC
manufacture and are discarded
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Precipitates of impurity or dopant
atoms constitute the fourth class of
defects. The solubility of dopantsvaries with temperature, and so if an
impurity is introduced at the
maximum concentration allowed by
its solubility, a supersaturatedcondition will exist upon cooling. The
crystal achieves an equilibrium state
by precipitating the impurity atoms in
excess of the solubility level as asecond phase.
Precipitates are generally undesirable
as they act as sites for dislocationgeneration. Dislocations result from
the volume mismatch between the
precipitate and the lattice, inducing a
strain that is relieved by theformation of dislocations.
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Electronic Grade Silicon
Electronic-grade silicon (EGS), a polycrystalline material of high
purity, is the starting material for the preparation of single crystal
silicon. EGS is made from metallurgical-grade silicon (MGS) which
in turn is made from quartzite, which is a relatively pure form ofsand. MGS is purified by the following reaction:
Si (solid) + 3HCl (gas)
SiHCl3 (gas) + H2 (gas) + heat
The boiling point of trichlorosilane (SiHCl3) is 32oC and can be
readily purified using fractional distillation. EGS is formed by
reacting trichlorosilane with hydrogen:
2SiHCl3 (gas) + 2H2 (gas) 2Si (solid) + 6HCl (gas)
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Czochralski Crystal Growth
The Czochralski (CZ) process, which
accounts for 80% to 90% of worldwide
silicon consumption, consists of dipping
a small single-crystal seed into moltensilicon and slowly withdrawing the seed
while rotating it simultaneously.
The crucible is usually made of quartz
or graphite with a fused silica lining.
After the seed is dipped into the EGSmelt, the crystal is pulled at a rate that
minimizes defects and yields a constant
ingot diameter.
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Impurity Segregation
Impurities, both intentional and unintentional, are introduced into the silicon ingot.Intentional dopants are mixed into the melt during crystal growth, while
unintentional impurities originate from the crucible, ambient, etc.
All common impurities have different solubilities in the solid and in the melt. An
equilibrium segregation coefficient ko
can be defined to be the ratio of the
equilibrium concentration of the impurity in the solid to that in the liquid at the
interface, i.e. ko
= Cs/C
l. Note that all the values shown in the table are below
unity, implying that the impurities preferentially segregate to the melt and the
melt becomes progressively enriched with these impurities as the crystal is
being pulled.
Impurity Al As B C Cu Fe O P Sb
ko 0.002 0.3 0.8 0.07 4x10
-6
8x10-6
0.25 0.35 0.023
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Impurity Distribution
The distribution of an impurity in the grown crystal can be
described mathematically by the normal freezing relation:
1)1(
= okoos
XCkC
Xis the fraction of the melt solidified
Co
is the initial melt concentration
Cs
is the solid concentration
ko
is the segregation coefficient
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Ingot
Weight = M
Weight = dMDopant conc. = C
s
Melt
S = dopant remaining in melt
Consider a crystal being grown from
a melt having an initial weight Mo
with an initial dopant concentration
Co
in the melt (i.e., the weight of the
dopant per 1 gram melt).
At a given point of growth when a
crystal of weightMhas been grown,the amount of the dopant remaining
in the melt (by weight) isS.
For an incremental amount of the crystal with weight dM, the corresponding
reduction of the dopant (-dS) from the melt is Cs
dM, where Csis the dopant
concentration in the crystal (by weight): -dS = Cs
dM
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The remaining weight of the melt is Mo
- M, and the dopant concentration in
the liquid (by weight),C
l, is given by
Combining the two equations and substituting
Given the initial weight of the dopant, , we can integrate and obtain
Solving the equation gives
C SM M
l
o
=
C C ks l o
=
dS
Sk
dM
M Mo
o
=
C Mo o
dS
Sk
dM
M MC M
S
o
oo
M
o o
=
C k CM
Ms o o
o
ko
=
1
1
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Impurity concentrationprofiles along the silicon
ingot (axially) for different
ko with Co = 1
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CZ-Si crystals are grown
from a silicon melt contained
in a fused silica (SiO2)
crucible. Fused silica reacts
with hot silicon and releases
oxygen into the melt giving
CZ-Si an indigenous oxygen
concentration of about 1018
atoms/cm3.
Although the segregation coefficient of oxygen is
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Oxygen in Silicon
Oxygen forms a thermal donor in silicon
Oxygen increases the mechanical strength
of silicon
Oxygen precipitates provide gettering sitesfor unintentional impurities
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Thermal Donors
Thermal donors are formed by the polymerizationof Si and O into complexes such as SiO4 in
interstitial sites at 400oC to 500oC
Careful quenching of the crystal annihilates these
donors
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Internal Gettering
Under certain annealing
cycles, oxygen atoms in
the bulk of the crystal
can be precipitated as
SiOx
clusters that act as
trapping sites toimpurities.
This process is called internal gettering and is one of the mosteffective means to remove unintentional impurities from the
near surface region where devices are fabricated.
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Float-Zone Process
The float-zone process has someadvantages over the Czochralski
process for the growth of certain
types of silicon crystals.
The molten silicon in the float-zone
apparatus is not contained in a
crucible, and is thus not subject to
the oxygen contamination present in
CZ-Si crystals.
The float-zone process is also
necessary to obtain crystals with a
high resistivity (>> 25 W-cm).
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Characterization
Routine evaluation of ingots or boules
involves measuring the resistivity,evaluating their crystal perfection, andexamining their mechanical properties, such
as size and mass
Other tests include the measurement ofcarbon, oxygen, and heavy metals
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Resistivity
MeasurementResistivity measurements are made
on the flat ends of the crystal by the
four-point probe technique.
A current, I, is passed through the
outer probes and the voltage, V, is
measured between the inner probes.
The measured resistance (V/I) is
converted to resistivity (W-cm)
using the relationship:
= (V/I)2S
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The calculated
resistivity can be
correlated withdopant concentration
using a dopant
concentration versusresisitivity chart
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Wafer Preparation
Gross crystalline imperfections are detected visually anddefective crystals are cut from the boule. More subtle defectssuch as dislocations can be disclosed by preferential chemical
etching
Chemical information can be acquired employing wet
analytical techniques or more sophisticated solid-state andsurface analytical methods
Silicon, albeit brittle, is a hard material. The most suitablematerial for shaping and cutting silicon is industrial-gradediamond. Conversion of silicon ingots into polished wafersrequires several machining, chemical, and polishing
operations
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Slicing determines four wafer parameters:
Surface orientation (e.g., or )
Thickness (e.g., 0.5 0.7 mm, depending on wafer
diameter)
Taper, which is the wafer thickness variations from one
end to another
Bow, which is the surface curvature of the wafermeasured from the center of the wafer to its edge
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Finished Wafers
The wafer as cut varies enough in thickness to warrant an additional lapping
operation that is performed under pressure using a mixture of Al2O
3and glycerine.
Subsequent chemical etching removes any remaining damaged and contaminated
regions.
Polishing is the final step. Its purpose is to provide a smooth, specular surface on
which device features can be photoengraved.
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Typical Specifications for Silicon Wafers
Parameter 125 mm 150 mm 200 mm 300 mm
Diameter (mm) 125+1 150+1 200+1 300+1
Thickness (mm) 0.6-0.65 0.65-0.7 0.715-
0.735
0.755-
0.775
Bow (m) 70 60 30
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Epitaxy (epimeans "upon" and taxis means "ordered") is a term applied to
processes used to grow a thin crystalline layer on a crystalline substrate.The seed crystal in epitaxial processes is the substrate. Unlike the
Czochralski process, crystalline thin films can be grown below the melting
point using techniques such as chemical vapor deposition (CVD), molecularbeam epitaxy (MBE), etc.
When a material is grown epitaxially on a substrate of the same material,
the process is called homoepitaxy. On the contrary, if the layer and
substrate are of different materials, such as AlxGa
1-xAs on GaAs, the
process is termed heteroepitaxy. Naturally, in heteroepitaxy, the crystal
structures of the layer and the substrate must be similar in order to achieve
good crystalline integrity.
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Advantages of epitaxy:
(1) Doping profiles that are
not attainable through other
conventional means such asdiffusion or ion implantation
(2) Physical and chemicalproperties of the epitaxial
layers can be made different
from the bulk materials.
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256Mbit DRAM
(buried strap trench)
Cross section of a trench DRAM
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Alpha-particles originating from packagingmaterials and the environment can cause electron-
hole pairs in the bulk of the wafer. If these charges
migrate to the storage cell of a DRAM (dynamic
random access memory) structure, the data stored
can be wiped out.
A heavily doped substrate increases the rate of
electron-hole pair recombination and the DRAM is
less prone to alpha-particle soft errors.
Non-Volatile Flash Memory
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Non-Volatile Flash Memory
Writing Erasing
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Vapor Phase Epitaxy
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The Reynolds number, Re, characterizes the type of fluid flow in a
reactor:R
e= D
rv/
where Dr
denotes the diameter of the reaction tube, v is the gas velocity,
represents the gas density, and stands for the gas viscosity. Valuesof D
rand v are generally several centimeters and tens of cm/s,
respectively. The carrier gas is usually H2, and using typical values for
and , the value ofRe is about 100. These parameters result in gasflow in the laminar regime. That is, the gases flow in a regular,
continuous, and non-turbulent mode and in a specific direction.
Accordingly, a boundary layer of reduced gas velocity will form abovethe susceptor and at the walls of the reaction chamber. The thickness of
the boundary layer, y, is defined as: wherexis the distance
along the reactor.
2/1
=
e
r
R
xDy
Boundary Layer Formation
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Boundary Layer Formation
(Horizontal Reactor)
Reactants are transported to the substrate surface and reaction by-products
diffuse back into the main gas stream across the boundary layer
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The fluxes of species going to and coming from the wafer
surface are complex functions of the temperature, pressure,reactant, concentration, layer thickness, etc. By convention, the
flux, J, is defined to be the product ofD and dn/dy, and is
approximated as:
y
nnDJ
sg )( =
where ng and ns are the gas stream and surface reactant
concentrations, respectively, D is the gas-phase diffusivity,
which is function of pressure and temperature, y is the
boundary layer thickness, and J is the reactant flux of
molecules per unit area per unit time.
In steady state the reactant flux across the boundary layer is equal
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In steady state, the reactant flux across the boundary layer is equal
to the chemical reaction rate, ks
, at the specimen surface.
Therefore,
J= ksns
D
yk
nn
s
g
s
+=
1
The quantity D/y is called the gas phase mass-transfer coefficient,
hg.
In the limiting case when ks >> hg, ns approaches zero, thereby
implying that the overall reaction is limited by transport of reactant
across the boundary layer. Conversely, ifks
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Growth Chemistry
The most common starting chemical is silicon tetrachloride
(SiCl4) as it has a lower reactivity with respect to oxidizers in
the carrier gas than the other silicon hydrogen chloride
compounds, such as SiH4, SiHCl3, etc. The overall reaction is:
SiCl4
(gas) + 2H2
(gas) Si (solid) + 4HCl (gas)
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Experimental results indicate
the presence of many
intermediate chemical
species. In particular, at a
reaction temperature of
1200oC, four species have
been observed using FTIR.
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Doping
Autodoping Zone A is due to solid-state out-
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diffusion from the substrate, and
can be approximated by thecomplementary error function if
the growth velocity is less than
2(D/t)1/2, where D is the dopant
diffusion constant and t denotes the
deposition time.
Zone B originates from gas-phase autodoping.
Because the dopant evaporating from thewafer surface is supplied from the wafer
interior by solid-state diffusion, the flux of
dopant from an exposed surface decreases
with time.
When autodoping diminishes, the
intentional doping predominatesand the profile becomes flat.
Autodoping thus limits the
minimum layer thickness thatcan be grown with controlled
doping as well as the minimum
dopant level.
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Defects
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Defects
(1) Line (or edge) dislocation initially present in the substrate andextending into the epitaxial layer
(2) Epitaxial stacking fault nucleated by an impurity precipitate on the
substrate surface
(3) Impurity precipitate caused by epitaxial process contamination
(4) Growth hillock
(5) Bulk stacking faults, one of which intersects the substrate surface,
thereby being extended into the layer
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The crystal perfection of an epitaxial layer never exceedsthat of the substrate and is frequently inferior.
Generally, defects can be reduced by a higher growthtemperature, reduced gas pressure, lower growth rate, and
cleaner substrate surface.
A typical pre-epitaxy substrate cleaning process consists
of a wet clean followed by a dilute HF dip and an in-situ
HCl, HF, or SF6 vapor etch.
Selective Epitaxy Growth (SEG)
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Selective Epitaxy Growth (SEG)
Selective epitaxy is a
technique by which single-crystal silicon is fabricated
in a small designated area
SEG is usually accomplished at reduced partial pressure of the
reactant in order to suppress the nucleation of silicon on the
dielectric film, thereby resulting in nucleation only on theexposed silicon surface
L T t E it (LTE)
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Low Temperature Epitaxy (LTE)
Low-temperature epitaxy (LTE) of Si produces epitaxial growth
at temperature of 550o
C or less, much lower than that inconventional epitaxial processes. A low temperature is required
to minimize thermal diffusion and mass-transport-controlled
processes.
CVD and molecular beam epitaxy (MBE) are the most popular
methods. The success of these techniques relies on both an
ultra-clean growth environment and a unique Si surface-
cleaning process.
Molecular Beam Epitaxy (MBE)
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Molecular Beam Epitaxy (MBE)
Molecular beam epitaxy,
which utilizes evaporation,
is a non-CVD epitaxial
growth process. MBE istherefore not complicated
by boundary-layer transport
effects, nor are there
chemical reactions to
consider. The essence of
the process is evaporation
of silicon and one or moredopants.
Silicon MBE is performed under ultra-high vacuum (UHV)
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S p g (U V)
conditions of 10-8 to 10-10 Torr, where the mean free path of the
atom is given by 5x10-3/P where P is the system pressure in
Torr. At a typical pressure of 10-9 Torr, L is 5x106 cm,
transport velocity is dominated by thermal energy effects
Lack of intermediate reactions and diffusion effects, coupled
with relatively high thermal velocities, results in film properties
changing rapidly with any change of the source
Typical growth temperature is between 400oC and 800oC in
order to reduce out-diffusion and autodoping. Growth rates are
in the range of 0.01 to 0.3 m/minute
Despite the slow growth rate and relatively expensive
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Despite the slow growth rate and relatively expensive
instrumentation, MBE offers several advantages overconventional CVD for VLSI
MBE is a low-temperature process that minimizes dopantdiffusion and autodoping
MBE allows more precise control of doping and layer
thickness, because CVD is limited by reactant introduction andpumping time constants
These advantages are not exploited extensively in silicon ICtechnology, but MBE has found tremendous usages inmicrowave and photonic devices made of III-V semiconductors
Rapid Thermal Processing (RTP)
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Chemical and physical processes applied to silicon wafers aregenerally thermally activated. Typical silicon-based processesuse batch furnaces for thermal fabrication steps, where a batch
consists of 20 to 100 wafers that are simultaneously processed ina single system
Processing of wafers requires tight control of contamination,process parameters, and reduced manufacturing costs, and someproducers are now using single-wafer processing in some steps
Using transient lamp heating or a continuous heat source (verticalfurnace), a single wafer can be heated very quickly to reduce thethermal cycle and mitigate undesirable effects such as dopantdiffusion
p g ( )
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Rapid thermal
processing (RTP)system that is
optically heated
Conventional
batch-furnacethat is resistively
heatedContinuous heat
source, vertical
furnace RTP system
The most important feature of a rapid thermal annealing
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The most important feature of a rapid thermal annealing
processing system consisting of tungsten-halogen lamps isits generation and quick delivery of radiant energy to thewafer (large dT/dt) in a wavelength band of 0.3 to 4.0 m
Because of the optical character and wavelength of theenergy transfer, the quartz walls do not absorb lightefficiently, whereas the silicon wafer does
The wafer is not in thermal equilibrium with the cold wallsof the system, allowing for short processing times (seconds
to minutes) compared to minutes to hours for conventionalfurnaces. The reduction in temperature-time exposureafforded by RTP is dramatic
Rapid heating with large temperature gradients can cause
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Rapid heating with large temperature gradients can cause
wafer damage in the form of slip dislocations induced bythermal stress and heating can be laterally non-uniform
across the wafer
Conventional furnace processes bring with them significant
problems such as particle generation from the hot walls,
limited ambient control in an open system, and a largethermal mass that restricts controlled heating times to tens
of minutes
Requirements on contamination, process control, cost, and
space are driving a paradigm shift to RTP
RTP demands on the growth of high-purity epitaxial Si include
ambient purity (oxygen and water concentrations in the parts per
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billion range), optimization of gas flow patterns, minimum wall
deposition, and vacuum compatibility.
The deposition
process comprises a
mass-transport process
with a weak
temperaturedependence and a
sequential surface-
reaction process that is
exponentiallydependent on wafer
temperature.
Silicon-on-Insulator (SOI)
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Silicon device structures have inherent problems that are associated
with parasitic circuit elements arising from junction capacitance.These effects become more severe as device dimensions shrink. A
viable means to circumvent the problem is to fabricate devices in small
islands of silicon on an insulating substrate.
SOI Fabrication Techniques
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Traditional approach is to fabricate such a structure in a silicon
epitaxial thin film grown on sapphire (Al2O3)
The lattice parameters of silicon and sapphire are quite similar,
high quality SOS (silicon-on-sapphire) epitaxial layers can be
fabricated
The high cost of sapphire substrates, low yield, and lack of
commercially viable applications limit the use of SOS to
primarily military applications
SOI Fabrication Techniques
SIMOX (separation by implantation of oxygen) utilizeshigh dose blanket o gen ion implantation to form a
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high dose blanket oxygen ion implantation to form a
sandwiched buried oxide layer to isolate devices from thewafer substrate
Wafer bonding utilizes Van der Waals forces to bond twopolished silicon wafers, at least one of which is coveredwith thermal oxide, in a very clean environment at about1000oC. Mechanical or electrochemical thinning has
achieved 1 m thickness with 0.1 m deviations
More recent approaches include the combination of wafer
bonding and layer cleavage using hydrogen or helium ionimplantation (ion-cut) as well as epitaxial growth on poroussilicon and wafer bonding
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Oxidation
Roles of SiO2
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Roles of SiO2
Mask against implant or diffusion of dopant
into silicon Surface passivation
Device isolation
Component in MOS structures (gate oxide)
Electrical isolation of multi-level
metallization systems
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Oxide Growth
Si (solid) + O2 (gas) SiO2 (solid)Si (solid) + 2H2O (gas) SiO2 (solid) + 2H2 (gas)
During the oxidation process, oxygen or water molecules diffuse through the
surface oxide into the silicon substrate, and the Si-SiO2
interface migrates into the
silicon. Thermal oxidation of silicon results in a random three-dimensional
network of silicon dioxide constructed from tetrahedral cells. Since the volume
expands, the external SiO2
surface is not coplanar with the original silicon surface.
For the growth of an oxide of thickness d, a layer of silicon equal to a thickness of
0.44dis consumed.
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F1
can be approximated to be proportional to the difference in
concentration of the oxidizing species in the gas phase and on the oxide
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concentration of the oxidizing species in the gas phase and on the oxide
surface: F1
= hG
(CG
- CS
)
where hG
is the gas-phase mass-transfer coefficient, CG
is the oxidant
concentration in the gas phase, and CS
is the oxidant concentration
adjacent to the oxide surface. Substituting C=P/kT,
F1
= (hG/kT)(P
GP
S).
Henry's Law states that, in equilibrium, the concentration of a species
within a solid is proportional to the partial pressure of that species in the
surrounding gas. Thus, Co
= HPS
, where Co
is the equilibrium
concentration of the oxidant in the oxide on the outer surface, H is the
Henry's Law constant, andPS
is the partial pressure of oxidant in the gas
phase adjacent to the oxide surface.
We denote the equilibrium concentration in the oxide, that is, the
concentration which would be in equilibrium with the partial pressure in
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the bulk of the gasPGby the symbol C*, andC*=HP
G
C*- Co
=H(PG
- PS
)
F1
= (hG/HkT)(C*- C
o) = h (C*- C
o)
where h = hG/HkT is the gas-phase mass-transfer coefficient in terms of
concentration in the solid.
Oxidation is thus a non-equilibrium process with the driving force
being the deviation of concentration from equilibrium. Henry's Lawis valid only in the absence of dissociation effects at the gas-oxide
interface, thereby implying that the species diffusing through the
oxide is molecular.
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In order to calculate the oxide growth rate, we define N1 as thenumber of oxidant molecules incorporated into a unit volume of the
oxide layer. If oxygen is the reactant, N1
= 2.2 x 1022 atoms/cm3
because the density of SiO2 is 2.2 x 1022
cm-3
. If water is used, N1becomes 4.4 x 1022 cm-3 as two H
2O molecules are incorporated into
each SiO2
molecule. The differential equation for oxide growth is
given by
D
dk
h
k
CkCk
dt
ddN
oss
s
is
o
++==
1
)( *
1
With an initial condition ofdo(t= 0) = d
i, the solution is
d 2 + Ad = B (t + )
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do
Ado
B (t )
whereA 2D [1/kS
+ 1/h],B 2DC*/N1, and (d
i2 +Ad
i) /B.
The quantity represents a shift in the time coordinate to account for the
presence of the initial oxide layerdi. Solving ford
oas a function of time
gives1
4/
1
2/
2/1
2
++=BA
t
A
do
For long oxidation times, i.e., t>> and t>> A2/4B, do2 Bt. B is
therefore called theparabolic rate constant. For short times, i.e., (t+ )
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Oxidation
temperature
(oC)A (m)
Parabolic rate
constant
B (m2/h)
Linear rate
constant
B/A (m/h)(h)
1200 0.05 0.720 14.40 0
1100 0.11 0.510 4.64 0
1000 0.226 0.287 1.27 0
920 0.50 0.203 0.406 0
Rate constants for dry oxidation of silicon
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Oxidation
temperature
(oC)A (m)
Parabolic rate
constant
(m2/h)
Linear rate
constant
B/A (m/h)(h)
1200 0.040 0.045 1.12 0.027
1100 0.090 0.027 0.30 0.076
1000 0.165 0.0117 0.071 0.37
920 0.235 0.0049 0.0208 1.40
800 0.370 0.0011 0.0030 9.0
Oriental Dependence
The rate of oxidation depends on the availability of reaction sites on the
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Orient-
ation
Area of
unit cell(cm2)
Si atoms
in area
Si bonds
in area
Bonds
available
Available
bonds,N
(1014 cm-2)
Nrelative
to
4 8 4 9.59 1.000
2 4 3 11.76 1.227
a2 2 4 2 6.77 0.707
p y
silicon substrates. Hence, as the surface areal density of atoms isdependent on crystal orientation, oxidation rates are expected to be
orientation dependent. Oxidation on the crystal plane occurs at
a higher rate because there are a higher number of surface atoms, i.e.
reaction sites or chemical bonds, when compared to a plane.
2 2a
232
1a
Rate constants for silicon oxidation in H2O (640 Torr)
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OxidationTemp (oC)
Orientation A (m) Parabolicrate constantB (m2/h)
Linear rateconstant
B/A(m/h)
B/A ratio/
900
0.95
0.60
0.143
0.151
0.150
0.252
1.68
950
0.74
0.44
0.231
0.231
0.311
0.524
1.68
1000
0.480.27
0.3140.314
0.6641.163
1.75
1050
0.295
0.18
0.413
0.413
1.400
2.307
1.65
1100
0.175
0.105
0.521
0.517
2.977
4.926
1.65
Average 1.68
Oxide thickness versus oxidation time for silicon
in H2O at 640 Torr
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Effects of Impurities
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Moisture much higher oxidation rate with traces of
water in the ambient
Boron (segregation into oxide) enhanced diffusionthrough the weakened bonds
Phosphorus (segregation into silicon) - concentrationdependence observed only at lower temperature,
where the surface reaction becomes important. This
dependence may be the result of phosphorus beingsegregated into the silicon
Oxidation of boron-doped silicon in wet oxygen as
a function of temperature and boron concentration
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a function of temperature and boron concentration
Oxidation of phosphorus-doped silicon in wet oxygen as a
function of temperature and phosphorus concentration
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High Pressure Oxidation
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Plasma Oxidation
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Anodic plasma oxidation has all the advantages associated with
the high-pressure technique and also offers the possibility of
growing high-quality oxides at even lower temperatures. Plasma
oxidation is a low-pressure process usually carried out in a pure
oxygen discharge. The plasma is sustained either by a high-
frequency or DC discharge. Placing the wafer in the uniform
density region of the plasma and biasing it slightly negatively
against the plasma potential allows it to collect active charged
oxygen species. The oxidation rate typically increases with
higher substrate temperature, plasma density, and substrate
dopant concentration.
Rapid Thermal Oxidation
Rapid thermal oxidation (RTO) is increasingly used in the growth of thin,
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p ( ) g y g ,
high-quality dielectric layers. The primary issues that differentiate RTO
from conventional thermal oxidation are the more complex chamber
design, radiation source, as well as temperature monitoring. From the
point of view of oxide-growth kinetics, RTO may be influenced by both
thermally activated processes and a non-thermal, photon-induced process
involving monatomic O atoms generated by UV and creating a parallel
oxidation reaction that dominates at lower temperature.
RTO growth kinetics exhibit activation energies differing from those
measured in conventionally grown oxides. In the initial stage (on theorder of 20 seconds), the RTO growth rate is linear followed by nonlinear
growth. The duration of the linear region is hardware dependent,
particular the heating source.
Oxide Properties
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A silicon dioxide layer can provide a selective mask against thediffusion of dopant atoms at elevated temperature, a very useful
property in IC processing. For it to work, the dopant diffusion rate
in the oxide must be slow with respect to that in silicon, so that thedopant does not diffuse through the oxide in the masked region
into the silicon. The masking oxide thickness must also be large
enough to prevent it from reaching the silicon substrate.
The often used n-type impurities as well as boron have very small
diffusion coefficients in oxide and are compatible with oxidemasking. However, this is not true for gallium, indium, and
aluminum.
Diffusion constants in SiO2
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Dopants Diffusion constants at 1100oC (cm2/s)
B 3.4 x 10-17 to 2.0 x 10-14
Ga 5.3 x 10-11
P 2.9 x 10-16 to 2.0 x 10-13
As 1.2 x 10-16 to 3.5 x 10-15
Sb 9.9 x 10-17
Oxide Charges
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Various charges and traps exist in thermally grown
oxide films. If a charge is present close to theSi/SiO2 interface, it can induce a charge of the
opposite polarity in the underlying silicon, therebyaffecting the ideal characteristics of the device, such
as the threshold voltage of a MOS capacitor.
Mobile ion charges (Qm) are attributed to
alkali ions such as Na, K, and Li, as well as
negative ions and heavy metals. They
Oxide-trapped charges (Qot) may be
positive or negative, due to holes or
electrons being trapped in the bulk of
the oxide. They can be annealed out by
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Interface-trapped charges (Qit) can interact with the underlying silicon. They
originate from structural defects related to the oxidation process, metallic impurities,
and bond-breaking processes. A low temperature hydrogen anneal at 450oC
effectively neutralizes most interface-trapped charges.
Fixed oxide charges (Qf) are located in theoxide within approximately 3 nm of the
SiO2 / Si interface. Qfcannot be charged or
discharged easily.
originate from processing materials,chemicals, ambient, or handling. Common
techniques employed to minimize Qminclude cleaning the furnace tube in a
chlorine ambient, gettering with
phosphosilicate glass (PSG), and using
masking layers such as silicon nitride.
low-temperature treatment.
Dopant Redistribution
D i h l id i h i f d i h ili
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During thermal oxidation, the interface advances into the silicon
substrate, and doping impurities will redistribute at the interface
until its chemical potential is the same on each side of the
interface. The ratio of the equilibrium concentration of the
impurity in silicon to that in SiO2 at the interface is called the
equilibrium segregation coefficient. Two additional factors that
influence the redistribution process are the diffusivity of the
impurity in the oxide (if large, the dopant can diffuse through the
oxide rapidly, thereby affecting the profile near the Si - SiO2interface) and the rate at which the interface moves with respect to
the diffusion rate.