All rights reserved. Any reproduction in whole or in part on any medium or use of the information contained herein is prohibited without the prior written consent of CEA
1
2007
Adaptive Power Reconfigurability for Preventing Excessive Power Dissipation in Wireless Receivers
Adaptive Power Reconfigurability for
Preventing Excessive Power Dissipation in Wireless
All rights reserved. Any reproduction in whole or in part on any medium or use of the information contained herein is prohibited without the prior written consent of CEA
2
2007
Adaptive Power Reconfigurability for Preventing Excessive Power Dissipation in Wireless Receivers
All rights reserved. Any reproduction in whole or in part on any medium or use of the information contained herein is prohibited without the prior written consent of CEA
3Adaptive Power Reconfigurability for Preventing Excessive Power Dissipation in Wireless Receivers
Problem Definition
Wireless receivers Usually utilized in mobile applications
Operate on batteries or energy scavenging structures
Power dissipation is imposed by the requirements Higher requirements Higher power dissipation
Over-specified receiver dissipates excessive power
All rights reserved. Any reproduction in whole or in part on any medium or use of the information contained herein is prohibited without the prior written consent of CEA
4Adaptive Power Reconfigurability for Preventing Excessive Power Dissipation in Wireless Receivers
minker SNR
P
PDR
signal
blocreq
minker SNRP
PPDR
signal
signalblocreq
floor
signalblocreq N
PPDR
ker
A conventional receiver has a fixed configuration High specifications due to worst case conditions
Dynamic range requirement alters during operation A function of signal and blocker conditions
All rights reserved. Any reproduction in whole or in part on any medium or use of the information contained herein is prohibited without the prior written consent of CEA
5Adaptive Power Reconfigurability for Preventing Excessive Power Dissipation in Wireless Receivers
All rights reserved. Any reproduction in whole or in part on any medium or use of the information contained herein is prohibited without the prior written consent of CEA
6Adaptive Power Reconfigurability for Preventing Excessive Power Dissipation in Wireless Receivers
Trade-off between LPF and ADCHigh order filter Low resolution ADC
Low order filter High resolution ADC
Should be optimized for minimum total powerResults will indicate the dominant power consumer
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7Adaptive Power Reconfigurability for Preventing Excessive Power Dissipation in Wireless Receivers
Baseband Block Optimization – cont.’d
POWER MODELS Normalized real data points from the literature
Up-to-date reconfigurable Active Gm-RC filter [Ozgun2006]
Up-to-date SAR ADCs are used [Nuzzo2009, Harpe2010, C.Liu2010, W.Liu2010]
Regions between the data points are extrapolated
Constant capacitance scaling assumed while normalizing BW (implies P ~ BW)
All rights reserved. Any reproduction in whole or in part on any medium or use of the information contained herein is prohibited without the prior written consent of CEA
8Adaptive Power Reconfigurability for Preventing Excessive Power Dissipation in Wireless Receivers
All rights reserved. Any reproduction in whole or in part on any medium or use of the information contained herein is prohibited without the prior written consent of CEA
9Adaptive Power Reconfigurability for Preventing Excessive Power Dissipation in Wireless Receivers
Average power dissipation depends on operating schedule
All rights reserved. Any reproduction in whole or in part on any medium or use of the information contained herein is prohibited without the prior written consent of CEA
10Adaptive Power Reconfigurability for Preventing Excessive Power Dissipation in Wireless Receivers
Time weights calculated using the formula
With adaptive power reconfigurability, Pav = 115.87 µW
Without adaptive power reconfigurability, Pav = 4.197 mW
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11Adaptive Power Reconfigurability for Preventing Excessive Power Dissipation in Wireless Receivers
Conclusions
Investigated the effect of using adaptive power reconfigurability concept in wireless receivers
Optimized the baseband block of a ZigBee receiver for minimum total power
Filter should be reconfigurable, ADC not necessarily
Illustrative scenario shows up to 36 times improvement is possible in average power dissipation
All rights reserved. Any reproduction in whole or in part on any medium or use of the information contained herein is prohibited without the prior written consent of CEA
12
2007
Adaptive Power Reconfigurability for Preventing Excessive Power Dissipation in Wireless Receivers
All rights reserved. Any reproduction in whole or in part on any medium or use of the information contained herein is prohibited without the prior written consent of CEA
13Adaptive Power Reconfigurability for Preventing Excessive Power Dissipation in Wireless Receivers
References[Ozgun2006] M. T. Ozgun, Y. P. Tsividis, and G. Burra, “Dynamic power
optimization of active filters with application to zero‑IF receivers,” IEEE J. Solid‑State Circuits, vol. 41, no. 6, pp. 1344‑1352, Jun. 2006.
[Nuzzo2009] P. Nuzzo et al., “A 6‑bit 50‑MS/s threshold configuring SAR ADC in 90‑nm digital CMOS,” Symposium on VLSI Circuits, 2009, pp. 238‑239.
[Harpe2010] P. Harpe, C. Zhou, X. Wang, G. Dolmans, and H. de Groot, “A 30fJ/conversion‑step 8b 0‑to‑10MS/s asynchronous SAR ADC in 90nm CMOS,” Int. Solid‑State Circuits Conf. Digest of Technical Papers, Feb. 2010, pp. 388‑389.
[C.Liu2010] C. C. Liu et al., “A 10b 100MS/s 1.13mW SAR ADC with binary‑scaled error compensation,” Int. Solid‑State Circuits Conf. Digest of Technical Papers, Feb. 2010, pp. 386‑387.
[W.Liu2010] W. Liu, P. Huang, Y. Chiu, “A 12b 22.5/45MS/s 3.0mW 0.059mm² CMOS SAR ADC achieving over 90dB SFDR,” Int. Solid‑State Circuits Conf. Digest of Technical Papers, Feb. 2010, pp. 380‑381.
