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1234 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 31, NO 6, NOVEMBEFUDECEMBER 1995

Space Vector Modulated Three-phase toThree-phase Matrix Converter withInput Power Factor CorrectionLBsz16 Huber, Member, IEEE, and D u 3 a n BorojeviC, Member , IEEE

Abstruct- Analysis, design, and implementation of the spacevector modulated three-phase to three-phase matrix converterwith input power factor correction are presented. The majorityof published research results on the matrix converter controlis given an overview, and the one, which employs s h e -ous output-voltage and input-current space vector modulation,is systematically reviewed. The modulation algorithm is theo-retically derived from the desired average transfer functions,using the indirect transfer function approach. The algorithm isverified through implementation of a 2-kVA experimental matrixconverter driving a standard induction motor as a load. Theswitching frequency is 20 kHz. The modulator is implementedwith a digital signal processor. The resultant output voltages andinput currents are sinusoidal, practically without low-frequencyharmonics. The input power factor is above 0.99 in the wholeoperating range.

I. INTRODUCTIONN MANY ac drive applications, it is desirable to use acompact voltage source converter to provide sinusoidaloutput voltages with varying amplitude and frequency, whiledrawing sinusoidal input currents with unity pow er factor fromthe ac source, and having high regulation bandwidth, fighefficiency, and noise above the audio range. In recent years,matrix converters (MCs) have become increasingly attractivefor these applications because they fulfill all the requirements,having the potential to replace the conventionally used recti-fier/dc linWinverter structures. Matrix converters are single-stage converters; they need no energy storage componentsexcept small ac filters for elimination of switching ripples. Ofgreatest practical interest are the MCs with three input andthree output phases (3 @-3 @) . he 3@-3@MC with an inputLC filter and an ac motor load is shown in Fig. 1.

Paper IPCSD 9540, approved by the Industrial Power Converter Com-mittee of the IEEE Industry Applications Society for presentation in part atthe 19 91 IEEE Industry Applications Society Annual Meeting, Dearbom, MI,September 28-October 4, in part at ,IECO N 92 - 18th Annual Conferenceo f IEEE Industrial Electronics, San Diego, CA, November 9-13, and in partat the 1993 IEEE Applied Power Electronics Conference and Exposition -APEC 93, San Diego, CA , March 7-12, with different titles. This work wassupported in part by the Virginia Center fo r Innovative Technology and theVirginia Power Electronics Center University-Industry Partnership Program.Manuscript released for publication May 12, 1995.L. Huber is with Delta Power Electronics Lab., Inc., Blacksburg, VA 24060USA.D. BorojeviC is with the Bradley Department of Electrical Engineering,Virginia Power Electronics Center, Virginia Polytechnic Institute and StateUniversity, Blacksburg, VA 24061 USA.IEEE Log Number 9414387.

The basic MC configuration with high-frequency (H F) con-trol was originally introduced in 1980 [l]. Since then, MCshave been subject of intensive research which mostly con-centrated on two aspects: implementation of the MC switchesand the MC control.The switches of the MC are four-quadrant switches(4QSWs). As 4QSWs are not available to date, they haveto be implemented either by anti-parallel connection of twovoltage-two-quadrant switch es (2Q SW s) or by anti-seriesconnection of two current-2QSW s [23]. Safe commutation of2QSWs cannot be achieved in only one step: A multi-steppedswitching procedure is recommended [5], [7], [23]. It requiresindependent control of each 2QSW, as well as detection ofthe load current or source voltage direction.In t is paper, most of the published research results onthe 3 @ 3 @ MC control [1]-[22] are given an overview. Onlya few of those provide for sinusoidal output voltages andsinusoidal input currents without low-frequency (LF) har-monics, with maximal voltage gain of &/2, and adjustableinput displacement factor (IDF). One of them, which usessimultaneous output-voltage and input-current space vectormodulation ( S W ) [lo], is systematically reviewed. A simplegeometric representation in complex plane of the m odulationprocess, used for the first time in [24], is given. The algorithmis verified through implem entation of an experimental MC [25]with the following characteristics:

maximum output power 2 kVA,9 output frequency range 0-167 Hz,switching frequency 20 Wz,* input r ms line voltage 3 x 208 V, 60 Hz, andinput power factor above 0.99.

11. M C CONTROLRINCIPLESThe simplified 3G-34,MC topology is shown in Fig. 2 .Since the MC is supplied by the voltage source, the inputphases must never be shorted, and due to the inductive natureof the load, the output phases must not be left open. If theswitching function of a sw itch, s 3 k in Fig. 2, is defined as

the constraints can be expressed as

0093-9994/95$04.00 0 995 IEEE

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HUBER AND BOROJEVIC: SPACE VECTOR MODULATED THREE-PHASE TO THREE-PHASE M ATRIX CONVERTER 1235

a c c - v C ~ 0 v,, i A - i A 1 0 0 0 0 1 0 0 1b C C V b c 0 -Vbc 0 i A i A 0 1 0 0 0 1 0 0 1b a a -Vat, 0 v a b - A i A 0 0 1 0 1 1 0 0'I-* c a a v c a o - v c a - 1 A o A o o 1 1 o o I o oC b b -Vbc 0 V b c 0 - A 1~ 0 0 0 1 0 0 1 0a b b V a t , 0 -V a b i A - 1 ~ 1 0 0 0 1 0 0 1 0c a c Vca - v C ~ 0 i g O - i g 0 0 1 1 0 0 0 0 1C b C v b c v b c 0 0 i e - i e 0 0 1 0 1 0 0 0 1a b a v a b v ab 0 - i g i g 0 1 0 0 0 1 0 1 0 0b a b v a b v a b 0 i g - i B 0 0 1 0 1 0 0 0 1 0a c a - vC a v c a o - i g o i B 1 o o o o 1 1 o ob C b V b c - V b c 0 O - i B i e 0 1 0 0 0 1 0 1 0c c a 0 v c a - v c a i c 0 - f c 0 1 0 0 1 1 0a a b 0 v ab v ab - i c i c 0 1 0 0 1 0 0 0 1 0'I-' a a c 0 . - v c a v c a - i c 0 i c 1 0 0 1 0 0 0 0 1b b c 0 v b c 'vbc 0 - i c i c 0 1 0 0 1 0 0 0 1b b a 0 'Vab v a b i c - i c 0 0 1 0 0 1 0 1 0 0a a a 0 0 0 0 0 0 1 0 0 1 0 0 1 0 0

I 1 1 b b b 0 0 0 0 0 0 0 1 0 0 1 0 0 1 0c c c 0 0 0 0 0 0 0 0 1 0 0 1 0 0 1

c c b 0 v bc v b c 0 i C - I C 0 0 1 0 0 1 0 1 0

Fig. 2. Simplified 3 @ - 3 @MC topology.

phase currents. The switching combinations can be classifiedinto three groups. The first group includes six combinationswhere each output phase is connected to a different inputphase. In the second group, there are 3 x 6 = 18 combinationswith only two output phases shorted. The third g roup includesthree combinations with all three output phases shorted.From Table I and Fig. 2 , the following expressions forthe output line voltages and inp ut phase cu rrents are directly

Fig. 1. 36-3T MC topologyWith these constraints, the 3@3@ MC switches from Fig. 1can assum e only 27 allowed com binations (see Table I). Thetable also shows which input and output phases are m utuallyconnected for each allowed sw itching combination, as well asthe resulting output line (phase-to-phase) voltages and inp ut

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1236 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS,VOL. 31, NO 6, NOVEMBEFUDECEMBER 1995

obtained:VOL =

and

where the superscript T denotes a transpose and the matrixT p h L is the instantaneous input-phase to output-line transferfunction matrix of the 3Q-34, MC. Alternatively, the outputphase voltages referenced to the input neutral and the inputphase currents can be expressed as

andt i = TF hph ioP h (6)i C

where the matrix T p h p h is the instantaneous input-phaseto output-phase matrix. In order to use the HF-synthesismethodology, the switching frequency must be much higherthan the frequencies of the input voltages and output currents,which are assumed to be continuous LF functions. Then, theHF components of the variables in (3)-(6) can be neglected.The low-frequency or local-averaged value of a switchingfunction silk is the duty cycle of the switch S 3 k , and it isdenoted as d 3 k . The LF equivale nts of (1)-(6) are

respectively, w here

are the LF input-phase to output-line and input-phase tooutput-phase transfer m atrices.

Let the input phase voltages be given by

if it is desired that the local-averaged output line voltages besinusoidal, i.e.

C O S ( W , ~- po+ 30 + 120 )

C O S ( W , ~- + 30 )C O S ( U , ~- po - 30 - 120 ) (16)C O S ( L J ~ ~ y o 4- 30 + 120 )

then with the LF input-phase to output-line transfer matrixchosen as

(17)cos(wzt -p z )

where 0 5 m 5 1 is the modulation index and pz s anarbitrary angle, (15)-(17) satisfy (9) with(18)

In this case, due to the inductive nature of the load, the outputline currents can be assumed sinusoidal, and hence given byV,, = v m . cos(p,).2

COS(^,^ - y o- p~ + 30")C O S ( W ~ ~p0 - p ~ 30 + 120 )cos(w,t - y o- pL+ 30" - 120')

where ( p L is the load displacement angle at the output fre-quency f,. If (17) and (19) are substituted into (lo), thelocal-averaged input phase currents are obtained as

wherefi4, = I,, .m C 0 S ( c p L )2

It follows from (18) that one can make a trade-off betweenthe modulation index, m, the voltage gain, Vo,/V,,, andthe input displacement angle, cpz, independently of the loaddisplacement angle. Unity input displacement factor is ob-tained for cpz = 0, which from (18), with m = 1, also resultsin the maximum voltage gain of 6 1 2 . Physi ca ll y, t he on lyrestriction is the equality of the input and ou tput active powers,because from (18) and (21) it follows that:

62 (22)- - .V , . I,, * COS(CpL) = Po.

By rewriting (16), (17), and (19) without nd 30"and writing m/2 instead of m in (17), equations forsynthesis of output phase voltages can be obtained. In

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HUBER AND BOROJEVIC: SPACE VECTOR MODULATED THREE-PHASE TO THREE-PHASE MATRIX CONVERTER

TABLE I1OVERVIEWF 3 @- 3 @ MC CONTROL LGORITHMS

INDIRECT TRANSFER FUNCTION APPROACHDiode-Bridge-Rectifia PWM-Inverter(IDF= 1)

Without compensation offull-wave-rectified nput-line-voltages ipp leSine-PWM with triangu-lar carrier in VSI [4]Modified Sine-PWM witltriangular carrier in V SI121, P I

With compensation offull-wave-rectified input-line-voltages Vdipple(A,, =&I21

Sine-PWM with amplitude-modu-lated triangular carrier in VSI 151VSI with Sine-PWM (orPWM witharmonic elimination)with dutycycle proportional o 1 [61(includes also adjustable IDF)VSI with space-vector-modulationwith duty cycle proportional o1 [71VSI with hysteresis cu rrent controll a 181VSI with predictive current controlla P I

PWM-R~t i f ie rSquareWave-InvVSRwithmodified Sine-PWM [21, E31

DIRECT TRANSFER FUNCTION APPROACH

PWM-Rectifier I PWM-Inverter(A,, =&I21Adjustable DF- Simultaneous output-voltageandinput-current space-vector-modulation [101IDF= 1- Modified Sine-PWM in bothVSR and VSI 121, [3]- Hysteresis curren t controller inboth VSR and VSI E111 VSR with six -step PWM and VSIwith ramp-comparison currentcontroller [12]

Synthesisof output phase-voltages I Synthesis of outpu t line-voltagesOutput neutralconnectedto input neutral

(A,,, = 0 . 3RestrictedIDF(IDF < ODF) [l]

Output neutral modulatedwith respect to inpu t neutral(A.,,, = 1 2)

Adjustable IDP- Injection of input and ou tput 3rdharmonics [131, [141, [151, [161Six-step PWM with extension tounity duty-cycle [181

I D F = 1(Injectionof input and output 3rdharmonics) C171

Six-stepPWM using two input line-voltages(A,, = / 2 , IDF= 1) 19]Six-stepPWM using three input line-voltagesUnrestricted frequency chang ers (UFC [20]) with PWM(A,, = 3 / 4 , ID F= 1) 19]](A.,,, < 2 , IDF=f ODF, LF harmonics)- Uniform PWM with triangular carrier [21,[31

Sine-PWM with triangular carrier [21]Clipped-Sine-PWM with triangular ca rr ia [21]- PWM with selectiveharmonic elimination [22]

1237

this case, the maximal voltage gain is 314. Obviously, thewhole procedure from this section Can be repeated startingfrom the input line voltages.To make final a 3 @ 3 @ MC control algorithm using theHF-synthesis methodology, two additional steps are needed.

A. Indirect Transfer Function ApproachEquation (17) presents an indirect transfer function (ITF)

approach. The transfer matrix is equal to the product of twomatricesFirst, the switch duty cycles, d 7 k , which implement a desired T P h L = T V s I ( u o ) TTSR(wz) . (23)LF transfer matrix (e.g., (17)) and satisfy (7) and (8), have tobe determined. Second, the position of the switching pulseswithin the switching cycle has to be defined.

By multiplication of the matrix T $ S R ( ~ , )ith the inputvoltage v e c t o r 15), a constant voltage is obtained111. OVERVIEW OF 3@-3@M C CONTROL ALGORITHMS

An overview of the published 3@-3@MC control algorithmsis presented in Table 11. For the MC control, indirect and directtransfer function approaches [2], [3] can be distinguished.This is equivalent to the operation of a voltage so urce rectifier(VSR). By multiplying the voltage (24) with the matrixTvs~(u,), he operation of a voltage source inverter (VSI)

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1238 LEEE TRANSACTIONSON INDUSTRY APPLICATIONS, VOL. 31, NO. 6, NOVEMBERDECEMBER 1995

Fig. 3 . Emulation of VSR-VSI conversion

is performed. Therefore, the ITF approach emulates a VSR-VSI con version, as shown in Fig. 3.It follows fromFig. 3thatat any instant the 3@ -3@MC reduces to one of the six possibleVSI subtopologies with V p n E { V a b , U&, V c a , v b a , V c b , V a c } .It can be easily verified that for each allowed switchingcombination in Fig. 3, there is only one switching combinationin Table 1 hat results in the same output voltages and inputcurrents. This correspondence includes all combinations fromthe second and third group s in Table I, and none from the firstgroup. The ITF approach enables application of well-knownstandard VSI and VSR PWM techniques for MC control. Inthe case of output line-voltage synthesis, the maximal VSIvoltage gain is equal to unity, and hence from (24) the maximalMC gain is &/2. When sinusoidal output phase voltages aresynthesized, the max imal phase voltage amplitude is one halfof the dc link voltage, and from (24) the maximal MC gain is314. In this ca se, the outpu t neutral point voltage is equa l to thedc link midpoint voltage which varies as (V,,/4) .cos(3w,t)with respect: to the input neutral.The ITF control algorithms are distinguished accordingto the place where PWM is used [2], [ 3 ] . En the Diode-Bridge-Rectifier/PWM-Invertergroup, the input characteris-tics resemble the diode bridge characteristics (only in [ 6 ] , heIDF is adjustable). As a result, the rectified input voltage, vp,,contains the 6 f , ripple. If this ripple is not compensated, theoutput voltages contain harmonics at 6f, fo. With ripplecompensation, sinusoidal output line-voltages can be obtainedwithout LF harmonics and with maximal voltage gain ofa / 2 . In the group PWM-Rectifier/Square-Wave-Inverteronly the modified-sine PWM is analyzed in [2] and [3] asan example within the ITF classification. It was shown thatthe w eak spectral characteristics of the square-wave inverteralso appear in the MC output Sinusoidal output voltageswith maximal voltage gain of 4 1 2 and sinusoidal inputcurrents, both without LF harmonics, can be obtained only byemploying PWM in both VSR and VSI. Control algorithms[2], 3 ] , [ll], and [12] are llmited to unity IDF. Only thesimultaneous output-voltage and input-current space-vector-modulation [ lo] , presented in this paper, yields adjustable IDF.B. Direct Transfer Function Approach

By multiplication of the VSI and VSR transfer matrices in(17), a single matrix is obtained wh ose elements are sinusoidalfunctions of (wo w,) . t . This leads to the direct transferfunction (DTF) approach. When synthesizing sinusoidal output

phase voltages with respect to the input neutral, the maximalvolltage gain is inheren tly limited to 0.5 (with adjustable IDF,although in [l], t was restricted). The gain can be increasedto 3/4 by injecting the third harmonic of the input frequency,(~ ,/4 )-c os (3 w 2t) , into the desired output phase voltages, andit can be fwrther increased to /2 by additional injection ofthe third harmonic of the o utput frequency, (Vo /6 ) .os(3w0t)[14], [26]. However, this is related to significant amount ofadditional calculations, which is the principal drawback ofthe DTE approach with sy nthesis of output phase voltages: Itsynthesizes complex, nonsinusoidal output phase voltages andthen uses the o utput line voltages which are sinusoidal, insteadof directly synthesizing the ou tput line voltages. When startingfrom the input line voltages, by using all three of them in eachswitching cycle, the maximal voltage gain is limited to 3/4[19]. In order to achieve the maximal voltage gain of & /2 ,~ d ywo input line voltages should be used in a switchingcycle [19], which is also true for the ITF. However, unlikethe I TF, he DTF control algorithms employ the switchingcombinations from all three groups in T able I, which mak esthe essential difference between the two.

For the sake of co mpleteness, one should mention a specialgroup of DTF control methods, called unrestricted frequencychangers (UFC), which employ the switching combinationsonly from the first and third g roups in Table I. The LF transferfunction of PWM UFC s con taips sinusoidal functions eitherof (wo +w,) . t or of (wo - U,) . t , but not both, unlike thenormal DTF. As a result, LF harmonics exist in both outputvoltage and input current spectra, and the ID F is restricted tothe positive or negative value of the output displacement factor(ODF). Therefore, the UFCs are inferior to other controlmethods.

Possibly the most satisfactory DT F control algorithm is thesix-step P W rom [191, which also enables compensationof asymmetrical and distorted input voltages, but the IDF islimited to un ty. With Sa-balanced input voltages, [191 yieldsthe same expressions for the duty cycles as the ITF controlalgorithm [lo] with ( pz = 0. However, [lo] and [19] differ inthe d istribution of the sw itching intervals within a sw itchingcycle. The control algorithms [101 and [191seem to be superiorto other control methods. The algorithm introduced in [lo] issystematically reviewed below.

IV. SPACEVECTORMODULATIONin this section, based on the ITF approach, the spacevector modulation is simultaneously employed in both VSRand VSI parts of the MC. First, the VSI-SVM and VSR-

SVM procedures are reviewed, and the respective L F transferfunctions are derived. Then, the three steps of the HF-synthesisof the simultaneous output-voltage and input-current SVM forcontrol of the 3@-3@MC are performed. Finally, a simplegeometric representation in co mplex plane of the mo dulationprocess is given.A . VSI Output Voltage SVM

Consider the VSI part of the circuit in Fig. 3as a stand-alone VSI supplied by a dc voltage source, vpn = V d c . The

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HUBER AND BOROJEVIC: SPAC E VECTOR MODULATED THREE-PHASE TO THREE-PHASE MATRIX CONVERTER 1239

Fig. 5 . VSI SVM vector addition.

VSI switches can assume only six allowed combinations whichyield nonzero output voltages, and two combinations with zerooutput voltages. Hence, the resulting output line-voltage spacevector defined by

can assume only seven discrete values, Vo - Vs in Fig. 4,called voltage switching state vectors (SSV's).The space vector of the desired output line voltages (16)VoL= fi., . e 3 ( w o t - + 3 0 ) (26)

can be approximated by two adjacent SSV's, V, and Vp, ndthe zero voltage vector, VO, sing PWM as shown in Fig. 5 ,where V o ~s the sampled value of V,L at an instant withinthe switching cycle T,. Using the law of sines, the duty cyclesof the SSV's are

d, = T,/Ts = mu . sin(60' - ,,),d p = Tp/Ts = mu . sin(O,,),

dou = T o , / T s = 1- , - p 27)where m, is the VSI modulation index

o Imu = (d3.om)/Vdc L I. ( 2 8 )The sectors of the VSI hexagon in Fig. 4 correspond directly

. . . .

-180 -120 -90 -30 30 90 150 18w0t-cpO+30 O ]

Fig. 6. Output line voltage 60'-segments.

"CA t

Fig. 7. Synthesis of VSI output line voltages.

output line voltages shown in Fig. 6. The synthesis of theoutput line voltages for a switching cycle within the first60 -segment is shown in Fig. 7, as an example. The local-averaged output line voltages areGAB d, + d p[5:][ 1 ] . v d c

- in(O,,)For the first 60 -segment

-30 5 w,t - po+ 30 5 +30' andB = (w,t - p0+ 30') + 30 . (30)

By substitution of (30) in (29)

(31)The matrix Tvs~ ,efined in (31), is the L F transfer matrix ofthe VSI. Substituting the mod ulation index from ( 2 8 ) in (31),

O S ( U , ~- + 30 )C O S L J , ~- 9,+ 30' - 120')C O S ( U , t - p + 30 + 120')- mu . . V d ,- [

= TvsI vdc.

to the six 60 -segments within a period of the desired 3 @ the desired output line voltages (16) are obtained.

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1240 IEEE TRANSACTIONS O N IN USTRY APPLICATIONS, OL. 31 NO 6, NOVEMBER'DECEMBER 1995

The V SI local-averaged input current is determined as-i = TCSI i,L I,, .m, . cOs(cpL)= const. (32)

B. VSR Input Current SVMConsider the VSR part of the circuit in Fig. 3 as a stand-alone VSR loaded by a dc current generator, i, = Id,. TheVSK input-current SVM is completely analogous to the VSIoutput-voltage SVM. The VSI subscripts Q, /3, and SU arereplaced with the VSR subscripts p , U nd sc, respectively.The VSR hexagon is shown in Fig. 8.The VSK duty cycles are

d, = T,/Ts = m, . sin(60 - s, .d, = T,/T, = m, .sin(@,,),

do, = Toc/Ts= 1- d, - d,

0 5 m, = Itm/Idc 5 1.

(33)where m, is the VSR modulation index

(341Examples of the local-averaged input phase currents, for aswitching cycle within the first sector of the VSR hexagon,are

C O S O , ~ - 30 )- in(@,,)

By substitution ofOs, w t t - yZ)+ 30 , -30 5 w,t- pZ 5 +30 (36)for the first sector in (35 ) , the LF transfer matrix of the VSR ,TVSR,s defined as

(37)Replacing the modulation index from (34) in (37), the de-sired input phase currents (20) are obtained. The VSR local-averaged output voltage is determined as

cos(w,t- Pz)cos(w, t - p, - 120 ) .Idc= TV sR . d , .cos(w,t - 9 120 )

- Tu p n TVs, VzPh32

(38)- - m, . V,, . cos(p,) = cons t .C. M C Output-Voltage and Input-Current SVM

As the local-averaged output voltage of the SVM VSR , (38),and the local-averaged input current of the SVM VSI, (32), areconstant, from the local-averaged point of view the SVM VSRand the SV M VS I can be directly connected. Substitutingfrom (38) for v d c in (31) and using TVSRrom (37 , t hesame expression for the LF transfer matrix of the 3@-34,M Cis obtained as (17) with m = m, m,. For simplicity, it isconvenient to choose m, = 1 and m = m . This completesthe first step of the H F-synthesis procedure.

.-Re

IO a d or b,b) or c,c)Fig. 8. VSR hexagon.

In the second step of the HF-synthesis procedure, themodulation algorithm is derived from the LF transfer matrix(17) in the same way as for the SVM VSI, (29)-(31), andSVM VSR , (35)-(37), only in the opposite direction. Sinceboth the VS I and the VS R hex agons contain six sectors, thereare 6 x 6 = 36 combinations or operating modes. If at aparticular instant, the first outpu t-voltage 60O-segment and thefirst input-current 60O-segment are active, then by using (30)and (36), the LF transfer matrix (17) becomes

TC O S O ~ , - 30") COS(@,, - 30')

(39)Substituting (27) and (33) in (39), with m = mu . m,, thelocal-averaged output line-voltages from (9) are

using(41)v a b = V,O - 160 and U,, = W O - v,o

it is finally obtainedAB d,, +4 de, + dp,[E [ 1;; ' J a b+ [ 1;; ] . v u e 42)

whered,, = d, . d, = m . sin(60 - S u ) . sin(60' - s,dp, = dp . d, = m . sin(O,,) .sin(60 - ,,) = Tp,/T,,d,, = d , . d, =m . sin(60 - S,) .sin(@,,) = T,,/Ts,dp, = dp .d, = m . sin(O,,) . sin(O,,) = Tp,/T,.

= T a p TS,

(43)As can be seen, the output line voltages are synthesized insideeach sw itching cycle from samples of two input line voltages,Jab and U,, for the above example. By comparison of (42) and

(29), it can be concluded that simultaneous output-voltage andinput-current SVM can be obtained by employing the standard

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TABLE 111SWITCHINGEQUENCEXAMPLES w i t c h i n g o u t put InputSSV C o m b i n a t i o n ON L i n e V o l t ag e P h as e C ur re nt S w i t c h S t a t e s

T i m eP a i r p n A B c V A B V B C V C A i a i b i c S A a S A b S A c S B a S B b S B c S C a sC b S

1 1 -V6 a c a c c d p v - T s V a c 0 -v a c i~ 0 - iA 1 0 0 0 0 1 0 0I l - V l a c a c a d a , - T s v a c - v a c 0 - i ~ iB 1 0 0 0 0 1 1 0I o - V o a a a a a d0-T. 0 0 0 0 0 0 1 0 0 1 0 0 I O

paper, the switching sequence d,, -+dp, + dp, + d,, --ido is used, and the optimum zero SSV is chosen for each ofthe 36 operating modes.The synthesis of the output line voltage V A B waveform forcpz = 0' and cpz = 30 is illustrated in Fig. 9. The waveformsof the other two output line voltages, with opposite sign, arealso shown in the figure.The input phase currents, for the above example, are syn-thesized according to the following:

- ap::4 - Tci5 - To ] [ ' ( - i B > + ['ii,]i A

+ [ ] i A + [ d; ] ( - i B ) . (45)-+U - UFig, 9. Synthesis of 3 @ -3 @ M C output ]]ne voltages for (a) p = 0 and A Particular set Of five switching combinations is(b) y t = 30'. depending on the actual operating mode. By simultaneousobservation of the desired LF vo ltage vector in the MC inverterVSI SVM sequentially in two VSI-subtopologies of the 3@-3@ MC. When the standard VSI SVM is applied in the firstVSI-subtopology, where vpn = nab, the duty cycles of the twoadjacent voltage SSV's are d,, and dp,, as defined in (43).The standard VSI SVM in the second VSI-subtopology, withvpn = vac , esults in the SSV duty cycles d,, and dp,, also de-fined in (43). During the remaining part of the switching cycle

do = 1- d,, - dp, - d,, - dp , To/T, (44)the output line voltages are equal to zero, by employing azero SSV. It is easily verified that with (38), the conditions(7) and (8) are also satisfied. The duty cycle expressions (43)remain the same for all operating modes. This completes thesecond step of the H F-synthesis procedure.

In the third step, a switching sequence within one switchingcycle is defined. This requires decisions on which of the threeswitching combinations from Group I11 in Table I is used forthe zero SSV, and on how the five switching combinationsare ordered within the switching cycle. Among the possiblecombinations, those which require switches to change stateonly once during a switching cycle should be used. In this

hexagon, and the desired LF current vector in the MC rectifierhexagon (see Fig. IO), the MC SVM procedure can be easilyfollowed. Note that the desired LF current vector magnitude(21) is equal to the local-averaged input current of the fictitiousVSI, (3 2 ) , because m = m,.For example, if at an instant V,L is in the first sectorof the MC inverter hexagon, the actual voltage SSV's areV, = Vg and Vp = VI; nd if i z p h is in the first sector of theMC rectifier hexagon, the actual current SSV's are I, = I6and I, = 11. Voltage-current SSV pairs are applied in thefollowing sequence: I6 - Vg, 1 6 - VI , I1 - VI, 11- VS,and Io- VO. o each voltage-current SS V pair corresponds aswitching combination with the on-time determined by (43), asshown in Table 111.For example, while applying 16, it followsfrom Fig. 10(a) that p = a and n = b. With simultaneousapplication of v6 from Fig. 10(b), A = p , B = n, and C = p .Therefore, the voltage-current SSV pair 16 - V6 is realizedwith the switching combination A = a, = b, and C = a,which is kept ON for the time interval d,, .T,. On-times ofthe individual MC switches can be determined from Table 111.The table also shows the resulting output line-voltages andinput phase-currents.

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1242 EE E TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 31, NO 6, NOVEMBERBECEMBER 1995

--cRe

R e

V5 nm )(b)

"CA

Fig. 10. 3 3@ MC: (a) rectifier hexagon and (b) inverter hexagon.

V. MODULATORMPLEMENTATIONThe space vector modulator for control of the 3 @ - 3 @MChas to perform the following tasks:

synchronization with input phase voltages,generation of phase angle of desired input phase cur-rents,generation of phase angle of d esired output line voltages,calculation of switching times (43),conversion of switching times data to switching pulses,anddistribution of switching pulses to 4QSW's.

The mod ulation algorithm can be most efficiently implementedusing a digital processing system.Due to the nature of the SVM, all phase angles are repre-sented with two variables: the code of the 60 -segment, s , andthe angle from the beginning of the 60-segment, 6The block diagram of the modulator is shown in Fig. 11.Through the three-phase step-down transformer, the inputsupply voltages are interfaced with the comparators, whichgenerate the code of the input phase voltage 60O-segment( s W z ) . he tasks b) through e) are implemented within thedigital signal processor (DSP ) block. The DSP block has threeinput signals: svz, he input displacement angle cpz, and theoutput voltage command. In general, cp, may be adjusted on-line by a closed-loop control system in o rder to compensate thephase shift caused by the input filter. In this w ork, cpz is givenas independent input data. The three-phase output voltagecommand is normally provided by an external controller as

INPUT 3-PHASE 3-PHASEVOLTAGE INPUT

PROTPROTECTION

Uo V T [ ~ ~ ~ ~ . ~ EROM OVER-CURRENT

Fig. 1 1 . Modulator block diagram.

a two-dimensional vector, e.g., instantaneous amplitude andphase (or frequency). In this work, a simple open-loop, V / f=constant type of induction motor controller was implementedwithin the DSP itself. It receives the motor speed command asindependent input data and provides the normalized amplitude(rnodulation index), m, and the output frequency, f o , as theoutput voltage command to the modulation process. The outputsignals of the DSP block are: the PWM pulses, the operatingmode code, and the clock signal for the switch sequencers.Finally, the decoder implements task f).

Input Voltage Comparators: The input voltage compara-tors operate as sign detectors. The outputs of the compara-tors directly represent the code of the input phase voltage60 -segment, s,, . Standard integrated comparators are used.Digital Signal Processor (DSP): In the development phasea commercial, personal-computer based, DSP developmentsystem [27]--containing a TMS320E 14 processor, four A/Dconverters, RAM, nd addition al circuitry-was used. TheTMS320Ef4 unit [2X] has a 16 x 16-b hardware multiplierantd six built-in PWM generators. All the tasks b) through e),as well as the motor controller, are implemented in softwareby using the assembly language.The successive functional units of the DSP software are:

F1 initialize;F2 read phase angle 9 ;.F3F4F 5F6F 7F 8F9F10 generate phase angle of desired input phase currents:F11 calculate sin(B,,), sin(60 - Bsc ) ;F12 calculate switching times

wait for timer interrupt;read motor speed command from AD;implement V / f = constant control;generate phase angle of desired output line voltages:calculate sin(B,,), sin(60 - O s u ;multiply m . sin(@,,), m . sin(60" - Os)input s from input voltage comparators;svo, o m ;

s a , Os&

T = T mT2 = TcY Lt p p ,T = Tap+ T p , t pv,T = Tapt pjL + T p v + T a u ; (46)

F13 output s c r , s to decoder;

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HUBER AND BOROJEVIC: SPACE VECTOR MODULATED THREE-PHASE TO THREE-PHASE MATRIX CONVERTER 1243

(a) (b)Fig. 12. Flowchart of desired (a) output line voltage and (b) input phasecurrent angle generation.

F14 output TI through T4 and T, to PWM generators; andF15 jump to F3.The software is implemented as a single interrupt service rou-tine, driven by the timer associated with the PWM generators.The period of the PWM generators is equal to the desiredswitching period, T5 = 50 ps. The duration of the programloop is about 35 ps. In the following, some details of themodulator software are described.The desired output line voltage phase angle e is coded as

sv = . 3 +ae,,; k = 0, 1, . . 19,AOs, = mod(O,,, 3 ). (47)

The flowchart of the modulator software unit F6 is shownin Fig . 12(a ). Calculation of sinusoid al functions ( F 7 ) isachieved by using a look-up table with 3" resolution and bylinear interpolation between the table entries.The phase angle of the input phase voltages and the inputdisplacement angle are coded asB s = j AOsz, j = 1 , 2 , . . 56. (48)

andcpZ = p . AB,,, p 10, $1,. . . ,zt55 (49)

respectively, where AOsz = 360' . f . T, = 1.08'. Theflowchart of the modulator software unit F10 is shown inFig. 12(b). The sinusoidal functions 8 11 are obtained by usinglook-up tables, without interpolation.Decoder: The switching pulses corresponding to theswitching intervals Tap, op,Tovl,,, and To are generatedfrom the PWM pulses synthesized by the DSP, using basiclogic operations. These pulses are distributed to the appropriate

TO MODULATOR INPUTFILTERROTc

OVER-VOLTAGEVER-CURRENT

CURRENT DIRECTIONDETECTOR C

DETECTOR BCURRENT DIRECTION

h A- B- C

m o

FROM MODULATOR

Fig. 13. 3 @ 3 @ MC block diagram.

4QSW's, depending on the operating mode code. The signalPROT in Fig. 11 represents the overcurrent protection bit.The decoder is implemented with one EP910 erasable PLDchip [29].

VI. MATRIXCONVERTERThe block diagram of the 3@-3@ atrix converter is show nin Fig. 13.Each block is d escribed below.Four-Quadrant Switches: The 4QSW's of the 2-kVA HF

matrix converter are realized with two anti-parallel voltage-2QSW 's which are implemented by series connection of theBUK437 power MOSFET (600 V, 9 A) and the BYR29fast recovery diode, as shown in Fig. 1.Across the inputconnections of every three 4QSW's connected to the sameoutput phase, three 82-nF metallized polypropylene film HFcapacitors are connected in delta in order to eliminate thewiring inductance influence.Gate Drives: Each of the 18 2QSW's has its own gatedrive circuit, shown in Fig. 14. The control pulses from aswitch sequencer are transmitted through a high-speed opto-coupler. An integrated M OSFET -gate-drive circuit am plifiesthe opto-coupler signal to the appropriate level. The opto-coupler and the 4429 circuit are supplied by on-board linear

voltage regulators. Only six isolated dc voltages are needed tosupply the 18 gate drives, as three 2QSW 's are connected tothe same output or input phase. The common mode chokes,L1 and L2 , proved essential for the proper circuit operation.Switch Sequencers: As the MC does not contain free-wheeling diodes, whlch norm ally accomplish safe commuta-tion of the converter switches, the effect of the free-wheelingdiodes has to be achieved by using the existing switches.For safe control of the 4QSWs, a multi-stepped switchingprocedure [ 5 ] [7], [23] is used, which requires independentcontrol of each 2QS W, as well as detection of the load current

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1244 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS,VOL. 31, NO. 6, NOVEMBEm ECEMBER 1995

t Li

Fig. 14. Gate drive circuit schematic.

direction, but it op erates without additional snubber circuits.The safe commutation algorithm encompasses three 4QSW'sconnected to the same output phase, and it is implementedwithin the three sw itch sequencers. Three EP610 erasable PLDchips [29] are used, one for each output phase. Each switchsequencer has four inputs: Two represent the code of a switchwhich has to be turned on, as requested by the modulator; oneis the clock signal from the modulator ( f c ~ ~6.25MHz);the last one is the current direction bit from the currentdirection detector. The current-sign validity bit, proposed in[7] is not used, because in this case experimentally it wasfound unnecessary.Current Direction Detectors: Through-hole type Hall cur-rent sensors (100 A) are used with ten turns. The sensitivityof the sensors was selected so that they can provide signalswhich could be also used in a more com plex closed-loop motorcontrol algorithm. The current d irection signal is obtained withstandard voltage comparators.

Overvoltage Protection: A three-phase full-bridge dioderectifier with a clamp -capacitor is connected across the outputphases. It acts as a voltage clamp for possible voltage spikes atthe outpu t lines. A small resistor between the diode-bridge andthe capacitor provides critical damping to the circuit comprisedby the clamp capacitor and the wiring inductance, and limitsthe maximum clamping current. A resistor in parallel with thecapacitor acts as bleeding elemen t for the clamp capacitor.Overcurrent Protection: Connection type Hall current sen-sors (20 A) are used. Two three-phase half-bridge dioderectifiers produce dc voltages proportional to the instanta-neously most positive and most negative three-phase inputcurrents. Positive and negative overcurrents are detected withtwo standard comparators. To make the overcurrent protection

circuit insensitive to very short overcurrent spikes, a delaycircuit and a third comparator are added. The overcurrent isregistered by a flip-flop, wh ich causes the mod ulator to shutdown the matrix converter by forcing it into zero input currentand zero output voltage state, until resetting.Znput Filter: A 3 @ single-stage LC filter is used. It co nsistsof three 5- pF (400 Vdc) m etallized polypropylene capacitorsin star-connection, and three 5-mH inductors.As in any buck-type converter, the input currents are discontinues, so thathigh-quality capacitors with low ES R and high current ratingare required.

2 ms/div 2 ms/dlvFig. 15 Experimental waveforms with unloaded dc generator ( fo = 80 Hz)(a) nput phase voltage SO V/div), (b) filtered input phase current (1 Aldiv),(cl output line voltage (200 V/div); and (d) output phase current ( 5 A/div).

The matrix converter output is fed to a standard3 x 208 V/11 A (60 Hz) squirrel-cage 3-hp inductionmotor, which is mechanically coupled to a low-inertiapermanent magnet dc generator used for loading.VII. EXPERIMENTALESULTS

The experimen tal steady-state waveforms with un loaded dcgenerator are shown in Fig. 15. The input and output phasecurrents are mostly sinusoidal. Without the input displacementfactor correction c p , = O O ) , the filtered input phase currentleads the input p hase v oltage due to the capacitive nature ofthe input filter at 60 Hz. The phase angle between the firsthamonics of the input phase current and input phase voltageis 1 6 O , the total harmonic distortion of the input phase currentis THD, = 8.5%,and the input power factor is PF, = 0.958.The input displacement factor can be corrected by introducinga ]phase lag cpz = 16" at the modu lator input, which results inTHD, = 10.5% and PF, = 0.995.The experimental waveforms for 75% load are shown inFig. 16. The input and ou tput phase currents are again mostlysinusoidal, and the input phase current is practically in phasewith the input phase voltage. The input power factor is PF, =0.997. In general, when the load is above 50% , the capacitivecomponent of the input filter current is negligible comparedto the total input current so that the input displacement factorcorrection is not necessary, i.e., cp = 0" can be used.

Hence, if the input current phase shift cp is adjustedaccording to the load level, input power factor PF, > 0.99is achieved in the whole operating range.The measured efficiency is between 90 and 93% in theload range 50-100%. The power density of the experimentalprototype is 8.5 kVA/ft3 including input filter.VIII. CONCLUSION

In this paper, control and design of the 3 @ - 3 @MC aredescribed. The 3 @ - 3 @ MC output-voltage and input-currentSVM algorithm is systematically reviewed. A simple geomet-

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HUBER AND BOROJEVIC: SPACE VECTOR MODULATED THREE-PHASE TO TI

( a )( b )

2 ms/dlvFig. 16. Experimental waveforms with 75% load: (a) input phase voltage(100 V/div); (b) filtered input phase current (2.5 A /div); and (c) output phasecurrent (5 A/div).

ric presentation in complex plane of the 3@-3@MC SVMprocedure is given. This schematic approach enables clearcomprehension of the modulation algorithm. Implementationof a compact, high-performance, high-frequency 3@3@ MCfor ac drive applications is presented. The MC switches arerealized with power MOSFETs and fast recovery diodes.For safe control of the MC switches, a multi-stepped switch-ing procedure is used, which does not require any snubbercircuits. The space vector modulator is implemented usinga commercial, personal-computer based, DSP developmentsystem. However, the modulator could be implemented usingno more than three integrated circuits: a data acquisitioncircuit, a DSP, and a PLD for implementation of the decoder.Since the duration of the active program loop is about 35 pswithin a sampling period of 50 ps, additional protection anddiagnostics can be bu ilt in. A closed-loop input-displacement-factor correction can be easily achieved by adjusting theinput current phase shift according to the load level. Theexperimental output voltages and input currents, obtained withbalanced and undistorted input source voltages, are sinusoidal,practically without LF harmonics. Maximal voltage gain of

/2 is achieved, and the input power factor is above 0.99in the whole operating range.Further work can include:investigation of the MC operation with unbalanced and/or

9 investigation of transient behavior, andinvestigation of parallel operation of several MCs fornonsinusoidal input voltages,

higher power applications.ACKNOWLEDGMENT

The authors would like to thank Prof. X . F. Zhuang forbuilding the experimental matrix converter, and Dr. F. C.Lee, without whose support this work would never have beencompleted.

3REE-PHASE MATRIX CONVERTER

REFERENCES1245

[1] M. Venturini and A. Alesina, The generalized transformer: A newbidirectional, sinusoidal waveform frequency converte r with continu-ously adjustable input power factor, in Conf Rec. IEEE PESC80, pp.242-252.[2] P. D. Ziogas, S. I. Khan and M. H. Rashid, Some improved forcedcommutated cycloconverter structures, IEEE Trans. Ind. Applicat., vol.IA-21, no. 5, pp. 1242-1253, SeptJOct. 1985.[3] __ , Analysis and design of forced commutated cycloconverterstructures with improved transfer characteristics, IEEE Trans. Ind.Electron., vol. IE-33, no. 3, pp. 271-280, Aug. 1986.[4] J. Rodriguez, A new control technique for ac-ac converters, in Proc.IFAC Control in Power Electronics and Electrical Drives 1983, pp.203-208.[5] J. Oyama, T. Higuchi, E. Yamada, T. Koga and T. Lipo, Newcontrol strategy for matrix converter, in Con Rec. IEEE PESC89,pp. 360-367.[6] Y. Kim and M. Ehsani, Control of forced-commutated direct frequencychangers, in Con$ Rec. IEEE Ind. Applicat. Soc. Annu. Meeting, 1990,

[7] L. H uber, D. BorojeviC, and N. B urany, Analysis, design and im-plementation of the space-vector modulator for forced-commutatedcycloconverters, IEE Proc.-B, vol. 1 39, no. 2, pp. 103-113, Mar. 1992.[8] A. R. Daniels and D. T. Slattery, Application of power transistors topolyphase regenerative power converters, Proc. IEE, vol. 125, no. 7,pp. 643-647, July 1978.[9] E. P. Wiechmann, J. R. Espinoza, L. D. Salazar and J. R. Rodriguez,A direct frequency converter controlled by space vector, in Con$ Rec.IEEE Ind. Applicat. Soc. Annu. Meeting, 1993, pp. 314-320.[ lo ] L. Huber and D. BorojeviC, Space vector modulation with unity inputpower factor for forced commutated cycloconverters, in Con$ Rec.IEEE Ind. Applicat. Soc. Annu. M eeting, 1991, Part I, pp. 1032-1041.[ 1 I] G. Kastner and J. Rodriguez, A forced commutated cycloconverterwith control of the source and load currents, in Proc. EPE85, pp.1.141-1.146.[12] C. L. Neft and C. D. Schauder. Theory and design of a 30-HP matrixconverter, IEEE Trans. Ind. Applicat., vol. 28, no. 3, pp. 546-551,May/June 1992.[13] A. Alesina and M. Venturini, Analysis and design of optimum-amplitude nine-switch direct ac-ac converters, IEEE Trans. PowerElectron., vol. 4, no. 1 pp. 101-112, Jan. 1989.[14] D. G. Holmes and T. A. Lipo, Implementation of a controlled rectifierusing ac-ac matrix converter theory, IEEE Trans. Power Electron., vol.7, no. 1, pp. 240-250, Jan. 1992.[151 D. G. Holmes, The general relationship between regular-sampledpulse-width-modulation and space vector modulation for hard switchedconverters, in Co nf Rec. IEEE Ind. Applicat. Soc. Annu. Meetin g, 1992,

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pp. 1002-1009.[16] G. Roy and G.-E. April, Direct frequency changer operation under anew scalar control algorithm, IEEE Trans. Powe r Electron., vol. 6, no.1, pp. 100-107, Jan. 1991.1171 P. Tenti, L. Malesani, and L. Rossetto, Optimum control of N-inputK-output matrix converters, IEEE Trans. Power Electron., vol. 7, no.4, pp. 707-713, O ct. 1992.[18] A. Ishiguro, K. Inagaki, M. Ishida, S. Okuma, Y. Uchikawa, and K.Iwata, A new method of PWM control for forced commutated cyclo-converters using microprocessors, in Con$ Rec. IEEE Ind. Applicat.Soc. Annu. Meeting, 1988, pp. 712-721.1191 A . Ishiguro, T. Furuhashi, an d S. Okuma, A novel control method forforced commutated cycloconverters using instantaneous values of inputline-to-line voltages, IEEE Trans. Ind. Electron., vol. 38, no. 3, pp.166-172, June 1991.[20] L. Gyugyi and B. R. Pelly, Static Power Frequency Chargers: Theory,Performance, and Application.[21] S. Yuvarajan and A. Khoei, An improved direc t ac-ac converter and itsapplication to three phase induction motor drive, in Conf Rec. IEEEInd. Applicat. Soc. Annu. Meeting, 1988, pp. 961-964.[22] D. H. Shin and G. H. Cho, Improved PWM method of forced com-mutated cycloconverters, IEE Proc.-B, vol. 136, no. 3, pp. 121-126,May 1989.1231 N. Bu riny, Safe control of four-qua drant switches, in Con$ Rec. IEEEIAS91, Part I, pp. 1190-1194.[24] L. Huber and D. BorojeviC, Digital modulator for forced com mutatedcycloconverters with input pow er factor correction, in Con$ Proc. IEEE[25] L. Huber, D. BorojeviC, X . F. Zhuang, and F. C. Lee, Design andimplementation of a three-phase to three-phase matrix converter with

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input power factor correction, in Con$ Proc. IEEE APEC93, pp.860-865.J. A. Houldsworth and D. A. Grant, The use of harmonic distortionto increase the output voltage of a three-phase PWM inverter, IEEETrans. Ind. Applicat., vol. IA-20, no. 5, pp. 1 2241 228 , SeptJOct . 1984.dSPACE GmbH , DSP-CITpro Hardware, Paderbom, Germany, 1990.TMS32OCI4/TMS32OE14 sers Guide, Texas Instruments Incorpo-rated, Dallas, TX, 1988.A+PLUS Users and Reference Guide, Altera Corp., San Jose, CA, 1987.

L6szl6 Huber (M86) received the B S degreefrom the Umversity of Novi Sad, Yugoslama, theM S degree from the Umversity of NiS, and thePh D degree from the Umversity of Novi Sad, in1977, 1983, and 1992, respectively, in electncalengineenngFrom 1977 to 1992, he was an Instructor at theInstitute for Power and Electromcs, Umversity ofNom Sad In 1992, he joined the Virgima PowerElectronics Center, Virgima Polytechnic Instand State University, Blacksburg, as a visitlng pro-fessor From 1993 to 1994, he was employed as a research scienbst at theVirginia Power Electronics Center Since 1994 , he has been working as asenior design engineer at Delta Power Electronics Lab., Inc., Blacksburg, VA.His experience includes dc-dc converter circuits, three-phase direct powerconversion, and digital control electronics His current research is focusedon power conversion and management issues for portable equipment, anddesign optimzahon for low-voltage power supplies He has published over40 technical papers

DuSan BorojeviC (S80-M86) received the B Sdegree from the University of Belgrade, Yugoslavia,the M.S. degree from the University of Novi Sad,Yugoslavia, in 1976 and 1982, respectively, andthe Ph.D degree from Virginia Power Electron-ics Center, Virginia Polytechnic Institute and StateUmversity, Blacksburg, in 1986, all in electricalengineeringFrom 1976 to 1982, he was an Instructor at theInstitute for Power and Electronics at the Universityof Novi Sad. Between 1986 and 1990, he wasan Assistant Professor and founder of the power and industrial electronicsresearch program, and served as the Acting Department Head Since 1990, hehas been an Associate Professor at Virginia Polytechnic Institute and StateUmversity, and a member of the Virginia Power Electronics Center Hisresearch interests include multi-phase power converters, high-power PWMconversion, applied control, and electncal drives He has published over 60technicd papers, has one U.S. patent and two patents pending, and has ledover 20 sponsored research projectsDr. Borojevit is a member of IEEE Power Electronics Society AdCom,IEEE Industry Applicallons Society Industrial Drives C o m t t e e , and PhiKappa Phi