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1402 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 20, NO. 6, NOVEMBER 2005

Current Control Strategy for Power ConditionersUsing Sinusoidal Signal Integrators

in Synchronous Reference FrameRadu Iustin Bojoi, Giovanni Griva, Valeriu Bostan, Maurizio Guerriero, Francesco Farina, and

Francesco Profumo, Senior Member, IEEE

AbstractIn this paper, a current control scheme, based on pro-portional-integral regulators using sinusoidal signal integrators(SSIs), is proposed for shunt type power conditioners. The aim is tosimplify the implementation of SSI-based current harmonic com-pensation for industrial implementations where strict limitationson the harmonic distortion of the mains currents are required.To compensate current harmonics, the SSIs are implementedto operate both on positive and negative sequence signals. One

regulator, for the fundamental current component, is implementedin the stationary reference frame. The other regulators, for thecurrent harmonics, are all implemented in a synchronous refer-ence frame rotating at the fundamental frequency. This allows thesimultaneous compensation of two current harmonics with justone regulator, yielding a significant reduction of the computationaleffort compared with other current control methods employingsinusoidal signal integrators implemented in stationary referenceframe. A simple and robust voltage filter is also proposed by theauthors to obtain a smooth and accurate position estimation ofthe voltage vector at the point of common coupling (PCC) underdistorted mains voltages. The whole control algorithm has beenimplemented on a 16-b, fixed-point digital signal processor (DSP)platform controlling a 20-kVA power conditioner prototype. Theexperimental results presented in this paper for inductive and

capacitive loads show the validity of the proposed solutions.

Index TermsDigital signal processor (DSP), shunt type powerconditioner, sinusoidal signal integrators (SSIs).

I. INTRODUCTION

THE WIDE use of nonlinear loads, such as diode or

thyristor front-end rectifiers, cycloconverters, switching

power supplies, etc., causes the injection of high amounts

of current harmonics in todays distribution networks. These

harmonics cause voltage distortion, depending on the line

impedance, additional losses in transformers and in line ca-

pacitors, and malfunction of sensitive electronic equipment.

For this reason, harmonic restriction standards, such as IEEE

519, have been recommended to limit the harmonic currents

injected into the mains by nonlinear loads depending on their

rated power and on the source impedance.

Manuscript received July 28, 2004; revised March 8, 2005. This paperwas presented at the 35th IEEE Power Electronics Specialists Conference(PESC04). Recommended by Associate Editor V. Staudt.

R. I. Bojoi, G. Griva, M. Guerriero, F. Farina, and F. Profumo are with theDipartimento di Ingegneria Elettrica, Politecnico di Torino, Torino 10129, Italy(e-mail: giovanni.griva@polito.it).

V. Bostan is with the Faculty of Electrotechnics, Politehnica University,Bucharest, Romania.

Digital Object Identifier 10.1109/TPEL.2005.857558

Fig. 1. Basic current harmonic compensationscheme of a nonlinearload usinga shunt APF.

Shunt passive filters, often called harmonic trap filters,

have traditionally been used to avoid the flow of the harmonic

currents into the mains. These solutions are very simple, low

cost, and with high efficiency, but their performance stronglydepends on the source impedance and can lead to unwanted par-

allel resonance with the network [1].

During the last decade, the cost reduction and the increased

reliability of power electronics allowed an increased interest for

active filtering. Among various power conditioner topologies,

the shunt active power filter (APF) is considered as an effec-

tive solution for low to medium power applications to reduce

the current harmonics to acceptable limits [1][4], featuring ca-

pabilities of compensating load unbalance and reactive currents

as well [5], [6]. Active filtering is advantageous where a fast re-

sponse to dynamic load changes is required. In addition, a dig-

itally controlled APF represents a versatile power conditioningtool since the different compensation tasks can be modified by

changing the software of the digital controller.

The basic compensation scheme using a shunt APF to com-

pensate the current harmonics generated by a nonlinear load is

shown in Fig. 1.

The APF is basically a three-phase inverter having only a

large capacitor on its dc-link. The inverter is connected to the

load at the point of common coupling (PCC) through an input

inductor. To have sinusoidal currents from the mains, the APF

must operate as a controlled current source generating the load

harmoniccurrents (Fig. 1). Forthisreason, the inverter

will need an active fundamental current component to

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BOJOI et al.: CURRENT CONTROL STRATEGY FOR POWER CONDITIONERS 1403

keep its dc-link capacitor charged at a voltage higher than the

peak line-to-line voltage. To guarantee good performance in cur-

rent harmonics elimination, the key issues in APF control are the

current reference generation and the current control strategy.

Coming to the current control, the APF reference current is

far from a sinusoidal signal and for this reason obtaining zero

steady-state error is a challenging task. Furthermore, the APFand its current control must deal with very high slope variations

of the current reference, corresponding to high values of

the distorted load currents. The most general criterion to eval-

uate the performance of different current control schemes is the

total harmonic distortion (THD) of the mains line current, to-

gether with its spectrum and including the ripple generated by

the pulsewidth modulation (PWM) operation of the APF [7].

The use of nonlinear regulators, such as hysteresis controllers

[7], givesa robust and simple solution having as major drawback

a variable switching frequency. For this reason, the APF input

filter is more difficult to design to avoid unwanted resonance

effects on the utility grid.

A constant switching frequency can be achieved by using

the dead-beat control techniques, which exploit the advantages

of digital control. These solutions have been implemented

with good results either in stationary reference frame [7] or in

synchronous reference frame [8]. The main drawback of these

methods is related to the accuracy of the system parameters. In

addition, the inverter nonlinear operation, due to the dead-time

effects, must be taken into account. To overcome these aspects,

a custom-mixed analog and digital current control solution

based on a predictive regulator with charge error control has

been presented in [9]. Combined with an analog PWM mod-

ulator, this solution allows a high sampling frequency and

consequently high current bandwidth.For some nonlinear loads, such as front-end rectifiers, the

harmonic spectrum of the distortion current (Fig. 1)

drawn by the load consists of a sum of well-known harmonics of

different sequence [6]. Based on this feature, a frequency selec-

tive compensation algorithm has been presented in [6] and [10].

This method identifies preselected undesired harmonic currents,

which are independently compensated using Integral ( ) regu-

lators implemented in multiple synchronous reference frames

rotating at , where is the mainsfrequency and is the

harmonic order. Another frequency-selective based controller

schemehasbeendiscussedin[11], whereintegralregulators have

been implemented in multiple direct and inverse synchronous

reference frames rotating at 6 1,2, .

To eliminate the need of multiple reference frames, a new

current control technique using the concept of stationary frame

generalized integrators has been introduced in [12]. This current

control technique is based on the sinusoidal signal integrator

(SSI), which guarantees that the actual current tracks its sinu-

soidal reference (with zero steady-state error) and is tuned on

a specified frequency. Using the concept of frequency-selective

compensation, the current control scheme uses multiple SSIs in

stationary reference frame, tuned on selected current harmonics

of order 6 1 1,2, [12]. This means that many SSIs

might be necessary to reach the required THD performance,

making digital implementations computationally heavier com-pared with other frequency-selective techniques.

Starting from the mentioned property of the SSI of being able

to operate with both positive sequence and negative sequence

signals, in this paper a current control scheme is proposed, with

the following key features.

For the fundamental current component, a propor-

tional-SSI (P-SSI) regulator is tuned on the fundamental

frequency, , and it is implemented in the stationaryreference frame.

For each couple of harmonicsat 6 1 1, 2, ,

a single SSI regulator is tuned at the frequency 6 , and

it is implemented in a synchronous reference frame ro-

tating at ; in such reference frame, the two harmonics

at 6 1 can be considered as a positive sequence

signal and a negative sequence signal at 6 .

The main advantages of the proposed current control scheme

are:

both harmonics at 6 1 are compensated with just

one regulator;

it allows to halve the number of SSIs needed, comparedwith the solutions using an SSI for each harmonic [12];

good transient performance and better response time to

load variations compared with frequency-selective cur-

rent control methods using multiple reference frames.

The reference current generation is performed in a syn-

chronous reference frame aligned with the PCC voltage vector

[13], [14]. To solve the problems given by distorted voltage at

PCC, the paper also presents a simple and robust PCC voltage

position estimation scheme.

II. PROPORTIONAL-SINUSOIDALSIGNALINTEGRATOR

The main goal of a P-SSI is to obtain zero steady-state errorfor sinusoidal inputs with a specified frequency . In the con-

tinuous-time domain, the transfer function of a P-SSI is given

by [12]

(1)

where is the proportional gain, is the integral gain, and

is the resonance frequency of the SSI.

The employment of P-SSI regulators, compared with other

solutions, gives the following advantages.

Zero steady-state error for signals having the same fre-

quency as ; this feature can be exploited for APFs,where the signal frequencies are well defined and prac-

tically constant (mainsfrequency and its multiples).

The SSI acts as a resonantfilter, tuned on [15], [16]; in

this way, multiple SSIs with different resonance frequen-

cies can operate in parallel without interfering with each

other.

The SSI can operate with both positive and negative se-

quence signals [12].

According to (1), the P-SSI regulator is a second-order system;

a possible block diagram of the P-SSI is shown in Fig. 2 and the

corresponding state-space model is

(2)

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Fig. 2. Schematic block diagram of P-SSI regulator.

where

For digital implementations, the discretized model of the

P-SSI regulator (1) is

(3)

The discrete forms of the system and input matrices are com-

puted as [17]

(4)

where is the sampling time.

From (1), the system and input matrices become

(5)

(6)

For large values of the resonance frequency , the delay caused

by the sampling time can affect the system performance and also

the system stability. According to (2), in steady-state conditions

the regulator states and are always sinusoidal having the

same amplitude and being always phase-shifted by 90 electrical

degrees. For this reason, the compensation of the computation

delay can be easily performed using the rotational transforma-

tion given by

(7)

where 1 is the number of sampling intervals to be compen-sated.

TABLE IHARMONICSEQUENCES FORTHREE-PHASERECTIFIERS

III. CURRENT CONTROL SCHEME USING MULTIPLESSIS

IN SYNCHRONOUSREFERENCEFRAMES

The current control of an APF must deal with nonsinusoidal

reference currents whose harmonic spectrum consists of a fun-

damental component and of the harmonics drawn by the non-

linear load.

For diode or thyristor front-end rectifiers, these harmonics are

of order 6 1 1, 2, of the fundamental frequency

. If we consider the fundamental frequency component as a

positive-type sequence, the corresponding sequence representa-

tions of the current harmonics in various synchronous reference

frames are illustrated in Table I.

The proposed current control scheme is a frequency-selec-

tive technique since it aims at compensating specific harmonics

using SSI regulators. Based on the property of the SSI of being

able to operate with both positive sequence and negative se-

quence signals, Table I also suggests two different possible cur-

rent control strategies where a single SSI is used to simultane-

ously compensate two current harmonics:

1) for each couple of harmonics of order 6 1 , i.e., (5,

7), (11, 13), (17, 19) , a single SSI regulator is tuned at

the frequency 6 1, 2, and it is implemented

in a synchronous reference frame rotating at ;

2) the couple of harmonics (5, 11) is canceled by a single

SSI regulator tuned at the frequency 3 implemented in

a synchronous reference frame rotating at 8 , mean-

while the couple of harmonics (7, 13) is canceled by an

SSI regulator tuned at the frequency 3 implemented in

a synchronous reference frame rotating at 10 .

For the experimental implementation the first current control

strategy has been used since it requires less rotational transfor-

mations compared with the second method. Thus, the proposedcurrent control scheme using P-SSI regulators is shown in Fig. 3.

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Fig. 3. Block diagram of the proposed current control scheme.

For the fundamental current component, a P-SSI regulator is

tuned on the fundamental frequency, , and it is implemented

in the stationary reference frame. Its main function is to

control the active current component needed to keep charged the

dc-link capacitor at a specified voltage. Depending on the ref-

erence current generation, this regulator can be used for reac-

tive current compensation as well. In addition, unbalanced load

compensation can be also implemented since SSI regulators are

able to deal with both positive and negative current sequence

components [12].

To compensate the current harmonics, the current error

is transformed in the synchronous reference frame aligned

with the PCC voltage vector. The resulting error is then

applied to three SSI regulators tuned on the resonance frequen-

cies 6 12 , and 18 , respectively. The outputs of theseSSI regulators are added together and then transformed in

stationary reference frame through an inverse rotational trans-

formation to obtain the command voltage which is subse-

quently added with the output of the P-SSI regulator used for

fundamental frequency to obtain the final voltage commands

in reference frame.

The proposed current control scheme is thus a frequency-se-

lective technique since it aims at compensating specific load

harmonics. Compared with frequency-selective methods pre-

sented in [6] and [10], there is a clear difference. In [6] and [10],

each harmonic to be compensated needs to be computed using

sliding window integrators and then applied to an integrator.

The compensation module for each harmonic operates in a syn-

chronous reference frame rotating at a frequency , where

5 7 11 is the harmonic order and takes into ac-

count the harmonic sequence [6], as shown in Table I. One di-

rect and one inverse rotational transformation are required for

each harmonic compensation module [5], [10]. Low gains for

the integrator modules are used to avoid interactions between

the different controller modules, resulting in a long compensa-

tion time [10].

For the proposed harmonic compensation scheme (Fig. 3),

the input of the harmonic regulators is the current error con-

taining all the harmonics, calculated in the synchronous

reference frame aligned on the PCC voltage vector. Each singleSSI regulator, acting as a tuned resonantfilter, will compensate

Fig. 4. APF control scheme.

two specific harmonics without interfering with other regula-

tors, allowing a good dynamic performance and less compensa-

tion time. Moreover, the proposed current control does not need

additional load current prediction schemes [10].

The proposed current control scheme is able to compensate

six current harmonics, i.e., fifth, seventh, 11th, 13th, 17th, and

19th, with only three SSI regulators associated to one direct and

one inverse rotational transformations (Fig. 3). That will signif-

icantly reduce the computational effort, compared with current

control solutions using an SSI for each harmonic [12].

As shown by (3, 7), the computational effort to implement a

single SSI is eight multiply-and-accumulate (MAC)fixed-point

operations, which corresponds to one direct plus one inverse ro-

tational transformations. For this reason, if compared with fre-

quency-selective methods [5], [10], [11] using multiple refer-ence frames, the proposed method can get a competitive execu-

tion time when many current harmonics have to be compensated

(Fig. 3). In this case, the complexity of an SSI and additional

blocks (such as the reference generator) is balanced by the addi-

tional rotational transformations needed for frequency-selective

methods.

IV. DESCRIPTION OF THEOVERALLCONTROL SYSTEM

The proposed current control strategy has been included in a

digital control scheme for an APF which compensates the har-

monics generated by a diode front-end rectifier, as shown in

Fig. 4. The quantities measured from the system are: the load

currents , the APF currents , the PCC line-to-line

voltages and the APF dc-link voltage .

The block diagram of the APF control scheme is shown in

Fig. 5 and contains two control loops.

1) DC-link voltage control loop: This is a slow loop using a

simple proportional-integral (PI) regulator whose output

is the reference active current component in

synchronous reference frame.

2) APF current control loop: This loop regulates the APF

currents with the proposed scheme of Fig. 3. The

APF current reference is computed from the load

currents and from the output of the dc-link regu-lator , as detailed in Fig. 6. This reference current cal-

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Fig. 5. Block diagram of the whole APF control system.

Fig. 6. APF reference current generation.

culation scheme is described in [13] and [14], and it is

performed in the reference frame, rotating synchro-

nously with the PCC voltage vector . The out-

puts of the current control block are the APF command

voltages in stationary reference frame. These com-mand voltages are subsequently transformed into three-

phase command voltages . The three-phase com-

mand voltages are applied to a digital PWM block based

on the sine-triangle comparison modulation technique to

generate the switching functions for the APF in-

verter.

The band-pass filter (BPF) blocks of Fig. 6 represent BPFs

whose outputs are the harmonic current components, to be

compensated by the APF. High-pass filters (HPF) are usually

employed to retain all but the dc component, producing signals

containing all the harmonics [13], [14]. The BPF (Fig. 6) has

been used instead to limit the high frequency noise. In fact, theBPF higher cut-off frequency has been set at 5 kHz meanwhile

the lower cut-off frequency is 20 Hz. This approach has min-

imal influence on the magnitude and phase of the generated ref-

erence harmonic components. The fundamental reactive refer-

ence component is computed from the dc value of the -axis

load current component by means of the gain , according to

the desired power factor compensation strategy.

The position of the PCC voltage vector is computed by means

of a proposed voltage filter scheme consisting of an SSI and

a phase-locked loop (PLL) algorithm, as shown in Fig. 7. The

main goal is to provide a smooth and accurate position of the

PCC voltage vector for the APF control scheme even under

distorted PCC voltage; in fact, any distortion of would deteri-orate thefiltering operation of the APF.

Fig. 7. Computation of the PCC voltage vector position.

Since in steady-state operation the SSIs described by (2) havesinusoidal states and with the same amplitude and being

always phase-shifted by 90 electrical degrees, thefiltered PCC

voltage components can be obtained using a single SSI

acting as a filter for the measured voltage component.

Thefiltering action and the transient response depends on the

SSI integral coefficient . The sign of is chosen by a se-

quence detector. If the voltage sequence at the PCC is known in

advance, the sequence detector can be eliminated. Anyhow, the

sequence detection can be performed before starting the control

interrupt service routine (ISR), so in practice the sequence de-

tector does not require additional execution time. The outputs of

the SSI are applied to a simple PLL block consisting of a PI reg-

ulator and an integrator [18]. Due to thefiltering action of both

the SSI and PLL, the estimated position of the PCC voltage

vector is very smooth and is not influenced by the distortion of

the mains voltage. In case of unbalanced PCC voltage, there

will be a small error in the PCC vector position estimation and

best results will be obtained by means of a full sequence filter,

as described in [12]

V. EXPERIMENTAL RESULTS

A 20-kVA shunt APF prototype has been built, using an in-

sulated-gate bipolar transistor (IGBT) three-phase inverter with

a switching frequency of 10 kHz. The dc-link reference voltageof the inverter has been set at 730 V. The inverter interfacing

inductance, , and the input load inductance, , are equal to

250 H (see Fig. 4). The total estimated mainsinductance,

(see Fig. 4), is about 150 H.

The ripplefilter block in Fig. 4 represents a low-pass passive

filter used to reduce the high frequency harmonic currents

(generated by the PWM inverter of the APF) injected into the

mains, below a specified amplitude.

The whole APF control algorithm has been implemented on

a 16-b, fixed-point, TMS320LF2407A DSP, with a 40-MHz

clock frequency. The control sampling frequency has been set at

10 kHz. The APF control algorithm has been written in mixed

C/Assembler language to minimize the execution time. Duringthe operation, the DSP saves data into its external memory;

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Fig. 8. Start-up of the PLL to estimate the position of the PCC voltage vector.From top tobottom: (1) (V); (2) (V); (3) (rad/s); (4) (rad);and (5) .

Fig. 9. Non-linear load examples used for the experimental tests: (a) diodefull-bridge rectifier with inductive smoothing and (b) diode full-bridge recti fierwith capacitive smoothing.

the data can be read and saved on a personal computer using

the features of the DSP development software. The execution

time of the whole APF control algorithm is 70 s, including

protection tasks and save procedures. The execution time for

the reference generator (Fig. 6) and the current control scheme

(Fig. 3) is about 20 s.

The operation of the PCC voltage vector position estimator

(Fig. 7) is illustrated in Fig. 8, where the start-up of the PLL

is shown. If the PCC voltage components are distorted, the SSIfiltering action completely eliminates these effects and the esti-

mated position of the PCC voltage vector is smooth, as shown

in Fig. 8.

To demonstrate the steady-state and dynamic performance

of the proposed current control scheme, two different nonlinear

loads have been considered (Fig. 9): diode bridge rectifier

having an inductive load or a capacitive load, respectively. A

dc breaker has been used to obtain step load transients.

A. Compensation of the Non-Linear Inductive Load

In Figs. 1017, the steady-state operation of the APF compen-

sating the inductive nonlinear load is shown. The effectivenessof the proposed control scheme is illustrated in Figs. 10 and 11,

Fig. 10. Current controlfor -axis under steady-state operation with inductiveload. From top to bottom: (1) (A); (2) (A); and (3) (A).

Fig. 11. Currentcontrol for -axis under steady-state operation with inductiveload. From top to bottom: (1)

(A); (2)

(A); and (3)

(A).

showing the reference currents, the actual currents and the cur-

rent errors in stationary reference frame.

The voltage commands of the SSI regulators operating in syn-

chronous reference frame are shown in Fig. 12. The com-

mands of the SSIs tuned on the same frequency have different

amplitudes since these regulators must simultaneously compen-sate two harmonics of different sequence. The SSIs commands

in synchronous reference frame are added together and then

transformed in the stationary reference frame. The re-

sulting command signals are added to the voltage commands

generated by the P-SSI regulator tuned on the fundamental fre-

quency (Fig. 3). The three-phase duty-cycle commands, used to

generate the APF inverter switching functions, are illustrated in

Fig. 13.

Even with the inherent truncation errors caused by the DSP

fixed-point computation and the influence of the sampling time

delay, the discrete SSI regulators operating in synchronous ref-

erence frame are able to compensate all the current harmonics

up to the 19th harmonic (950 Hz), as shown in Fig. 15. Theobtained THD for the mainscurrent is about 3.5%. The mains

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Fig. 18. APF transient performance for inductive load turn-on. Trace 1: (A). Trace 2: (A).

Fig. 19. APF transient performance for inductive load turn-off. Trace 1: (A). Trace 2: (A).

Fig. 20. APF transient performance when the harmonic compensation isenabled with operating inductive load. Trace 1: (A). Trace 2: (A).

only the current harmonic compensation. The APF transient re-sponse is described by Figs. 1822.

Fig. 21. APF transient performance when the harmonic compensation is

disabled with operating inductive load. Trace 1: (A). Trace 2: (A).

Fig. 22. Current control for -axis under steady-state operation withcapacitive load. From top to bottom: (1)

(A); (2)

(A); and (3)

(A).

As shown by the experimental results, the proposed control

strategy has good dynamic performance. The response time

does not exceed one period of the mainscurrents.

B. Compensation of the Non-Linear Capacitive Load

In Figs. 2228, the steady-state operation of the APF com-

pensating the capacitive nonlinear load is shown. The load re-

sistance [see Fig. 9(b)] has been chosen to obtain approxi-

mately the same peak load current as for the inductive load. The

APF reference currents, the actual currents and the current er-

rors in stationary reference frame are shown in Figs. 22

and 23, meanwhile, the duty-cycle commands are illustrated in

Fig. 24.

The capacitive load exhibits higher current distortion com-

pared with the inductive load (see Fig. 25). As for the induc-

tive load, the current control is able to compensate all the cur-

rent harmonics up to the 19th harmonic (950 Hz), as shown in

Fig. 26. The THD obtained for the mains current is about 5.5%;the steady-state performance with the capacitive load is slightly

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Fig. 23. Current control for

-axis under steady-state operation with

capacitive load. From top to bottom: (1) (A); (2) (A); and (3) (A).

Fig. 24. APF duty-cycle commands under steady-state operation withcapacitive load: (1) (pu); (2) (pu); and (3) (pu).

Fig. 25. Fourier analysis of the capacitive load current.

poorer than that obtained with the inductive load and is influ-

enced by the rectifier input inductance [1], [19]. The mains cur-rent is almost sinusoidal, as shown by Figs. 27 and 28, where the

Fig. 26. Fourier analysis of the mainscurrent for the compensated capacitiveload.

Fig. 27. Mainscurrent and capacitive load current in steady-state operation.Trace 1:

(A). Trace 2:

(A).

Fig. 28. Mainscurrent and APF current for the capacitive load compensationin steady-state operation. Trace 1:

(A). Trace 2:

(A).

phase mainscurrent is plotted together with the same phase

load current and APF current, respectively.

To evaluate the APF dynamic performance with the capaci-

tive load, the same tests as for the inductive load have been per-formed and the APF transient response is shown in Figs. 29 32.

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Fig. 29. APF transient performance for capacitive load turn-on. Trace 1: (A). Trace 2: (A).

Fig. 30. APF transient performance for capacitive load turn-off. Trace 1:

(A). Trace 2:

(A).

Fig. 31. APF transient performance when the harmonic compensation isenabled with operating capacitive load. Trace 1: (A). Trace 2: (A).

As shown by the experimental results, the APF dynamic per-

formance with the capacitive load is similar to that obtained with

the inductive load, getting a response time less than one periodof the mainscurrents.

Fig. 32. APF transient performance when the harmonic compensation isdisabled with operating capacitive load. Trace 1: (A). Trace 2: (A).

VI. CONCLUSION

A current control scheme for shunt active power filters is

proposed in this paper. The key issue is the use of sinusoidal

signal integrators in the synchronous reference frame rotating at

the fundamental frequency . This allows simultaneous com-

pensation of each couple of harmonics of order 6 1 by a

single SSI regulator tuned at the frequency 6 1, 2, ,

yielding a significant reduction of the computational effort com-

pared with the scheme using an SSI regulator for each har-

monic. For this reason, the proposed current control scheme

can be attractive for industrial implementations based onfixed-

point processors. Moreover, the proposed scheme has better re-

sponse time compared to other frequency-selective current con-

trol methods. A simple and robust voltagefilter is also proposedto obtain a smooth and accurate position estimation of the PCC

voltage vector under distorted PCC voltages. The whole APF

control system has been implemented on a 16-b fixed point DSP

and the experimental results, obtained with either inductive load

or capacitive load show the validity of the proposed solutions,

in both steady-state and transient operation.

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Radu Iustin Bojoi received the M.Sc. degree inelectrical engineering from the Technical Universityof Iasi, Iasi, Romania, in 1993 and the Ph.D. degreefrom Politecnico di Torino, Torino, Italy, in 2003.

From 1994 to 1999, he was Assistant Professorin the Department of Electrical Drives and IndustrialAutomation, Technical University of Iasi. In 2004,

he joined the Department of Electrical Engineering,Politecnico di Torino as an Assistant Professor. He

has published more than 20 papers in internationalconferences and technical journals. His scientific in-

terests regard the design and development of DSP- and FPGA-based advancedcontrol systems in thefields of power electronics, high-performance electricaldrives, and power conditioning systems.

Dr. Bojoi received the IPEC First Prize Paper Award in 2005.

Giovanni Griva receivedthe M.S. and Ph.D. degreesin electronic engineering from the Politecnico diTorino, Torino, Italy, in 1990 and 1994, respectively.

From 1995 to 2001, he was Assistant Professorwith the Department of Electrical Engineering,Politecnico di Torino. Since 2002, he has been anAssociate Professor with the Politecnico di Torino.In 1993 and 1998, he was a Visiting Researcherat the R&E Center Elisha Gray II, WhirlpoolCorporation, Benton Harbor, MI. He has publishedmore than 60 papers in international conferences and

technical journals. He is a Reviewer for the IEE Proceedings. His scientificinterests regard power conversion systems and non conventional actuators. In

particular, his research activity has focussed on the design and developmentof advanced systems in the fields of power electronics, design of integratedelectronic/electromechanical systems, high performance electric drives, digitalcontrol for industry applications, and power conditioning systems.

Dr. Griva received the IEEE Industry Applications Society First Prize PaperAward in 1992. He is a Reviewer for the IEEE TRANSACTIONS ON INDUSTRY

APPLICATIONS.

Valeriu Bostan was born in Romania in 1971. Hereceived the M.S. and Ph.D. degrees in electrical en-gineering the from Politecnica University Bucharest,Bucharest, Romania, in 1996 and 2002, respectively.

Since 2003, he has been a Lecturer Professor withPolitehnica UniversityBucharest. He was involved inR&D programs on electrical drives, hybrid solutionsfor electric automobiles, digital DSP-based control

systems, and power activefilters.Dr. Bostan received the Werner von Siemens Ex-cellence Award in 2003.

Maurizio Guerrierowas born in Novi Ligure, Italy,

in 1968. He received the M.Sc. degree in electronicengineering and the Ph.D. degree in electrical engi-neering from the Politecnico di Torino, Torino, Italy,

in 2000 and 2005, respectively.He joined the Department of Electrical En-

gineering, Politecnico di Torino, in 2001. He iscurrently a Researcher under grant in the same De-

partment. Hisfields of interest are power electronicsand power quality.

Francesco Farinareceived the M.Sc. and Ph.D. de-grees in electrical engineering fromthe Politecnico di

Torino, Torino, Italy, in 2001 and 2005, respectively.He then joined the Department of Electrical Engi-

neering, Politecnico di Torino where he is currentlya Researcher under grant. His fields of interest arethe control design of high performance multiphaseinduction motor drives and the sensorless control ofbrushless motor drives.

Dr. Farina received the IPEC First Prize PaperAward in 2005.

Francesco Profumo (M88SM90) was born inSavona, Italy, in 1953. He received the Ph.D. degreein electrical engineering from the Politecnico diTorino, Torino, Italy, in 1977.

From 1978 to 1984, he was a Senior Engineer withthe R&D Ansaldo Group, Genova, Italy. In 1984, he

joined the Department of Electrical Engineering, Po-litecnicodi Torino, where he wasAssociate Professoruntil 1995. Heis nowProfessor of electrical machines

and driveswith thePolitecnico di Torino and AdjunctProfessor with the University of Bologna, Bologna,

Italy. He was a Visiting Professor with the Department of Electrical and Com-puter Engineering, University of Wisconsin, Madison, from 1986 to 1988 andwith the Department of Electrical Engineeringand Computer Science, NagasakiUniversity, Nagasaki, Japan, from 1996 to 1997. He published more than 190papers in International Conferences and Technical Journals. His fields of in-terestare power electronics conversion, high power devices, applications of new

power devices, integrated electronic/electromechanical design, high responsespeed servo drives, and new electrical machines structures.

Dr. Profumo received the IEEE-IAS Second Prize Paper Award in 1991 and1997and theIEEE-IAS First Prize Paper Award in 1992. He is an active memberof the IEEE-IAS Drives Committee and serves as Co-Chairman of the sameCommittee (IEEE-IAS TRANSACTIONS Review Chairman).He wasalso AdCommember of the IEEE PELS. He is member of the Technical Program Committeeof several International Conferences in the Power Electronics and Motor Drives

field and he was the Technical Co-Chairman of PCC 02, Osaka, Japan, in 2002.