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Baseband Transmission of Digital Signals Siemens

TT2550EU01AL_011

Contents

1 Introduction 3

2 Interface Codes 7

3 Digital Signal Regeneration 17

4 Reasons for Bit Errors 235 Codirectional Operation Mode 29

6 Contradirectional Operation Mode 34

7 Important PCM Interfaces 36

8 Exercise 39

Baseband Transmission of DigitalSignals

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Siemens Baseband Transmission of Digital Signals

TT2550EU01AL_012

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TT2550EU01AL_013

1 Introduction

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Digital signal devices process the signals as purely binary information, i.e. the signallevel does not change between bits with the same logical state. For this reason,these so-called NRZ signals (no return to zero) can only be processed together with

the corresponding clock, which enables the identification of individual bit positions.This separate clock is not available for the transmission of data signals and thus ithas to be possible to derive (i.e. regenerate) the clock from the data signal on thereceiving side. It is obvious that for a NRZ code this is very complicated, if notvirtually impossible. A further disadvantage of the NRZ code is that it carries a certainamount of dc-voltage which excludes the signal's galvanic isolation at the interface(transformer etc.). Due to these disadvantages, various interface codes have beendeveloped, all of which comply with the following requirements:

l good clock retrieval features

l no dc-component

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NRZ Signal

Clock

1 bit

1 1 1 0 0 0 1 0 1 1 0 0Binary information

Fig. 1 Processing of NRZ signals with the aid of separate clock

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2 Interface Codes

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A suitable interface code has a maximum of transitions between the different signallevels, even for the transmission of lengthy sequences of identical logical states; ithas no dc-component. The survey shows the development of individual codes.

RZ Code A log. 1 is represented as half-bit with a change of signals levels fromLow High Low.

Advantage: clock retrieval possible also for adjacent log. 1 bits.

Disadvantage: no clock information for zero sequences, dc-component.

AMI Code The state log. 1 is represented alternately as positive or negative signallevel.

Advantage: clock retrieval possible also for adjacent log. 1bits, no dc-component.

Disadvantage: no clock information for zero sequences

Is derived from the AMI code. Here, four consequent zero bits arereplaced by a 1001 or 0001 combination. This is done in such a waythat the signal receiver detects the mutilation of informational contentsand cancels it.

Advantage: Maximum clock information, no dc-component.

Disadvantage: None

This code is applied for the device interfaces from 2 Mbit/s up to 34Mbit/s (baseband transmission). The exact coding rules areenumerated in the following.

CMI Code Due to its easy generation with delay lines and simple gate functionsthe CMI code is suited especially for interfaces with high bitrates.Therefore, this code is standardized for the 140 Mbit/s device interface

A rather important advantage of the interface code is the possibility it offers to detecttransmission errors by supervising the coding rules. With the HDB3 code, forexample, the receiving of four zero bits would represent the violation of a coding rule,i.e. at least one bit error must have been occurred during transmission.

The standardization of interface codes only refers to device interfaces. The codes forconductor-bound transmission paths are manufacturer-dependent and are generallyadapted to the requirements of the respective terminating unit.

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Digital Interface Codes

Signal

Clock

NRZ

Binary

RZBinary

AMI

HDB3

CMI

Fig. 2

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Fig. 3 shows the amplitude spectrum of various interface codes. For codes without adc-component the maximum energy is within the range of a frequency whichcorresponds to half of the bitrate value. This is obvious when comparing the

definitions of frequency and bitrate respectively.

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0 .2 .4 .6 .8 1.0 1.2 1.4 1.6 1.8 2.0

Frequency bitrate

Power

density

-2

-4

-6

-8

1.0

1.2

1.4

1.6

1.8

2.0

0

Fig. 3 Amplitude spectrum of various codes

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The bit sequence represented in fig. 4 shall serve as an example. One signal periodcovers 2 bits and corresponds to the basic wave of the data signal. This wavecontains the greatest amount of energy and has a frequency which equals half of the

bitrate value. This is also the frequency that is indicated by a frequency counterconnected to a source of a digital signal.

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0 1 1 1 10 0 0

2 bit

= 1 period

Fig. 4 Bit sequence 0101...

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HDB3-Coding rules

(Third-Order-High-Density-Bipolar-Code)

The HDB3-code is a modified version of the AMI-code. Binary signals or AMI-codesignals may contain lengthy "0" sequences, which hinder the clock retrieval in theregenerative repeaters along digital transmission paths. The HDB3 code enables theelimination of "0" sequences with more than 3 zeros.

1. If there are more than 4 consecutive "0"-signal elements, the fourth "0"-signalelement shall be replaced by a V-signal element (= "1"-signal element) (000V).Hereby, the V-signal element takes on the same polarity as the "1"-signalelement. A V-signal element causes a Violation of the AMI-rule.

2. If between the V-signal element, inserted according to the conditions specifiedabove (rule 1), and the preceding V-signal element there is an even number of"1"-signal elements, then the first of four "0"-signal elements shall be replaced byan A-signal element (= "1"-signal element). The polarity of the A-signal elementcomplies with the AMI rule. The last of four "0"-signal elements becomes again a

V-signal element (A00V). In this case the A- and V-signal elements have thesame polarity.

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V

V

0 0 1 1 1 0 0 0 0 1

binary

0 HDB3

previous V-bitrule 1 applies

rule 2 does not apply

V

V

0 0 1 1 0 0 0 0 0 1

binary

0 HDB3

V-bit rule 1 and 2 apply

A

previous

Fig. 5 Transformation of two binary signals into HDB3-signals

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TT2550EU01AL_0116

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3 Digital Signal Regeneration

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The digital signal regeneration is one of the advantages of the digital transmissiontechnique. Theoretically, it enables the signals to be transmitted via an unlimiteddistance without any quality losses.

During transmission, a digital signal is attenuated and distorted, which results in areduction of the signal/noise ratio. The regeneration process has the task ofcanceling such distortions and regenerate the originally sent signal from the actuallyreceived signal. That is why every interface on the receiving side is followed by aregeneration circuit.

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attenuation +

interference

REGTX

signal source

regenerated

signal

transmission

path

regenerator

transmitted signal received signal regenerated

signal

+

Fig. 6 Principle of digital signal regeneration

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Four basic function blocks are necessary for the digital signal regeneration:

l amplification block (balancing of attenuation losses)

l

clock retrieval blockl amplitude decision block

l time decision block

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Receivedsignal

distorted

andattenuated

AGC AD TD regenerated

data signal

PLL

regeneratedclock

CR

AGC Gain controlled amplifierAD Amplitude decision

TD Time decisionCR Clock retrieval

Fig. 7 Block diagram of a digital signal regenerator

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These four functions are represented in fig. 7.

l The receiving signal is fed into an automatic gain controlled amplifier (AGC) whichkeeps the amplitude of the outgoing signal at a constant value over a wide range

of incoming amplitudes. Thus, the attenuation of the transmission path isbalanced.

l The constant output level is a precondition for the functioning of the amplitudedecision block (AD) which follows. This AD decides on the basis of an internalthreshold value whether the level of incoming signal is above or under thisthreshold value. Accordingly, a signal with the levels Log. 0 or Log. 1 is emitted atthe output. The output signal thus consists of pulses, the width of which onlydepends on the period during which the output signal exceeds the decisionthreshold.

l The time decision block (TD) has the task of generating signal pulses withconstant width. For this, it requires the regenerated receive signal clock whichsamples the output signal of the amplitude decision block. If, at the time ofsampling the signal has a level of Log. 1, the time decision block emits a pulse

with constant width. Thus, incoming pulses of any width are turned into pulsescorresponding exactly to the bit width of the transmitted signal. The time decisionprocess is the final stage of regeneration.

l The clock retrieval CR block is in charge of regenerating the transmitted signalclock from the receive signal clock. In order to effect this function, a phase lockedloop (PLL) is employed, basically consisting of a voltage-controlled oscillator

whose frequency can be changed by a control-voltage. By adequate evaluation of

the receiving signal it is now possible to reach a control voltage which can set theoscillator to the exact clock frequency value of the transmitting signal.

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4 Reasons for Bit Errors

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TT2550EU01AL_0124

The decisive quality criteria for the transmission of digital signals is the bit error rate(BER). This BER represents the proportion of bits which have been mutilated (i.e.incorrectly recorded) during transmission, to the total amount of bits transmitted

within a certain interval. The BER directly influences the quality of the transmittedservices (e.g. voice channels, data channels, video signals). Two significant BER areexplained exemplary in the following:

BER = 10-6

This BER virtually cannot be perceived in a voice channel. For the transmission ofdata channels, however, this value represents the maximum acceptable limit. Thetransmission system is in a state of "degraded quality", which is indicated by adegradation alarm (low priority) on the devices involved. The transmission pathremains, nevertheless, in operation.

BER = 10-3

This BER causes a strong interference noise in a voice channel. The operating stateis judged to be of "unacceptable quality", which is signaled by the devices involved bythe emission of a failure alarm (high priority). The transmission path goes out ofoperation.

How do bit errors arise?

In the previous section it was mentioned that digital signals can be regenerated as

requested, i.e. a transmission without quality reduction is possible. This statement is,however, only partially true, i.e. whenever the impairment of the transmission signalsis within limits which still permit the regeneration at the receiving side. The reasonsfor the formation of bit errors are

l low signal/noise ratio

ljitter

l intersymbol interference

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TT2550EU01AL_0125

Low signal/noise proportion

Noise amplitudes which influence the amplitude decision process are superimposed

to the originally sent signal.

The superimposed interference peaks lead to an incorrect signal interpretation at thereceiving end. Reasons for a low S/N-ratio are:

a) too strong signal attenuation during transmission

b) external interference during transmission.

For transmission in cable sections (especially optical fiber) both reasons can belargely eliminated by careful planning.

Decision treshold

Fig. 8 Low S/N-proportion

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TT2550EU01AL_0126

Jitter

Due to jitter, the transitions between signal levels log. 0 and log. 1 do not take place

at periodically recurring points in time (characteristically moments) as for undisturbedsignals, which means that the transitions oscillate around the characteristicallymoments

Jitter is characterized by jitter amplitude (unit intervals UI) and jitter frequency. OneUI means that, because of deviation from the characteristically moments, the signaledges are within a range equal to the width of 1 bit.

The jitter frequency is the number of oscillations around the characteristically momentper one second. Jitter influences the time decision process in the regenerator andcauses bit errors for high jitter amplitudes and frequency.

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TT2550EU01AL_0127

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T

T

characteristical

moment

signal without jitter

premature occurence of signal

edge (+T/2)

late occurence of signal

edge (-T/2)

Fig. 9 Representation of an Unit Interval (UI)

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TT2550EU01AL_0128

Jitter arises in the devices used for signal transmission (i.e. in regenerators anddemultiplexers = systematically jitter), or on the transmission path due to externalinfluences (non-systematic jitter).

Intersymbol interference

Is caused by a discrepancy between the band width of the transmission path and thebandwidth required for the digital signal. This leads to a bit extension, so that there isan overlap of bits which follow each other. Thus, bit errors occur, the reasons of

which can be traced back to the impairment of amplitude decision process. Forconductor-bound transmission of digital signals this effect can be excluded byadequate planning. For transmission on radio paths this effect is of fundamentalimportance as the frequency response of the transmission path can change due toatmospherical influence.

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TT2550EU01AL_0129

5 Codirectional Operation Mode

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TT2550EU01AL_0130

Codirectional

Designation of an interface between two devices A and B where the clocks T and T'

are transmitted in the same direction as the digital signals S and S' to which theybelong (opposite term: contradirectional).

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TT2550EU01AL_0131

a)

DTE

A

TX

RX

DCE

B

RX

TX

clockT

S signal

T'

S'

clock

signal

b)

DTE

A

DCE

BclockTS signal

T'

S'

clock

signal

Interface

V.24

Interface

G.703

Interface

G.703

Interface

V.24

diagram of a codirectional interfacediagram of a contradirectional interface

DTE = Data Terminal Equipment (PC, Exchange)DCE = Data Communication Equipment (Line card of PCM)

Fig. 10

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TT2550EU01AL_0132

distant

end

64 k

data

channel

64 k

D2

D2

bit-number

binary value

64 kbit/s

1 formation of

four-bit block

7

1

8

0

1

0

2

1

3

0

4

0

5

1

6

1

7

1

8

0

1

1

2 AMI coding

3 begining of

octett

violation violation

clock octett

Fig. 11 Interface code G.703 (64 kbit/s)

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TT2550EU01AL_0133

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TT2550EU01AL_0134

6 Contradirectional Operation ModeContradirectional

Designation of an interface between two devices A and B, where the clocks aresupplied only by the one device B. Thus the clock T' belonging to the signal S' (fromB to A) is transmitted in the same direction as the signal.

Remark: with a contradirectional interface the device B (e.g. PCM-multiplexer)requests a digital signal from the device A (e.g. device which bundles switching data).

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TT2550EU01AL_0135

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a)

DTE

A

TX

RX

DCE

B

RX

TX

clockT

S signal

T'

S'

clock

signal

b)

DTE

A

DCE

BclockT

S signal

T'

S'

clock

signal

Interface

V.24

Interface

G.703

Interface

G.703

Interface

V.24

Fig. 12

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TT2550EU01AL_0136

7 Important PCM InterfacesLF interface F2:

Speech frequency band 300 to 3400 Hz

Resistance for 2-wire operation 850 W sym. or

900 W sym.

Resistance for 4-wire operation 600 W sym.

Level variable

64-kbit/s-, 128-kbit/s-data signal interface D2:

Codirectional operation (G. 703/1.2.1)

Bit rate 64 kbit/s 128 kbit/s

Baud rate 256 kbaud/s 512 kbaud/s

Code AMI

Resistance 120 W sym.

Amplitude at the output 1 Vs0

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TT2550EU01AL_0137

Contradirectional operation (G. 703/1.2.3)

Bit rate 64 kbit/sCode AMI

Resistance 120 W sym.

Amplitude at the output 1 Vs0

Clock signal 64 kHz

Resistance (clock signal) 120 W sym.

Amplitude at the output (clock signal) 1 Vs0

2-Mbit/s-interface (G703/6) F1:

Bit rate 2048 kbit/s + 50 ppm

Code HDB3

Resistance 120 W sym. or

75 W coaxial

Amplitude at the output 3 Vs0 sym. or

2.37 Vs0 coaxial

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TT2550EU01AL_0138

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TT2550EU01AL_0139

8 Exercise1. What demands are made on the transmission codes?

2. Which two modes of operation are used for data channels?

3. Which symbol rate (baud/s) has the data thus transmitted?

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