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Table 8.1 Examples of complex instructions in two popular modern microprocessors (Pentium, PowerPC) and two computer families of historical significance (System/360–370, VAX).

8.1 Complex instructions

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• Implied : 0-address, stack machine, inc, dec, ...• Immediate addressing : 運算元 (常數 )在指令中• Register addressing : 運算元為 reg.• Base addressing: base + offset• Relative addressing: PC-relative, the reference

address is implicit.• Direct addressing:指令中的數字是運算元的地址• Indexed addressing: 用 reg.當索引• Update addressing: reg.自動 +1, -1 • Indirect addressing:先去記憶體拿運算元的地址，再拿一次才是運算元

8.2 Alternative addressing mode

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Figure 8.1 Schematic representation of more elaborate addressing modes not supported in MiniMIPS.

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Figure 8.2 Examples of MiniMIPS instructions with 0 to 3 addresses; shaded fields are unused.

8.2 Alternative instruction formats

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Figure 8.3 Example 80x86 instructions ranging in width from 1 to 6 bytes; much wider instructions (up to 15 bytes) also exist.

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Figure 8.4 Processor design and implementation process.

8.4 instruction set design and evolution

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Table 8.2 Evolution of the x86 instruction set and architecture in some of the Intel microprocessors, and comparable products from AMD.

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• RISC:– Small instruction set– Load/Store architecture– Limited addressing modes– Simple uniform instruction formats

8.5 The RISC/CISC Dichotomy

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Figure 8.5 Instruction format and hardware structure for URISC.

8.6 where to Draw the line -URISC