1

ECL electronics status and plan

Vladimir Zhulanov, Yury Usov BINP, Russia2009.07.07

Barrel electronics

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16 channels / shaper, FADC, pipeline, DSP on shaper board

12 DSP-shapers / collector

Shaper-DSP

3

The second version is ready and waits to be delivered.

Modifications:

1. ADC redesign2. Tantalum ceramic3. Supply 5 7.5, 12 154. Tail compensation for

FAM

4

Noise

Some PCB layout problem

Dynamic range

5

Good linearity

ECL-COLLECTOR

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SER/DESER

LVDS drivers, SCK, RCK

12 Shaper-DSPs

FPGAwith

embedded CPU

RocketIO

FINESSE

Flash memory 512 MByte

DDR2 memory 512 MByte

DAC

LVDS

TTD

PLL RCKSCK

calib

FAMClock

Ethernet

PC

Endcap electronics

• A faster preAmplifyer and shaper are needed for endcap with pure CsI.

• The new preAmplifyer design has been tested on beam with pure CsI. Noise is ~1000 e.

• The first prototype of the preAmplifyer will be ready in August.

• The Shaper (CAMAC version) with 30 ns shaping time was used in beam test.

• The new shaper design will be ready in Oct. 2009

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Status & plans

1. The design of Shaper-DSP is ready. The ADC problem must be solved in the second version of the Shaper-DSP.

2. The new FINESSE (with MGT) and ECL_COLLECTOR are needed to verify the whole data path.

3. The schematics of the ECL COLLECTOR is ready.

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Main goal: start mass production of Shaper-DSP in FY2010

Thank you

9

Waveform fitting

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response, counter

matrix, covariance

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ECL FINESSE

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Shaper-ADC and ECL FINESSE

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