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Enhancement of Hotspot Cooling With DiamondHeat Spreader on Cu Microchannel Heat

Sink for GaN-on-Si DeviceYong Han, Boon Long Lau, Xiaowu Zhang, Senior Member, IEEE, Yoke Choy Leong, and Kok Fah Choo

Abstract— The diamond heat spreader has been directlyattached between the test chip and the Cu microchannel heat sinkfor thermal performance enhancement of the GaN-on-Si device.In the fabricated test vehicle, the small heater is used to representone unit of transistor. Experimental tests have been conductedon the fabricated test vehicle to investigate the performance. Twotypes of simulation models have been constructed in COMSOL,considering the multiphysics features and temperature-dependentmaterial properties. The submodel in conjunction with the mainmodel is constructed to predict the thermal performance of theGaN-on-Si structure. The heating power, which is concentratedon eight tiny heaters of size 350 × 150 µm2, is varied from 10 to50 W. With the diamond heat spreader attached to the liquid-cooled microchannel heat sink, the maximum heater temperaturecan be reduced by 11.5%–22.9%, while the maximum gatetemperature can be reduced by 8.9%–18.5%. Consistent resultsfrom the experimental and simulation studies have verified theenhancement of the hotspot cooling capability using directlyattached diamond heat spreader.

Index Terms— Diamond heat spreader, electronic cooling, high-electron mobility transistor (HEMT), hotspot, microchannel heatsink.

I. INRODUCTION

AS MODERN electronic devices are becoming faster andincorporating more functions, they are simultaneously

shrinking in size and weight. These factors suggest significantincreases in the packaging densities and heat fluxes for theintegrated circuits. Effective thermal management will bethe key to ensuring that these devices perform well withefficiency and reliability [1]. The problem of heat removalis likely to become more severe due to the presence ofhotspot, which could lead to much higher heat flux thanthe average over the entire chip and make the temperaturedistribution highly nonuniform, thus diminishing the device This work was supported by the Science and Engineering Research Council,Agency for Science, Technology and Research, Singapore,under Grant1021740175.

Y. Han, B. L. Lau, and X. Zhang are with the Institute of Microelectronics,Agency for Science, Technology and Research, Singapore 117685 (e-mail:hany@ime.a-star.edu.sg; laubl@ime.a-star.edu.sg; xiaowu@ime.a-star.edu.sg).

Y. C. Leong is with DSO National Laboratories, Singapore 118230 (e-mail:lyokecho@dso.org.sg).

K. F. Choo is with Temasek Laboratories, Nanyang TechnologicalUniversity, Singapore 639798 (e-mail: kfchoo@ntu.edu.sg).

performance and adversely impacting reliability. As the heatdissipation concentrates on tiny gate fingers, the operationof the GaN high-electron mobility transistor (HEMT) postsa huge challenge to thermal management. Calame et al. [2]performed experimental studies on the GaN-on-SiC amplifiers,and 4 kW/cm2 heat flux was located on a 1.2 × 5 mm2

active area of the 5 × 5 mm2 die. Lee et al. [3] developeda Cu microchannel heat sink for the GaN-on-Si device, andmore than 10 kW/cm2 heat flux was concentrated on eightheat sources (each size 350 × 150 µm2) of a 7 × 7 mm2

Si die. The hotspot removal was also analyzed in [4], anda 500 × 500 µm2 hotspot area of a 1 × 1 cm2 die wasconsidered, and more than 1 kW/cm2 could be dissipated.

The microchannel heat sink can dissipate high heat fluxesanticipated in high-power electronic devices [5]. A large heattransfer coefficient can be achieved using the liquid-cooledmicrochannel [6]–[10]. In addition, the coolant can exchangeenergy effectively with multiple walls within the channel[11], [12]. Colgan et al. [13] presented a microchannel coolerand an optimized cooler fin for cooling very high powerchip, and 300 W/cm2 uniform heat flux was dissipated. Toreduce the thermal resistances through the key thermal path,the cooling solution directly attached to the chip was proposedin [14]. A cooling solution of high thermal conductivity willbe required to dissipate the concentrated high heat flux inthe chip [15]. The heat spreader tends to be significant inthe heat sink [16]–[19]. CVD diamond, having a thermalconductivity five times higher than Cu, can be utilized as theheat spreader for microelectronic cooling [20]–[23]. Rogacsand Rhee [24] conducted the numerical simulation to evaluatethe thermal effect of the diamond heat spreader for a smallheat source. Calame et al. [2] conducted the experimentaland simulation analysis on the hybrid microchannel coolerconsisting of diamond-on-Si or diamond-on-SiC, and betterperformances were exhibited than those of the Si or SiC alone.According to [25], a thin diamond heat spreader could enableabout 10%–20% decrease in the whole thermal resistance ofthe heat sink.

In this paper, a diamond heat spreader of similar size tothe test chip has been utilized to enhance the hotspot coolingcapability of the liquid-cooled Cu microchannel heat sink.The Si test chip, the diamond heat spreader, and the Cumicrochannel heat sink are directly bonded together, as shownin Fig. 1. The heater of tiny area is used to represent thegate finger heating area of the GaN transistor. Two types

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Fig. 1. Schematic image of the cooling structure with diamond heat spreaderand liquid-cooled Cu microchannel heat sink.

Fig. 2. Simplified layout of the GaN-on-Si PA.

of simulation models, main model of heater heating andsubmodel of gate finger heating, have been built to investigatethe thermal performance. The simulation results show greatagreement with the experimental results. The submodel isused in conjunction with the main model to predict thepeak temperature of the transistors under the gate areas.The diamond heat spreader is verified to enhance the heatsink performance by reducing the concentrated high heatflux. Better heat dissipation capability can be achieved usingthe directly attached diamond heat spreader for GaN-on-Sidevice.

II. EXPERIMENT

A top view of the typical GaN-on-Si power amplifier (PA) isshown schematically in Fig. 2. There are eight GaN transistorsin this configuration, and each transistor is composed of10 gate fingers of gate width WG, gate length LG, and gate-to-gate pitch PG. The HEMT structure, which is magnified in theinset of Fig. 2, consists of source (S), drain (D), and gate (G).During operation, the vast majority of the waste heat in theGaN PA is generated in the portion of each conductive channelthat lies directly beneath the gate finger. The Si substrate chipis considered in this paper, and eight GaN transistors covereight rectangular active regions on top of the die.

The experimental tests have been implemented on the Sithermal test chip of 7 × 7 mm2 size and 200 µm thickness,with eight tiny heaters evenly located in line, as shown inFig. 2. The size of each heater is 350 × 150 µm2, which is

Fig. 3. Image of (a) fabricated Cu microchannel heat sink and (b) wholebonded components. Inset: Si test chip and the diamond bonding interface.

a good approximation of an area of 10 gate fingers with150 µm WG, 0.25 µm LG, and 36 µm PG. The space betweeneach heating area is set to be the same as those of the transistorbanks of the GaN-on-Si device, which is 690 µm. The highlydoped n-type resistors are built on the thermal test chip asthe tiny heaters. The resistors are fabricated through a seriesof photolithography, etch, and implantation processes. Theresistivity measurement of the finished wafers shows goodconsistency within wafer and between wafers. Lau et al. [26]provided more details on the customized thermal test chipfabrication processes. The backside of the thermal test chip ismetalized with a thin Au/Sn layer (4–5 µm thick). The pureCu microchannel heat sink is fabricated with micromachiningprocess. The channel width, fin width, and channel depth aredesigned at 200 µm, 150 µm, and 1 mm, respectively. Thechannel length is set as 4mm, centered on the heat sink.Twenty-one microchannels are deployed only at the regionswhere heaters are present. The diamond heat spreader isprepared by microwave plasma chemical vapor deposition. Fortight bonding with the test chip and the heat sink, the diamondheat spreader is metalized with thin Ti/Pt/Au layer (totalthickness around 1 µm). The heat spreader is of a similar sizeas the test chip and 300 µm thick. The thermal conductivityof the diamond heat spreader at room temperature is largerthan 1800 W/mK, and may drop to around 1000 W/mK at200 °C. To assemble the test vehicle, all the components arebonded simultaneously using reflow process, in which the peaktemperature is around 230 °C. A 50 µm thick Au/Sn preformsolder was employed for heat sink bonding. The bonded die-to-heat spreader-to-heat sink structure is shown in Fig. 3(b).

After the fabrication and assembly, the thermal test chipwas wire bonded to the printed circuit board. The powerinput to the heaters on the test chip is controlled by adc power supplier. The experimental apparatus is shown inFig. 4. Water, as the coolant, from a reservoir tank is driventhrough the flow loop using a microgear pump. The inletwater and ambient temperatures are around 25 °C. This pumpforces the water through a 15 µm filter and a flow meterbefore it enters the microchannel heat sink. The differentialpressure transmitter is attached to the manifold to measurethe pressure drop. The test chip temperature at steady state

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Fig. 4. Image of (a) experimental test setup and (b) measurement setup usingIR camera.

Fig. 5. Image of the main model (the fluid part is in blue) with symmetryboundaries, and the finite element mesh.

is measured and recorded using the infrared (IR) camera.The minimum spatial resolution of the IR camera is 15 µm,and together with 640 × 512 pixel resolution. Prior to themeasurement, the test chip is coated with a thin layer ofmatt black paint, and the emissivity of the coated surface isestimated at 0.9. The temperature measurement uncertaintyis ±3.5%.

III. SIMULATION

Two types of simulation models are constructed usingCOMSOL Multiphysics that runs the finite element analysistogether with adaptive meshing and error control. The built-in fluid flow and heat transfer interfaces are used in themain model that couples both solid and fluid parts. Due tothe symmetries in the system, half of the thermal struc-ture with symmetrical boundary conditions is constructed toinvestigate the thermal and fluidic performance, as shownin Fig. 5.

The solution was tested for mesh independency by refiningthe mesh size. Velocities and temperatures matched within0.1% for both mesh sizes. The convergence criterion of thesolutions is 10−6. The viscous heating feature is consideredin the heat transfer interface. The no-slip boundary con-dition is applied to the stationary wall. The temperature-dependent thermal conductivities of Si and diamond areconsidered in the simulation, the expressions of which arekSi = 152 × (298/T )1.334 and kD = 1832 × (298/T )1.305,respectively. The thermal conductivities of the copper heatsink and Au/Sn solder are assumed to be constant, which are386.38 and 57 W/mK, respectively. The Au/Sn bonding layer

Fig. 6. Image of the submodel with symmetry boundaries, and the finiteelement mesh.

of thickness 5 µm is considered between Si and diamond.The model without and with heat spreader consists of around1.1 and 1.25 million tetrahedral elements, respectively. Theelement size of the fluid part is calibrated for fluid dynam-ics, while that of the solid part is calibrated for generalphysics. High heat fluxes are loaded only on the tiny heatingareas.

As to the GaN transistor, the heat-producing regions underthe gate fingers are much smaller than the chip, which makesit impractical to perform a single detailed simulation of theentire chip. A submodel has been constructed to predict thethermal performance of the actual GaN-on-Si device. One GaNtransistor, which is represented by one heater in the mainmodel, is considered in the submodel, consisting of 10 gatefingers, and each gate finger is of the size of 150 ×0.25 µm2.Once the thermal and fluidic performances are computed inthe main model, a submodel is used to estimate the peaktemperature of the GaN transistor.

For thermal studies, a number of assumptions were made tolimit the scope of the investigation. In the submodel, the activearea of one gate is fixed at 150 × 0.25 µm2, and all 10 gatefingers in one unit are built considering the heating influencesof the nearby gates. Within the submodel, a 2 µm thick GaNlayer of thermal conductivity kGaN = 141 × (298/T )1.211 isconsidered on top of the Si substrate. The thermal boundaryresistance is included between GaN and Si, and the value isassumed to be 3.3 × 10−8 m2 K/W [27]. The inside surfacesof the microchannel have been divided into several convectiveregions along the y direction. The average heat transfercoefficient of each surface in each region obtained from themain model will be applied to the submodel as the convectivecooling boundary. The length of the convective region in they direction is set to be 0.1 mm to reach the temperatures’match within 0.1%. The model with symmetry boundariesis constructed, as shown in Fig. 6. Only the solid parts areconsidered, and the heat transfer coefficient obtained fromthe main model is applied to the walls of the microchannel.The model without and with heat spreader consists of around1.07 and 1.16 million tetrahedral elements, respectively. Theelement size is calibrated for general physics.

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Fig. 7. Maximum heater temperature as a function of the total heating powerfor a cooling structure with and without a diamond heat spreader, from theexperimental tests and simulation analysis.

Fig. 8. Comparison of temperatures in the thermal test chip along the heatersbetween experimental tests and simulation analysis for different heating power.

IV. RESULTS AND DISCUSSION

The experimental tests are carried out by heating eight resis-tors simultaneously with 10–50 W total power (heat flux oneach heater: 2.38–11.9 kW/cm2), at the ambient temperature25 °C. The flow rate of the water across the microchannel heatsink in this test is set to be 400 mL/min, and the pressure dropbetween the inlet and the outlet is around 10 kPa. The loadingand environment conditions in the simulation are set accordingto the experimental tests, and temperature-dependent mate-rial properties are considered. Based on the estimated lowReynolds number in the heat sink with this flow rate, themicrochannel is considered to be operated in laminar regime.The steady state simulation is performed on the main model.The experimental and simulation results are shown in Fig. 7.

As shown in Fig. 7, excellent agreement has been obtainedbetween experimental results and simulation results. Heatedby the same power, the diamond heat spreader can enablearound 11.5% decrease in the maximum temperature of the testchip. With the attached heat spreader, 30, 40, and 50 W powercan be dissipated, while maintaining the maximum test chiptemperatures under 95 °C, 125 °C, and 160 °C, respectively.The temperature profiles in the longitudinal direction acrossall heaters are shown in Fig. 8.

With diamond heat spreader, for 50 W power, the maximumtemperature of each heater is similar, while without it, there isa 12 °C temperature difference between the heaters locatednear the center and those near the edge of the test chip.The results observed in Figs. 7 and 8 show that the perfor-mances can be accurately simulated using the main model.Further investigations have been performed based on thesimulation results, as shown in Figs. 9 and 10.

As shown in Fig. 9, lower temperature difference from thetest chip top to the heat sink top has been achieved usingthe diamond heat spreader. The heat spreading capability ishighly enhanced, and the additional temperature rise causedby the diamond heat spreader is only as small as around 2 °C.The temperature rise caused by the thin bonding layer betweenSi and diamond is less than 1.5 °C, which is not markedin Fig. 9(b). The heat flux on the top surface of the Cumicrochannel heat sink is quite small and more uniform for thecooling structure with diamond than the one without diamond.The results observed in Fig. 10 show that the maximumheat flux of model (a) is about 1.56 kW/cm2, while that ofmodel (b) is only about 0.35 kW/cm2, suggesting that theconcentrated heat flux has been reduced to 22.4% using thediamond heat spreader. The maximum thermal resistance ofthe whole cooling structure, which is related to the total powerand the maximum temperature of the cooling structure, canbe reduced by 45.2% with diamond for the hotspot thermalmanagement.

Based on the results from the main model simulation, thesubmodel in Fig. 6 is used to predict the thermal performanceof the test chip of tiny gate fingers. The interface conditionbetween the main model and the submodel is the equivalentconvective cooling surfaces on the microchannel walls. Theheat transfer coefficient of the Cu microchannel heat sinkis calculated using h = QW /(TW − Ta), where QW is theaverage heat flux, TW is the average channel wall temperature,and Ta is the average water temperature. In this paper, theheat transfer coefficient of the whole microchannel structureis around 5.8 × 104 W/m2K. For 50 W total power, eachGaN device will dissipate 6.25 W power, and the powerdensity is around 4.2 W/mm. The heat flux loaded on eachgate finger area will be as high as 1.67 MW/cm2. Theresults of the submodel simulation are shown in Fig. 11,which gives the temperature distribution across all gate fingers,compared with the representative heaters of the main model.The maximum gate temperature of structure (a) without dia-mond heat spreader is about 246.9 °C, while that of structure(b) with diamond heat spreader is about 224.8 °C. Around8.9% maximum gate temperature reduction is achieved. Thediamond heat spreader can enable highly decreased maximumheat flux at the top of the Cu microchannel heat sink, andenhances the heat dissipation capability of the liquid cooling.

With large concentrated heat flux, the heat transfer capa-bility of the chip can be quite significant in determiningthe thermal performance. By decreasing the thickness of theSi substrate, the thermal path from the active region tothe cooling structure will be shortened, and better thermalperformance can be achieved. The thermal test chip of 100 µmthickness was fabricated for further investigations. During the

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Fig. 9. Simulation temperature profile vertical across the structure for a model (a) without and (b) with heat spreader.

Fig. 10. Simulation heat flux distribution on the top surface of Cumicrochannel heat sink (a) without and (b) with heat spreader.

assembly process, the thin Si test chips cracked, while beingdirectly bonded with the Cu microchannel heat sink under thementioned reflow bonding conditions, due to the coefficientof thermal expansion mismatch. With diamond heat spreader,the thin test chip could be bonded with the cooling structure,and no crack was observed in the process. The experimentaland simulation results are shown in Fig. 12. For the structurewithout diamond heat spreader, only the simulation results areavailable for comparison.

As shown in Fig. 12, the diamond heat spreader can achievemuch better thermal performance, and the improvement ismore obvious compared with the results shown in Fig. 7.With 50 W total power, the diamond heat spreader can enable22.9% decrease of the maximum heater temperature of thetest chip. A power of 50 W can be dissipated by the cool-ing structure with diamond, while maintaining the maximumheater temperature under 140 °C. The submodel simulationis also performed on the thin test chip, and the results areshown in Fig. 13. The temperature profile of the main model isshown for comparison. To dissipate 50 W, the power density isaround 4.2 W/mm, around 18.5% maximum gate temperature

Fig. 11. Temperature profile (chip thickness 200 µm) in the longitudinaldirection across 10 gate fingers of structure (a) without diamond heat spreaderand (b) with diamond heat spreader.

decrease can be achieved, and the peak gate finger temperaturecan be maintained under 200 °C using the cooling solutionof the diamond heat spreader on Cu microchannel heat sink.Compared with the results shown in Fig. 11, by decreasingthe chip thickness from 200 to 100 µm, the maximum gatetemperature can be reduced by 3.9% in the structure withoutdiamond heat spreader, and 14% in the one with diamond heatspreader.

More simulations have been performed to investigatethe effect of the heat spreader thickness on the thermalperformance of the structure of 100 µm thick test chip.

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Fig. 12. Maximum test chip (100 µm thick) temperature as a function of thetotal power for cooling structure with and without a diamond heat spreaderfrom the experimental tests and simulation analysis.

Fig. 13. Temperature profile (chip thickness 100 µm) in the longitudinaldirection across 10 gate fingers of structure (a) without diamond heat spreaderand (b) with diamond heat spreader.

The thickness of the heat spreader is changed from 100 to500 µm. The variations of the maximum heater temperatureand the maximum heat flux at the top surface of the Cumicrochannel heat sink are analyzed, as shown in Fig. 14. Byincreasing the thickness of the heat spreader, the reduced tem-perature and heat flux can be achieved. The heat spreader usedin the tests is 300 µm thick, and the thermal performance canbe slightly improved by increasing the thickness to 500 µm.The effect is more sensitive by increasing the thickness from100 to 300 µm, where the maximum heater temperature and

Fig. 14. Effect of the heat spreader thickness on the thermal performanceof the structure.

the heat flux can be reduced by around 5.1% and 6.3%,respectively. The results of the submodel simulation are similarto the main model simulation. By increasing the diamondthickness from 100 to 300 µm, the maximum gate temperaturecan be reduced by around 3.9%, while the gate temperaturedecrease from 300 to 500 µm is negligible.

V. CONCLUSION

The diamond heat spreader has been bonded together withthe Si test chip and the Cu microchannel heat sink for thermalperformance improvement. In the fabricated test vehicle, aheater of size 350 × 150 µm2 is used to represent oneGaN transistor of 10 gate fingers. High heat flux, from 2.38to 11.9 kW/cm2, is concentrated on the heater area in thethermal test chip. Both experimental tests and numerical sim-ulations have been performed to investigate the performances,and consistent results have been obtained. The submodel inconjunction with the main model is constructed to predictthe thermal performance of the GaN-on-Si structure. Themaximum temperature of the test chip can be highly reducedusing the diamond heat spreader, suggesting more power canbe dissipated. For the chip of 100 µm thickness, the dia-mond heat spreader can enable 22.9% maximum temperaturedecrease for the heater and 18.5% for the gate. A powerof 50 W can be dissipated by the cooling structure withdiamond, while maintaining the maximum heater temperatureunder 140 °C and the maximum gate finger temperature under200 °C. This directly attached diamond heat spreader is ver-ified to enhance the liquid-cooled Cu microchannel heat sinkperformance by effectively spreading the concentrated highheat flux.

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Yong Han received the B.S. degree in electronicand information engineering from Shanxi University,Taiyuan, China, and the Ph.D. degree in electronicscience and technology from the Institute of Elec-tronics of Chinese Academy of Sciences (IECAS),Beijing, China, in 2004 and 2009, respectively.

He was an Assistant Researcher with the KeyLaboratory of High Power Microwave Sources andTechnologies, IECAS, after graduation. From 2011to 2012, he was a Research Associate with theInstitute for Research in Electronics and Applied

Physics, University of Maryland, College Park, MD, USA. Since 2012, he hasbeen a Research Scientist with the Institute of Microelectronics, Agency forScience, Technology and Research, Singapore. His scientific research focusedon the thermal, mechanical, and electromagnetic design and improvementof the electronic systems. His research concerns the theory and the designof the microwave and millimeter-wave sources, and thermal management ofthe high-power electronic devices. His current research interests include thecomputational modeling and thermal analysis, advanced microelectric systempackaging development, and electric cooling solutions.

Boon Long Lau received the B.S. degree fromthe National University of Singapore, Singapore,in 2005.

He was with STMicroelectronics, Singapore,where he was involved in process engineering aftergraduation. Since 2012, he has been with theInstitute of Microelectronics, Agency for Science,Technology and Research, Singapore. His currentresearch interests include microchannel and through-silicon-via process integration

Xiaowu Zhang (SM’10) received the B.S. degreein physics from the National University of DefenseTechnology, Changsha, China, the M.E. degree inmechanics from the University of Science and Tech-nology of China, Hefei, China, and the Ph.D. degreein mechanical engineering from the Hong KongUniversity of Science and Technology, Hong Kong,in 1986, 1989, and 1999, respectively.

He was a Lecturer with the Ballistic ResearchLaboratory of China, East China Institute of Tech-nology, Nanjing, China, from 1989 to 1995. He

has been with the Institute of Microelectronics (IME), Agency for Science,Technology and Research, Singapore, since 1999. He is currently a PrincipalInvestigator with the Interconnection and Advanced Packaging Program, IME.He has authored and co-authored more than 120 technical papers in refereedjournals and conference proceedings. His current research interests includecomputational modeling and stress analysis, design for reliability, stresssensors, impact dynamics, advanced integrated circuit (IC) and microsystemspackaging development, and 3-D IC integration with through-silicon-viatechnology.

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Yoke Choy Leong received the B.Eng. (Hons.)and M.Sc. degrees from the National University ofSingapore, Singapore, and the Ph.D. degree from theUniversity of Massachusetts at Amherst, Amherst,MA, USA, in 1991, 1995, and 2000, respectively.

He has been with DSO National Laborato-ries, Singapore, since 1991, where he is involvedin the area of microwave component and sys-tem design. His current research interests includemicrowave/monolithic microwave integrated circuitdesign and modeling, analysis, and synthesis of

novel passive structures.

Kok Fah Choo received the B.Sc. (Hons.) degree inmechanical engineering from Nanyang Technologi-cal University (NTU), Singapore, in 1991.

He was with DSO National Laboratories from1986 to 2002, progressing from a Technical Officerto a Principal Member of Technical Staff and a Lab-oratory Head. Prior to joining Temasek Laboratoriesat NTU, he was a Product Development Manager atD’Crypt Pte. Ltd., Singapore, where he was involvedin the development of their cryptographic prod-ucts and handling project and product management

issues. He also concurrently managed operations at NuovoWave Pte. Ltd.,Singapore—a subsidiary of D’Crypt. He joined Temasek Laboratories in 2006.In addition to managing research and development projects at DSO, he alsospecializes in thermal design and analysis, and electronics packaging (modulelevel). He is a co-inventor of a U.S. Patent. His current research interestsinclude electronic cooling and packaging, in particular, high-heat dissipatingdevices.