1 Fundamentals of Microelectronics II CH9 Cascode Stages and Current Mirrors CH10 Differential...

1

Fundamentals of Microelectronics II

CH9 Cascode Stages and Current Mirrors CH10 Differential Amplifiers CH11 Frequency Response CH12 Feedback

2

Chapter 9 Cascode Stages and Current Mirrors

9.1 Cascode Stage

9.2 Current Mirrors

CH 9 Cascode Stages and Current Mirrors 3

Boosted Output Impedances

SOSmout

EOEmout

RrRgR

rRrrRgR

1

||||1

2

1


Bipolar Cascode Stage

1211

12112

||

||)]||(1[

rrrgR

rrrrrgR

OOmout

OOOmout


Maximum Bipolar Cascode Output Impedance

The maximum output impedance of a bipolar cascode is bounded by the ever-present r between emitter and ground of Q1.

11max,

11max, 1

Oout

Omout

rR

rrgR


Example: Output Impedance

Typically r is smaller than rO, so in general it is impossible to double the output impedance by degenerating Q2 with a resistor.

21

122

O

OoutA rr

rrR


PNP Cascode Stage

1211

12112

||

||)]||(1[

rrrgR

rrrrrgR

OOmout

OOOmout


Another Interpretation of Bipolar Cascode

Instead of treating cascode as Q2 degenerating Q1, we can also think of it as Q1 stacking on top of Q2 (current source) to boost Q2’s output impedance.


False Cascodes

When the emitter of Q1 is connected to the emitter of Q2, it’s no longer a cascode since Q2 becomes a diode-connected device instead of a current source.

12

12

1

122

1122

1

21

1

||||1

||||1

1

Om

Om

mout

Om

OOm

mout

rg

rg

gR

rrg

rrrg

gR


MOS Cascode Stage

211

21211

OOmout

OOOmout

rrgR

rrrgR


Another Interpretation of MOS Cascode

Similar to its bipolar counterpart, MOS cascode can be thought of as stacking a transistor on top of a current source.

Unlike bipolar cascode, the output impedance is not limited by .


PMOS Cascode Stage

211

21211

OOmout

OOOmout

rrgR

rrrgR


Example: Parasitic Resistance

RP will lower the output impedance, since its parallel combination with rO1 will always be lower than rO1.

2121 )||)(1( OPOOmout rRrrgR


Short-Circuit Transconductance

The short-circuit transconductance of a circuit measures its strength in converting input voltage to output current.

0

outvin

outm v

iG


Transconductance Example

1mm gG


Derivation of Voltage Gain

By representing a linear circuit with its Norton equivalent, the relationship between Vout and Vin can be expressed by the product of Gm and Rout.

outminout

outinmoutoutout

RGvv

RvGRiv


Example: Voltage Gain

11 Omv rgA


Comparison between Bipolar Cascode and CE Stage

Since the output impedance of bipolar cascode is higher than that of the CE stage, we would expect its voltage gain to be higher as well.


Voltage Gain of Bipolar Cascode Amplifier

Since rO is much larger than 1/gm, most of IC,Q1 flows into the diode-connected Q2. Using Rout as before, AV is easily calculated.

)||( 21111

1

rrgrgA

gG

OmOmv

mm


Alternate View of Cascode Amplifier

A bipolar cascode amplifier is also a CE stage in series with a CB stage.


Practical Cascode Stage

Since no current source can be ideal, the output impedance drops.

)||(|| 21223 rrrgrR OOmOout


Improved Cascode Stage

In order to preserve the high output impedance, a cascode PNP current source is used.

)||(||)||( 21223433 rrrgrrrgR OOmOOmout


MOS Cascode Amplifier

2211

21221 )1(

OmOmv

OOOmmv

outmv

rgrgA

rrrggA

RGA


Improved MOS Cascode Amplifier

Similar to its bipolar counterpart, the output impedance of a MOS cascode amplifier can be improved by using a PMOS cascode current source.

oponout

OOmop

OOmon

RRR

rrgR

rrgR

||

433

122


Temperature and Supply Dependence of Bias Current

Since VT, IS, n, and VTH all depend on temperature, I1 for both bipolar and MOS depends on temperature and supply.

2

21

21

1212

2

1

)ln()(

THDDoxn

STCC

VVRR

R

L

WCI

IIVRRVR


Concept of Current Mirror

The motivation behind a current mirror is to sense the current from a “golden current source” and duplicate this “golden current” to other locations.


Bipolar Current Mirror Circuitry

The diode-connected QREF produces an output voltage V1

that forces Icopy1 = IREF, if Q1 = QREF.

REFREFS

Scopy I

I

II

,

1


Bad Current Mirror Example I

Without shorting the collector and base of QREF together, there will not be a path for the base currents to flow, therefore, Icopy is zero.


Bad Current Mirror Example II

Although a path for base currents exists, this technique of biasing is no better than resistive divider.


Multiple Copies of IREF

Multiple copies of IREF can be generated at different locations by simply applying the idea of current mirror to more transistors.

REFREFS

jSjcopy I

I

II

,

,,


Current Scaling

By scaling the emitter area of Qj n times with respect to QREF, Icopy,j is also n times larger than IREF. This is equivalent to placing n unit-size transistors in parallel.

REFjcopy nII ,


Example: Scaled Current


Fractional Scaling

A fraction of IREF can be created on Q1 by scaling up the emitter area of QREF.

REFcopy II3

1


Example: Different Mirroring Ratio

Using the idea of current scaling and fractional scaling, Icopy2 is 0.5mA and Icopy1 is 0.05mA respectively. All coming from a source of 0.2mA.


Mirroring Error Due to Base Currents

111

n

nII REFcopy


Improved Mirroring Accuracy

Because of QF, the base currents of QREF and Q1 are mostly supplied by QF rather than IREF. Mirroring error is reduced times.

111

2

n

nII REFcopy


Example: Different Mirroring Ratio Accuracy

2

2

2

1

154

10

154

REFcopy

REFcopy

II

II


PNP Current Mirror

PNP current mirror is used as a current source load to an NPN amplifier stage.


Generation of IREF for PNP Current Mirror


Example: Current Mirror with Discrete Devices

Let QREF and Q1 be discrete NPN devices. IREF and Icopy1 can vary in large magnitude due to IS mismatch.


MOS Current Mirror

The same concept of current mirror can be applied to MOS transistors as well.


Bad MOS Current Mirror Example

This is not a current mirror since the relationship between VX and IREF is not clearly defined.

The only way to clearly define VX with IREF is to use a diode-connected MOS since it provides square-law I-V relationship.


Example: Current Scaling

Similar to their bipolar counterpart, MOS current mirrors can also scale IREF up or down (I1 = 0.2mA, I2 = 0.5mA).


CMOS Current Mirror

The idea of combining NMOS and PMOS to produce CMOS current mirror is shown above.

45

Chapter 10 Differential Amplifiers

10.1 General Considerations

10.2 Bipolar Differential Pair

10.3 MOS Differential Pair

10.4 Cascode Differential Amplifiers

10.5 Common-Mode Rejection

10.6 Differential Pair with Active Load

CH 10 Differential Amplifiers 46

Audio Amplifier Example

An audio amplifier is constructed above that takes on a rectified AC voltage as its supply and amplifies an audio signal from a microphone.


“Humming” Noise in Audio Amplifier Example

However, VCC contains a ripple from rectification that leaks to the output and is perceived as a “humming” noise by the user.


Supply Ripple Rejection

Since both node X and Y contain the ripple, their difference will be free of ripple.

invYX

rY

rinvX

vAvv

vv

vvAv


Ripple-Free Differential Output

Since the signal is taken as a difference between two nodes, an amplifier that senses differential signals is needed.


Common Inputs to Differential Amplifier

Signals cannot be applied in phase to the inputs of a differential amplifier, since the outputs will also be in phase, producing zero differential output.

0

YX

rinvY

rinvX

vv

vvAv

vvAv


Differential Inputs to Differential Amplifier

When the inputs are applied differentially, the outputs are 180° out of phase; enhancing each other when sensed differentially.

invYX

rinvY

rinvX

vAvv

vvAv

vvAv

2


Differential Signals

A pair of differential signals can be generated, among other ways, by a transformer.

Differential signals have the property that they share the same average value to ground and are equal in magnitude but opposite in phase.


Single-ended vs. Differential Signals


Differential Pair

With the addition of a tail current, the circuits above operate as an elegant, yet robust differential pair.


Common-Mode Response

2

221

21

EECCCYX

EECC

BEBE

IRVVV

III

VV


Common-Mode Rejection

Due to the fixed tail current source, the input common-mode value can vary without changing the output common-mode value.


Differential Response I

CCY

EECCCX

C

EEC

VV

IRVV

I

II

02

1


Differential Response II

CCX

EECCCY

C

EEC

VV

IRVV

I

II

01

2


Differential Pair Characteristics

None-zero differential input produces variations in output currents and voltages, whereas common-mode input produces no variations.


Small-Signal Analysis

Since the input to Q1 and Q2 rises and falls by the same amount, and their bases are tied together, the rise in IC1 has the same magnitude as the fall in IC2.

II

I

II

I

EEC

EEC

2

2

2

1


Virtual Ground

For small changes at inputs, the gm’s are the same, and the respective increase and decrease of IC1 and IC2 are the same, node P must stay constant to accommodate these changes. Therefore, node P can be viewed as AC ground.

VgI

VgI

V

mC

mC

P

2

1

0


Small-Signal Differential Gain

Since the output changes by -2gmVRC and input by 2V, the small signal gain is –gmRC, similar to that of the CE stage. However, to obtain same gain as the CE stage, power dissipation is doubled.

CmCm

v RgV

VRgA

2

2


Large Signal Analysis

T

inin

EEC

T

inin

T

ininEE

C

V

VVI

I

V

VVV

VVI

I

212

21

21

1

exp1

exp1

exp


Input/Output Characteristics

T

ininEEC

outout

V

VVIR

VV

2tanh 21

21


Linear/Nonlinear Regions

The left column operates in linear region, whereas the right column operates in nonlinear region.


Small-Signal Model


Half Circuits

Since VP is grounded, we can treat the differential pair as two CE “half circuits”, with its gain equal to one half circuit’s single-ended gain.

Cminin

outout Rgvv

vv

21

21


Example: Differential Gain

Ominin

outout rgvv

vv

21

21


Extension of Virtual Ground

It can be shown that if R1 = R2, and points A and B go up and down by the same amount respectively, VX does not move.

0XV


Half Circuit Example I

1311 |||| RrrgA OOmv


Half Circuit Example II

1311 |||| RrrgA OOmv


Half Circuit Example III

mE

Cv

gR

RA

1


Half Circuit Example IV

m

E

Cv

g

RR

A1

2


MOS Differential Pair’s Common-Mode Response

Similar to its bipolar counterpart, MOS differential pair produces zero differential output as VCM changes.

2SS

DDDYX

IRVVV


Equilibrium Overdrive Voltage

The equilibrium overdrive voltage is defined as the overdrive voltage seen by M1 and M2 when both of them carry a current of ISS/2.

L

WC

IVV

oxn

SSequilTHGS


Minimum Common-mode Output Voltage

In order to maintain M1 and M2 in saturation, the common-mode output voltage cannot fall below the value above.

This value usually limits voltage gain.

THCMSS

DDD VVI

RV 2


Differential Response


Small-Signal Response

Similar to its bipolar counterpart, the MOS differential pair exhibits the same virtual ground node and small signal gain.

Dmv

P

RgA

V

0


Power and Gain Tradeoff

In order to obtain the source gain as a CS stage, a MOS differential pair must dissipate twice the amount of current. This power and gain tradeoff is also echoed in its bipolar counterpart.


MOS Differential Pair’s Large-Signal Response

221121

4

2

12 inin

oxn

SSinoxnDD VV

L

WC

IVV

L

WCII

in


Maximum Differential Input Voltage

There exists a finite differential input voltage that completely steers the tail current from one transistor to the other. This value is known as the maximum differential input voltage.

equilTHGSinin VVVV 2max21


Contrast Between MOS and Bipolar Differential Pairs

In a MOS differential pair, there exists a finite differential input voltage to completely switch the current from one transistor to the other, whereas, in a bipolar pair that voltage is infinite.

MOS Bipolar


The effects of Doubling the Tail Current

Since ISS is doubled and W/L is unchanged, the equilibrium overdrive voltage for each transistor must increase by to accommodate this change, thus Vin,max increases by as well. Moreover, since ISS is doubled, the differential output swing will double.

22


The effects of Doubling W/L

Since W/L is doubled and the tail current remains unchanged, the equilibrium overdrive voltage will be lowered by to accommodate this change, thus Vin,max

will be lowered by as well. Moreover, the differential output swing will remain unchanged since neither ISS nor RD has changed

22


Small-Signal Analysis of MOS Differential Pair

When the input differential signal is small compared to 4ISS/nCox(W/L), the output differential current is linearly proportional to it, and small-signal model can be applied.

212121

4

2

1ininSSoxn

oxn

SSininoxnDD VVI

L

WC

L

WC

IVV

L

WCII


Virtual Ground and Half Circuit

Applying the same analysis as the bipolar case, we will arrive at the same conclusion that node P will not move for small input signals and the concept of half circuit can be used to calculate the gain.

Cmv

P

RgA

V

0


MOS Differential Pair Half Circuit Example I

133

1 ||||1

0

OOm

mv rrg

gA


MOS Differential Pair Half Circuit Example II

3

1

0

m

mv g

gA


MOS Differential Pair Half Circuit Example III

mSS

DDv gR

RA

12

2

0


Bipolar Cascode Differential Pair

133131 || OOOmmv rrrrggA


Bipolar Telescopic Cascode

)||(|||| 575531331 rrrgrrrggA OOmOOmmv


Example: Bipolar Telescopic Parasitic Resistance

opOOmmv

OOmOop

RrrrggA

Rrr

RrrgrR

||)||(

2||||

2||||1

31331

157

15755


MOS Cascode Differential Pair

1331 OmOmv rgrgA


MOS Telescopic Cascode

)(|| 7551331 OOmOOmmv rrgrrggA


Example: MOS Telescopic Parasitic Resistance

)||(

]1[||

1331

77515

OmOopmv

OOmOop

rgrRgA

rrgRrR


Effect of Finite Tail Impedance

If the tail current source is not ideal, then when a input CM voltage is applied, the currents in Q1 and Q2 and hence output CM voltage will change.

mEE

C

CMin

CMout

gR

R

V

V

2/1

2/

,

,


Input CM Noise with Ideal Tail Current


Input CM Noise with Non-ideal Tail Current


Comparison

As it can be seen, the differential output voltages for both cases are the same. So for small input CM noise, the differential pair is not affected.


CM to DM Conversion, ACM-DM

If finite tail impedance and asymmetry are both present, then the differential output signal will contain a portion of input common-mode signal.

EEm

D

CM

out

Rg

R

V

V

2/1


Example: ACM-DM

3133131

||)]||(1[21

rRrrRgg

R

A

Omm

C

DMCM


CMRR

CMRR defines the ratio of wanted amplified differential input signal to unwanted converted input common-mode noise that appears at the output.

DMCM

DM

A

ACMRR


Differential to Single-ended Conversion

Many circuits require a differential to single-ended conversion, however, the above topology is not very good.


Supply Noise Corruption

The most critical drawback of this topology is supply noise corruption, since no common-mode cancellation mechanism exists. Also, we lose half of the signal.


Better Alternative

This circuit topology performs differential to single-ended conversion with no loss of gain.


Active Load

With current mirror used as the load, the signal current produced by the Q1 can be replicated onto Q4.

This type of load is different from the conventional “static load” and is known as an “active load”.


Differential Pair with Active Load

The input differential pair decreases the current drawn from RL by I and the active load pushes an extra I into RL by current mirror action; these effects enhance each other.


Active Load vs. Static Load

The load on the left responds to the input signal and enhances the single-ended output, whereas the load on the right does not.


MOS Differential Pair with Active Load

Similar to its bipolar counterpart, MOS differential pair can also use active load to enhance its single-ended output.


Asymmetric Differential Pair

Because of the vastly different resistance magnitude at the drains of M1 and M2, the voltage swings at these two nodes are different and therefore node P cannot be viewed as a virtual ground.


Thevenin Equivalent of the Input Pair

oNThev

ininoNmNThev

rR

vvrgv

2

)( 21


Simplified Differential Pair with Active Load

)||(21

OPONmNinin

out rrgvv

v


I

A

Proof of VA << Vout

OPmP

outA rg

vv

2

AmO

out vgr

vI 4

4


Chapter 11 Frequency Response

11.1 Fundamental Concepts 11.2 High-Frequency Models of Transistors 11.3 Analysis Procedure 11.4 Frequency Response of CE and CS Stages 11.5 Frequency Response of CB and CG Stages 11.6 Frequency Response of Followers 11.7 Frequency Response of Cascode Stage 11.8 Frequency Response of Differential Pairs 11.9 Additional Examples

114


Chapter Outline

CH 11 Frequency Response 115

CH 10 Differential Amplifiers 116CH 11 Frequency Response 116

High Frequency Roll-off of Amplifier

As frequency of operation increases, the gain of amplifier decreases. This chapter analyzes this problem.


Example: Human Voice I

Natural human voice spans a frequency range from 20Hz to 20KHz, however conventional telephone system passes frequencies from 400Hz to 3.5KHz. Therefore phone conversation differs from face-to-face conversation.


Natural Voice Telephone System


Example: Human Voice II


Mouth RecorderAir

Mouth EarAir

Skull

Path traveled by the human voice to the voice recorder

Path traveled by the human voice to the human ear

Since the paths are different, the results will also be different.


Example: Video Signal

Video signals without sufficient bandwidth become fuzzy as they fail to abruptly change the contrast of pictures from complete white into complete black.


High Bandwidth Low Bandwidth


Gain Roll-off: Simple Low-pass Filter

In this simple example, as frequency increases the impedance of C1 decreases and the voltage divider consists of C1 and R1 attenuates Vin to a greater extent at the output.



Gain Roll-off: Common Source

The capacitive load, CL, is the culprit for gain roll-off since at high frequency, it will “steal” away some signal current and shunt it to ground.

1||out m in D

L

V g V RC s


Frequency Response of the CS Stage

At low frequency, the capacitor is effectively open and the gain is flat. As frequency increases, the capacitor tends to a short and the gain starts to decrease. A special frequency is ω=1/(RDCL), where the gain drops by 3dB.

1222

LD

Dm

in

out

CR

Rg

V

V


Example: Figure of Merit

This metric quantifies a circuit’s gain, bandwidth, and power dissipation. In the bipolar case, low temperature, supply, and load capacitance mark a superior figure of merit.

LCCT CVVMOF

1...


Example: Relationship between Frequency Response and Step Response


2 2 21 1

1

1H s j

R C

0

1 1

1 expoutt

V t V u tR C

The relationship is such that as R1C1 increases, the bandwidth drops and the step response becomes slower.


Bode Plot

When we hit a zero, ωzj, the Bode magnitude rises with a slope of +20dB/dec.

When we hit a pole, ωpj, the Bode magnitude falls with a slope of -20dB/dec

21

210

11

11

)(

pp

zz

ss

ss

AsH


Example: Bode Plot

The circuit only has one pole (no zero) at 1/(RDCL), so the slope drops from 0 to -20dB/dec as we pass ωp1.

LDp CR

11


Pole Identification Example I

inSp CR

11

LDp CR

12

22

221

2 11 pp

Dm

in

out Rg

V

V


Pole Identification Example II

inm

S

p

Cg

R

1||

11

LDp CR

12


Circuit with Floating Capacitor

The pole of a circuit is computed by finding the effective resistance and capacitance from a node to GROUND.

The circuit above creates a problem since neither terminal of CF is grounded.


Miller’s Theorem

If Av is the gain from node 1 to 2, then a floating impedance ZF can be converted to two grounded impedances Z1 and Z2.

v

F

A

ZZ

11v

F

A

ZZ

/112


Miller Multiplication

With Miller’s theorem, we can separate the floating capacitor. However, the input capacitor is larger than the original floating capacitor. We call this Miller multiplication.


Example: Miller Theorem

FDmSin CRgR

1

1F

DmD

out

CRg

R

1

1

1


High-Pass Filter Response

121

21

21

11

CR

CR

V

V

in

out

The voltage division between a resistor and a capacitor can be configured such that the gain at low frequency is reduced.



Example: Audio Amplifier

nFCi 6.79 nFCL 8.39

In order to successfully pass audio band frequencies (20 Hz-20 KHz), large input and output capacitances are needed.

200/1

100

m

i

g

KR



Capacitive Coupling vs. Direct Coupling

Capacitive coupling, also known as AC coupling, passes AC signals from Y to X while blocking DC contents.

This technique allows independent bias conditions between stages. Direct coupling does not.

Capacitive Coupling Direct Coupling



Typical Frequency Response

Lower Corner Upper Corner



High-Frequency Bipolar Model

At high frequency, capacitive effects come into play. Cb

represents the base charge, whereas C and Cje are the junction capacitances.

b jeC C C


High-Frequency Model of Integrated Bipolar Transistor

Since an integrated bipolar circuit is fabricated on top of a substrate, another junction capacitance exists between the collector and substrate, namely CCS.


Example: Capacitance Identification


MOS Intrinsic Capacitances

For a MOS, there exist oxide capacitance from gate to channel, junction capacitances from source/drain to substrate, and overlap capacitance from gate to source/drain.


Gate Oxide Capacitance Partition and Full Model

The gate oxide capacitance is often partitioned between source and drain. In saturation, C2 ~ Cgate, and C1 ~ 0. They are in parallel with the overlap capacitance to form CGS and CGD.


Example: Capacitance Identification


Transit Frequency

Transit frequency, fT, is defined as the frequency where the current gain from input to output drops to 1.

C

gf mT 2

GS

mT C

gf 2


Example: Transit Frequency Calculation

THGSn

T VVL

f 22

32

GHzf

sVcm

mVVV

nmL

T

n

THGS

226

)./(400

100

65

2



Analysis Summary

The frequency response refers to the magnitude of the transfer function.

Bode’s approximation simplifies the plotting of the frequency response if poles and zeros are known.

In general, it is possible to associate a pole with each node in the signal path.

Miller’s theorem helps to decompose floating capacitors into grounded elements.

Bipolar and MOS devices exhibit various capacitances that limit the speed of circuits.



High Frequency Circuit Analysis Procedure

Determine which capacitor impact the low-frequency region of the response and calculate the low-frequency pole (neglect transistor capacitance).

Calculate the midband gain by replacing the capacitors with short circuits (neglect transistor capacitance).

Include transistor capacitances. Merge capacitors connected to AC grounds and omit those

that play no role in the circuit. Determine the high-frequency poles and zeros. Plot the frequency response using Bode’s rules or exact

analysis.



Frequency Response of CS Stagewith Bypassed Degeneration

1

1

SmbS

bSDm

X

out

RgsCR

sCRRgs

V

V

In order to increase the midband gain, a capacitor Cb is placed in parallel with Rs.

The pole frequency must be well below the lowest signal frequency to avoid the effect of degeneration.



Unified Model for CE and CS Stages


Unified Model Using Miller’s Theorem


Example: CE Stage

fFC

fFC

fFC

mAI

R

CS

C

S

30

20

100

100

1

200

GHz

MHz

outp

inp

59.12

5162

,

,

The input pole is the bottleneck for speed.



Example: Half Width CS Stage

XW 2

22

12

1

221

2

1

,

,

XY

Lm

outL

outp

XYLminS

inp

CRg

CR

CRgCR



Direct Analysis of CE and CS Stages

Direct analysis yields different pole locations and an extra zero.

outinXYoutXYinLThev

outXYLinThevThevXYLmp

outXYLinThevThevXYLmp

XY

mz

CCCCCCRR

CCRCRRCRg

CCRCRRCRg

C

g

1||

1

1||

||

2

1


Example: CE and CS Direct Analysis

outinXYoutXYinOOS

outXYOOinSSXYOOmp

outXYOOinSSXYOOmp

CCCCCCrrR

CCrrCRRCrrg

CCrrCRRCrrg

21

212112

212111

||

)(||||1

)(||||1

1


Example: Comparison Between Different Methods

MHz

MHz

outp

inp

4282

5712

,

,

GHz

MHz

outp

inp

53.42

2642

,

,

GHz

MHz

outp

inp

79.42

2492

,

,

KR

g

fFC

fFC

fFC

R

L

m

DB

GD

GS

S

2

0

150

100

80

250

200

1

Miller’s Exact Dominant Pole



Input Impedance of CE and CS Stages

rsCRgC

ZCm

in ||1

1

sCRgC

ZGDDmGS

in

1

1


Low Frequency Response of CB and CG Stages

miSm

iCm

in

out

gsCRg

sCRgs

V

V

1

As with CE and CS stages, the use of capacitive coupling leads to low-frequency roll-off in CB and CG stages (although a CB stage is shown above, a CG stage is similar).



Frequency Response of CB Stage

Xm

S

Xp

Cg

R

1||

1,

CCX

YLYp CR

1,

CSY CCC Or


Frequency Response of CG Stage

OrX

mS

Xp

Cg

R

1||

1,

SBGSX CCC

YLYp CR

1,

DBGDY CCC

Similar to a CB stage, the input pole is on the order of fT, so rarely a speed bottleneck.

Or


Example: CG Stage Pole Identification

111

,1

||

1

GDSBm

S

Xp

CCg

R

22112

, 11

DBGSGDDBm

Yp

CCCCg


Example: Frequency Response of CG Stage

KR

g

fFC

fFC

fFC

R

d

m

DB

GD

GS

S

2

0

150

100

80

250

200

1

MHz

GHz

Yp

Xp

4422

31.52

,

,



Emitter and Source Followers

The following will discuss the frequency response of emitter and source followers using direct analysis.

Emitter follower is treated first and source follower is derived easily by allowing r to go to infinity.


Direct Analysis of Emitter Follower

1

1

2

bsas

sg

C

V

V m

in

out

m

LS

mS

LLm

S

g

C

r

R

g

CCRb

CCCCCCg

Ra

1


Direct Analysis of Source Follower Stage

1

1

2

bsas

sg

C

V

V m

GS

in

out

m

SBGDGDS

SBGSSBGDGSGDm

S

g

CCCRb

CCCCCCg

Ra


Example: Frequency Response of Source Follower

0

150

100

80

250

100

200

1

m

DB

GD

GS

L

S

g

fFC

fFC

fFC

fFC

R

GHzjGHz

GHzjGHz

p

p

57.279.12

57.279.12

2

1



Example: Source Follower

1

1

2

bsas

sg

C

V

V m

GS

in

out

1

22111

22111111

))((

m

DBGDSBGDGDS

DBGDSBGSGDGSGDm

S

g

CCCCCRb

CCCCCCCg

Ra


Input Capacitance of Emitter/Source Follower

Lm

GSGDin Rg

CCCCC

1

//

Or


Example: Source Follower Input Capacitance

1211

1 ||1

1GS

OOmGDin C

rrgCC


Output Impedance of Emitter Follower

1

sCr

RrsCrR

I

V SS

X

X


Output Impedance of Source Follower

mGS

GSS

X

X

gsC

sCR

I

V

1


Active Inductor

The plot above shows the output impedance of emitter and source followers. Since a follower’s primary duty is to lower the driving impedance (RS>1/gm), the “active inductor” characteristic on the right is usually observed.


Example: Output Impedance

33

321 1||

mGS

GSOO

X

X

gsC

sCrr

I

V

Or


Frequency Response of Cascode Stage

For cascode stages, there are three poles and Miller multiplication is smaller than in the CE/CS stage.

12

1,

m

mXYv g

gA

XYx CC 2


Poles of Bipolar Cascode

111, 2||

1

CCrRS

Xp 121

2

,

21

1

CCC

g CSm

Yp

22,

1

CCR CSL

outp


Poles of MOS Cascode

12

11

,

1

1

GDm

mGSS

Xp

Cg

gCR

11

221

2

,

11

1

GDm

mGSDB

m

Yp

Cg

gCC

g

22,

1

GDDBLoutp CCR


Example: Frequency Response of Cascode

KR

g

fFC

fFC

fFC

R

L

m

DB

GD

GS

S

2

0

150

100

80

250

200

1

MHz

GHz

GHz

outp

Yp

Xp

4422

73.12

95.12

,

,

,



MOS Cascode Example

12

11

,

1

1

GDm

mGSS

Xp

Cg

gCR

3311

221

2

,

11

1

DBGDGDm

mGSDB

m

Yp

CCCg

gCC

g

22,

1

GDDBLoutp CCR


I/O Impedance of Bipolar Cascode

sCCrZ in

111 2

1||

sCCRZ

CSLout

22

1||


I/O Impedance of MOS Cascode

sCg

gC

Z

GDm

mGS

in

12

11 1

1

sCCRZ

DBGDLout

22

1||


Bipolar Differential Pair Frequency Response

Since bipolar differential pair can be analyzed using half-circuit, its transfer function, I/O impedances, locations of poles/zeros are the same as that of the half circuit’s.

Half Circuit


MOS Differential Pair Frequency Response

Since MOS differential pair can be analyzed using half-circuit, its transfer function, I/O impedances, locations of poles/zeros are the same as that of the half circuit’s.

Half Circuit


Example: MOS Differential Pair

33,

11

331

3

,

1311,

1

11

1

])/1([

1

GDDBLoutp

GDm

mGSDB

m

Yp

GDmmGSSXp

CCR

Cg

gCC

g

CggCR


Common Mode Frequency Response

12

1

SSmSSSS

SSSSDm

CM

out

RgsCR

CRRg

V

V

Css will lower the total impedance between point P to ground at high frequency, leading to higher CM gain which degrades the CM rejection ratio.



Tail Node Capacitance Contribution

Source-Body Capacitance of M1, M2 and M3

Gate-Drain Capacitance of M3



Example: Capacitive Coupling

EBin RrRR 1|| 222

HzCRr B

L 5422||

1

1111

HzCRR inC

L 9.221

222



MHzCRR inD

L 92.621

2212

MHzCR

Rg

S

SmL 4.422

1

11

111

22 1 v

Fin A

RR

Example: IC Amplifier – Low Frequency Design



77.3|| 211 inDmin

X RRgv

v

Example: IC Amplifier – Midband Design



Example: IC Amplifier – High Frequency Design

)21.1(2

)15.1(

1

)15.2(2

)308(2

2223

2

1

GHz

CCR

GHz

MHz

DBGDLp

p

p


188

Chapter 12 Feedback

12.1 General Considerations

12.2 Types of Amplifiers

12.3 Sense and Return Techniques

12.4 Polarity of Feedback

12.5 Feedback Topologies

12.6 Effect of Finite I/O Impedances

12.7 Stability in Feedback Systems

CH 12 Feedback 189

Negative Feedback System

A negative feedback system consists of four components: 1) feedforward system, 2) sense mechanism, 3) feedback network, and 4) comparison mechanism.

CH 12 Feedback 190

Close-loop Transfer Function

1

1

1 KA

A

X

Y

CH 12 Feedback 191

Feedback Example

A1 is the feedforward network, R1 and R2 provide the sensing and feedback capabilities, and comparison is provided by differential input of A1.

121

2

1

1 ARR

RA

X

Y

CH 12 Feedback 192

Comparison Error

As A1K increases, the error between the input and fed back signal decreases. Or the fed back signal approaches a good replica of the input.

KA

XE

11

E

CH 12 Feedback 193

Comparison Error

2

11R

R

X

Y

CH 12 Feedback 194

Loop Gain

When the input is grounded, and the loop is broken at an arbitrary location, the loop gain is measured to be KA1.

test

N

V

VKA 10X

CH 12 Feedback 195

Example: Alternative Loop Gain Measurement

testN VKAV 1

CH 12 Feedback 196

Incorrect Calculation of Loop Gain

Signal naturally flows from the input to the output of a feedforward/feedback system. If we apply the input the other way around, the “output” signal we get is not a result of the loop gain, but due to poor isolation.

CH 12 Feedback 197

Gain Desensitization

A large loop gain is needed to create a precise gain, one that does not depend on A1, which can vary by ±20%.

11 KAKX

Y 1

CH 12 Feedback 198

Ratio of Resistors

When two resistors are composed of the same unit resistor, their ratio is very accurate. Since when they vary, they will vary together and maintain a constant ratio.

CH 12 Feedback 199

Merits of Negative Feedback

1) Bandwidth enhancement

2) Modification of I/O Impedances

3) Linearization

CH 12 Feedback 200

Bandwidth Enhancement

Although negative feedback lowers the gain by (1+KA0), it also extends the bandwidth by the same amount.

0

0

1s

AsA

00

0

0

11

1

KA

sKA

A

sX

Y

Open LoopClosed Loop

Negative

Feedback

CH 12 Feedback 201

Bandwidth Extension Example

As the loop gain increases, we can see the decrease of the overall gain and the extension of the bandwidth.

CH 12 Feedback 202

Example: Open Loop Parameters

Dout

min

Dm

RR

gR

RgA

1

0

CH 12 Feedback 203

Example: Closed Loop Voltage Gain

Dm

Dm

in

out

RgRR

RRg

v

v

21

21

CH 12 Feedback 204

Example: Closed Loop I/O Impedance

Dmm

in RgRR

R

gR

21

211

Dm

Dout

RgRR

RR

R

21

21

CH 12 Feedback 205

Example: Load Desensitization

3/DmDm RgRg Dm

Dm

Dm

Dm

RgRR

RRg

RgRR

RRg

21

2

21

2 31

W/O Feedback

Large Difference

With Feedback

Small Difference

CH 12 Feedback 206

Linearization

Before feedback

After feedback

CH 12 Feedback 207

Four Types of Amplifiers

CH 12 Feedback 208

Ideal Models of the Four Amplifier Types

CH 12 Feedback 209

Realistic Models of the Four Amplifier Types

CH 12 Feedback 210

Examples of the Four Amplifier Types

CH 12 Feedback 211

Sensing a Voltage

In order to sense a voltage across two terminals, a voltmeter with ideally infinite impedance is used.

CH 12 Feedback 212

Sensing and Returning a Voltage

Similarly, for a feedback network to correctly sense the output voltage, its input impedance needs to be large.

R1 and R2 also provide a mean to return the voltage.

21 RR

Feedback

Network

CH 12 Feedback 213

Sensing a Current

A current is measured by inserting a current meter with ideally zero impedance in series with the conduction path.

The current meter is composed of a small resistance r in parallel with a voltmeter.

CH 12 Feedback 214

Sensing and Returning a Current

Similarly for a feedback network to correctly sense the current, its input impedance has to be small.

RS has to be small so that its voltage drop will not change Iout.

0SR

Feedback

Network

CH 12 Feedback 215

Addition of Two Voltage Sources

In order to add or substrate two voltage sources, we place them in series. So the feedback network is placed in series with the input source.

Feedback

Network

CH 12 Feedback 216

Practical Circuits to Subtract Two Voltage Sources

Although not directly in series, Vin and VF are being subtracted since the resultant currents, differential and single-ended, are proportional to the difference of Vin and VF.

CH 12 Feedback 217

Addition of Two Current Sources

In order to add two current sources, we place them in parallel. So the feedback network is placed in parallel with the input signal.

Feedback

Network

CH 12 Feedback 218

Practical Circuits to Subtract Two Current Sources

Since M1 and RF are in parallel with the input current source, their respective currents are being subtracted. Note, RF has to be large enough to approximate a current source.

CH 12 Feedback 219

Example: Sense and Return

R1 and R2 sense and return the output voltage to feedforward network consisting of M1- M4.

M1 and M2 also act as a voltage subtractor.

CH 12 Feedback 220

Example: Feedback Factor

mFout

F gv

iK

CH 12 Feedback 221

Input Impedance of an Ideal Feedback Network

To sense a voltage, the input impedance of an ideal feedback network must be infinite.

To sense a current, the input impedance of an ideal feedback network must be zero.

CH 12 Feedback 222

Output Impedance of an Ideal Feedback Network

To return a voltage, the output impedance of an ideal feedback network must be zero.

To return a current, the output impedance of an ideal feedback network must be infinite.

CH 12 Feedback 223

Determining the Polarity of Feedback

1) Assume the input goes either up or down.

2) Follow the signal through the loop.

3) Determine whether the returned quantity enhances or opposes the original change.

CH 12 Feedback 224

Polarity of Feedback Example I

inV 21 , DD II xout VV , 12 , DD II

Negative Feedback

CH 12 Feedback 225

Polarity of Feedback Example II

inV AD VI ,1 xout VV , AD VI ,1

Negative Feedback

CH 12 Feedback 226

Polarity of Feedback Example III

inI XD VI ,1 2, Dout IV XD VI ,1

Positive Feedback

CH 12 Feedback 227

Voltage-Voltage Feedback

0

0

1 KA

A

V

V

in

out

CH 12 Feedback 228

Example: Voltage-Voltage Feedback

)||(1

)||(

21

2OPONmN

OPONmN

in

out

rrgRR

Rrrg

V

V

CH 12 Feedback 229

Input Impedance of a V-V Feedback

)1( 0KARI

Vin

in

in

A better voltage sensor

CH 12 Feedback 230

Example: V-V Feedback Input Impedance

Dmmin

in RgRR

R

gI

V

21

211

CH 12 Feedback 231

Output Impedance of a V-V Feedback

01 KA

R

I

V out

X

X

A better voltage source

CH 12 Feedback 232

Example: V-V Feedback Output Impedance

mNclosedout gR

RR

11

2

1,

CH 12 Feedback 233

Voltage-Current Feedback

O

O

in

out

KR

R

I

V

1

CH 12 Feedback 234

Example: Voltage-Current Feedback

F

DDm

DDm

in

out

R

RRgRRg

I

V

212

212

1

CH 12 Feedback 235

Input Impedance of a V-C Feedback

KR

R

I

V in

X

X

01

A better current sensor.

CH 12 Feedback 236

Example: V-C Feedback Input Impedance

F

DDmmclosedin

R

RRggR

2121,

1

1.

1

CH 12 Feedback 237

Output Impedance of a V-C Feedback

A better voltage source.

KR

R

I

V out

X

X

01

CH 12 Feedback 238

Example: V-C Feedback Output Impedance

F

DDm

Dclosedout

R

RRgR

R212

2,

1

CH 12 Feedback 239

Current-Voltage Feedback

m

m

in

out

KG

G

V

I

1

CH 12 Feedback 240

Example: Current-Voltage Feedback

MOOmm

OOmmclosed

in

out

Rrrgg

rrgg

V

I

5331

5331

||1

|||

Laser

CH 12 Feedback 241

Input Impedance of a C-V Feedback

A better voltage sensor.

)1( minin

in KGRI

V

CH 12 Feedback 242

Output Impedance of a C-V Feedback

A better current source.

)1( moutX

X KGRI

V

CH 12 Feedback 243

Laser

Example: Current-Voltage Feedback

)1(1

|

)1(1

|

1|

212

211

21

21

MDmmm

closedout

MDmmm

closedin

MDmm

Dmmclosed

in

out

RRggg

R

RRggg

R

RRgg

Rgg

V

I

CH 12 Feedback 244

Wrong Technique for Measuring Output Impedance

If we want to measure the output impedance of a C-V closed-loop feedback topology directly, we have to place VX in series with K and Rout. Otherwise, the feedback will be disturbed.

CH 12 Feedback 245

Current-Current Feedback

I

I

in

out

KA

A

I

I

1

CH 12 Feedback 246

Input Impedance of C-C Feedback

A better current sensor.

I

in

X

X

KA

R

I

V

1

CH 12 Feedback 247

Output Impedance of C-C Feedback

A better current source.

)1( IoutX

X KARI

V

CH 12 Feedback 248

Example: Test of Negative Feedback

inI outD IV ,1 FP IV , outD IV ,1

Negative Feedback

Laser

CH 12 Feedback 249

Example: C-C Negative Feedback

)]/(1[|

)/(1

1.

1|

)/(1|

22

21

2

2

FDmOclosedout

FMDmmclosedin

FMDm

DmclosedI

RRRgrR

RRRggR

RRRg

RgA

M

Laser

CH 12 Feedback 250

How to Break a Loop

The correct way of breaking a loop is such that the loop does not know it has been broken. Therefore, we need to present the feedback network to both the input and the output of the feedforward amplifier.

CH 12 Feedback 251

Rules for Breaking the Loop of Amplifier Types

CH 12 Feedback 252

Intuitive Understanding of these Rules

Since ideally, the input of the feedback network sees zero impedance (Zout of an ideal voltage source), the return replicate needs to be grounded. Similarly, the output of the feedback network sees an infinite impedance (Zin of an ideal voltage sensor), the sense replicate needs to be open.

Similar ideas apply to the other types.


CH 12 Feedback 253

Rules for Calculating Feedback Factor

CH 12 Feedback 254

Intuitive Understanding of these Rules

Since the feedback senses voltage, the input of the feedback is a voltage source. Moreover, since the return quantity is also voltage, the output of the feedback is left open (a short means the output is always zero).

Similar ideas apply to the other types.


CH 12 Feedback 255

Breaking the Loop Example I

21,

1,

211,

||

/1

||

RRRR

gR

RRRgA

Dopenout

mopenin

Dmopenv

CH 12 Feedback 256

Feedback Factor Example I

)1/(

)1(

)1/(

)/(

,,,

,,,

,,,

212

openvclosedoutclosedout

openvopeninclosedin

openvopenvclosedv

KARR

KARR

KAAA

RRRK

CH 12 Feedback 257

Breaking the Loop Example II

21,

,

21,

||||

||||

RRrrR

R

RRrrgA

OPONopenout

openin

OPONmNopenv

CH 12 Feedback 258

Feedback Factor Example II

)1/(

)1/(

)/(

,,,

,

,,,

212

openvopenoutclosedout

closedin

openvopenvclosedv

KARR

R

KAAA

RRRK

CH 12 Feedback 259

Breaking the Loop Example IV

FDopenout

Fm

openin

FDm

mF

DFopen

in

out

RRR

Rg

R

RRg

gR

RR

I

V

||

||1

||.1

|

2,

1,

22

1

1

CH 12 Feedback 260

Feedback Factor Example IV

)|1/(

)|1/(

)|1/(||

/1

,,

,,

openin

outopenoutclosedout

openin

outopeninclosedin

openin

outopen

in

outclosed

in

out

F

I

VKRR

I

VKRR

I

VK

I

V

I

V

RK

CH 12 Feedback 261

Breaking the Loop Example V

MOopenout

openin

MLO

OmOOmopen

in

out

RrR

R

RRr

rgrrg

V

I

1,

,

1

11533 |||

CH 12 Feedback 262

]|)/(1[

]|)/(1/[)|/()|/(

,,

,

openinoutopenoutclosedout

closedin

openinoutopeninoutclosedinout

M

VIKRR

R

VIKVIVI

RK

Feedback Factor Example V

CH 12 Feedback 263

Breaking the Loop Example VI

Mmopenout

mopenin

mML

Dmopen

in

out

RgR

gR

gRR

Rg

V

I

)/1(

/1

/1|

2,

1,

2

1

CH 12 Feedback 264

Feedback Factor Example VI

]|)/(1[

]|)/(1[

]|)/(1/[)|/()|/(

,,

,,


openinoutopeninclosedin


M

VIKRR

VIKRR

VIKVIVI

RK

CH 12 Feedback 265

Breaking the Loop Example VII

MFOopenout

MFm

openin

FMLO

Om

mMF

DMFopenI

RRrR

RRg

R

RRRr

rg

gRR

RRRA

||

)(||1

||.

1)(

2,

1,

2

22

1

,

CH 12 Feedback 266

Feedback Factor Example VII

)1(

)1/(

)1/(

)/(

,,,

,,,

,,,

openIopenoutclosedout

openIopeninclosedin

openIopenIclosedI

MFM

KARR

KARR

KAAA

RRRK

CH 12 Feedback 267

Breaking the Loop Example VIII

MFopenout

Fm

openin

MFmmF

DFopen

in

out

RRR

Rg

R

RRggR

RR

I

V

||

||1

)]||([/1

|

,

1,

21

CH 12 Feedback 268

Feedback Factor Example VIII

]|)/(1/[

]|)/(1/[

]|)/(1/[|)/(|)/(

/1

,,

,,


openinoutopeninclosedin


F

IVKRR

IVKRR

IVKIVIV

RK

CH 12 Feedback 269

Example: Phase Response

As it can be seen, the phase of H(jω) starts to drop at 1/10 of the pole, hits -45o at the pole, and approaches -90o at 10 times the pole.

CH 12 Feedback 270

Example: Three-Pole System

For a three-pole system, a finite frequency produces a phase of -180o, which means an input signal that operates at this frequency will have its output inverted.

CH 12 Feedback 271

Instability of a Negative Feedback Loop

Substitute jω for s. If for a certain ω1, KH(jω1) reaches -1, the closed loop gain becomes infinite. This implies for a

very small input signal at ω1, the output can be very large. Thus the system becomes unstable.

)(1

)()(

sKH

sHs

X

Y

CH 12 Feedback 272

“Barkhausen’s Criteria” for Oscillation

180)(

1|)(|

1

1

jKH

jKH

CH 12 Feedback 273

Time Evolution of Instability

CH 12 Feedback 274

Oscillation Example

This system oscillates, since there’s a finite frequency at which the phase is -180o and the gain is greater than unity. In fact, this system exceeds the minimum oscillation requirement.

CH 12 Feedback 275

Condition for Oscillation

Although for both systems above, the frequencies at which |KH|=1 and KH=-180o are different, the system on the left is still unstable because at KH=-180o, |KH|>1. Whereas the system on the right is stable because at KH=-180o, |KH|<1.

CH 12 Feedback 276

Condition for Stability

ωPX, (“phase crossover”), is the frequency at which KH=-180o.

ωGX, (“gain crossover”), is the frequency at which |KH|=1.

PXGX

CH 12 Feedback 277

Stability Example I

1

1||

K

H p

CH 12 Feedback 278

Stability Example II

5.0

1||5.0

K

H p

CH 12 Feedback 279

Marginally Stable vs. Stable

Marginally Stable Stable

CH 12 Feedback 280

Phase Margin

Phase Margin = H(ωGX)+180

The larger the phase margin, the more stable the negative feedback becomes

CH 12 Feedback 281

Phase Margin Example

45PM

CH 12 Feedback 282

Frequency Compensation

Phase margin can be improved by moving ωGX closer to origin while maintaining ωPX unchanged.

CH 12 Feedback 283

Frequency Compensation Example

Ccomp is added to lower the dominant pole so that ωGX

occurs at a lower frequency than before, which means phase margin increases.

CH 12 Feedback 284

Frequency Compensation Procedure

1) We identify a PM, then -180o+PM gives us the new ωGX, or ωPM. 2) On the magnitude plot at ωPM, we extrapolate up with a slope

of +20dB/dec until we hit the low frequency gain then we look “down” and the frequency we see is our new dominant pole, ωP’.

CH 12 Feedback 285

Example: 45o Phase Margin Compensation

2pPM

CH 12 Feedback 286

Miller Compensation

To save chip area, Miller multiplication of a smaller capacitance creates an equivalent effect.

cOOmeq CrrgC )]||(1[ 655

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