1. Introduction We propose to develop a distributed network of small sensors that can monitor the environment, communicate with each other, locate sensed objects, perform distributed computations, and reach joint decisions by fusing the data the individual sensors acquire. Each node of the network will include several sensors, a microprocessor and a transceiver. We expect there to be anywhere from ten to hundreds and perhaps thousands of nodes in the network. The connectivity of the network will depend on the transmitting power and the distance between nodes. We expect nodes be at least be able to transmit to their nearest neighbors. Figure 1.1 illustrates the ad-hoc sensor network.

To design and fabricate the network, we will use a combination of new hardware and software algorithms. The unique aspects of the proposed network will include:

• Use of both narrow band operation for communication and ultra-wide band for localization.

• Integration of MEMS chemical and vibrational sensors.

• Unique signal processing algorithms to decipher sensed data.

• Unique algorithms to achieve localization. • Development of our own application specific

integrated circuits (ICs), as well as incorporation of existing ICs.

Figure 1.1: Illustration of Ad-Hoc Sensor Network

• Application of 3-dimensional fabrication technology where integrated circuits can be stacked vertically.

• Application of unique antenna designs and high-K dielectrics that allow for use of unusually small geometries.

• Extremely high value micron size 3D interdigitated capacitors to facilitate energy storage in very small volumes.

In order to achieve processing, fusion and localization across the network, we plan to utilize energy-efficient short-range RF communication, sensing and processing at each node, and develop ad-hoc networking algorithms for reliable communication and fusion. The network will exploit multiplexing of transmissions in time and frequency, by combining time-division multiple access (TDMA) with frequency-division multiple access (FDMA). We plan to have the network self-assemble whereby the multiple access slots are reused across the network with large enough reuse distances to avoid interference. As a result, each particle will communicate “within its cell” with a small number of nodes, at a small number of operating frequencies, and a small number of time allocations. Information will be sensed and will then be fused with that of other particles to make network-wide decisions. The information will be communicated digitally using frequency shift

keying (FSK) modulation. Location determination will be achieved through a combination of algorithms, which will rely on both narrow and ultra-wide band communication. To achieve our goals we plan to work in three phases. During each phase more aggressive scaling will be achieved, and more complex networks will be developed. * Phase 1:Smart Stones (several centermeter scale): In the first phase of our program, we plan to develop an ad-hoc network of between ten and twenty nodes. These “Smart Stone” nodes will be several centimeters in dimension. Each smart stone will contain a narrow band transceiver, a microprocessor, and one or more of the following sensors: vibrational, acoustical, temperature and optical. An ultra-wideband transceiver may also be included to help perform location determination. The system will be integrated into a multi-level device, fabricated on printed circuit (PC) boards. The smart stones will mainly utilize commercially off the shelf (COTS) integrated circuits. Of course, a standard GPS receiver can readily be included into the smart stone unit for outdoor location with meter level accuracy. The network will assemble itself and establish communications using a TDMA protocol. * Phase 2: Smart Pebbles (sub-centimeter scale): In Phase 2, we will concentrate on reducing the size of our sensor nodes to sub-centimeter dimensions. To achieve we will use both, COTS parts, as well as IC’s that we design and fabricate ourselves. As we have done in previously, the fabrication process will be accomplished using the MOSIS facility, and the post processing will be performed at local laboratories. (The MOSIS facility allows for the fabrication of chips, in lots consisting of 40 die, that are well within the Phase 2 budget of this project.) To reduce the antenna geometry required, we will increase the operating frequency of our circuits, as well as use high-K dielectric antenna substrates. We also plan to increase the number of nodes from between the 10 and 20 developed in Phase 1, to approximately 100 in Phase 2. In this phase, 3D stacking of chips will be performed to greatly reduce the footprint. 2. Phase 1 Task Summary Phase 1 of our program consists of four generals tasks. Here we briefly summarize the 4 general tasks. In the following section we provide detailed task descriptions and backgrounds

• Task 1 is aimed at developing the hardware for prototyping the smart stone sensors. Each smart stone includes environmental sensors, a microcontroller and a transceiver. This task is aimed at identifying the proper sensors and integrated circuit components and assembling them into a smart stone node. This will require designing the system, fabricating printed circuit boards and assembling the unit.

• Task 2 is aimed at developing and implementing the communication protocols which will enable the sensor nodes to communicate with each other wirelessly. This will require establishing methodologies for digital communication, designing network protocols so the network can self-assemble, establish a TDMA framework, generate compression algorithms, data packaging and error corrections codes. Once these algorithms are developed, the microprocessors will be programmed to implement the communication protocols.

• Task 3 is aimed at developing algorithms to perform signal processing of data. Once data is taken at the individual nodes, decisions must be made to understand the data. Here we will develop signal processing algorithms to extract meaningful trends and information

for the network. Once algorithms are developed, they will be programmed into the microprocessor in the smart stone node.

• Task 4 is aimed at developing the technology for localization. In this task we plan to develop several methods for localizing the network nodes and the position of the sensed environmental factors. These methods include (1) GPS, (2) Signal Hopping, (3) Received Signal Strength Indication (RSSI), (4) Active Radar, (5) Ranging by Phase Delay. A GPS receiver will be incorporated into each node for outdoor networks. In addition we will determine relative positions by the order in which the network establishes itself with Signal Hopping. The RSSI outputs on the transceivers will give us an description distance between nodes by indicating the power level that one node receives wireless signal from another. The Active Radar and Ranging by Phase delay use additional RF hardware to determine location and will be designed in Phase 1, and implemented if time and resources are available.

3. Phase 1: Detailed Project Description and Background In Phase 1 of the program we will develop an ad-hoc, sefl-assembled network of approximately twenty smart stones. The overall plans were described in the bullet item in Section 1. Here, we describe more details of the Phase 1 hardware and network algorithms. 3.1 Task 1: Developing Smart Stone Hardware The generic operational structure of a smart stone network node consists of one or more analog sensors which take data on the environment. This information is then digitized and stored in the microprocessor. The sensor stored in the microprocessor is then distributed wirelessly to the network using the transmitter. The receiver part of the stone obtains information from the other nodes in the network. This information is then stored in the microprocessor. The microprocessor serves two major functions. First, it processes and helps fuse the data from its own sensors with the data it receives from the rest of the network to help in the distributed network decision making. In addition, the microprocessor must control the communication algorithm for the smart stone network. In othe words, it must tell its own transceiver when to receive information from other nodes, and direct when to transmit its own data and decisions. A functional diagram of a smart stone node is given in Fgure 3.1.

L1

L2µP

L1

L2µPSensor ADCSensor ADC

Tx

Rx

TxTx

RxRx

Figure 3.1: Smart Stone Functional Diagram Sensors For our sensor input we plan to take a modular approach. This allows us to take data from different sources. This will be achieved using a device independent program in the microprocessor. However, for our initial implementation, we plan to start with acoustic, optical and temperature sensors. For the optical sensor, we will use a photodiode. For the acoustic sensor, which will also serve as the vibration detector, we will employ a MEMS microphone. The temperature sensor is also millimeter sized, and provides a eight bit digital output. In our background work we have already investigated the characteristics of these sensors. We connected several of the sensors with the microprocessor using the I2C bus, and found this approach is flexible in that it allows for a wide variety of sensors to be used in a single node. The only difficulty is that the sensors must be preconditioned with I2C capability. Where necessary, we will provide the analog to digital (ADC) interface required between the analog sensor and the microprocessor. For our initial prototypes, this interface will be provided with the XXX ADC converter. Figure 2.2 shows the prototyped sensor systems mounted on small PC boards we designed and fabricated in our background investigation.

Figure 3.2: Prototyped boards for acoustic and temperature sensors Microprocessor In our background work preparing for Phase 1 we have been using the Microchip PIC16F628 controller. This micro-controller is robust and very inexpensive. We have acquired considerable experience developing assembly language communication protocols using the PIC, and have developed a considerable library of codes to implement data acquisition and digital communication. Overall, its versatility, power management, price and assortment of op-codes make is suitable for use in implementing the smart stone network. During our Phase 1, in addition to continuing our work with Microchip controller, we also plan to investigate the Chipcon 1010 and Texas Instrument MPS430 microcontrollers. The advantage of the Chipcon system, is that it contains both a microprocessor and transceiver in the same compact package compact package.

Figure 3.3: Transceiver Prototype Developed as Background to Phase 1

The TI MSP430 has advantages of extremely low power consumption. Transceivers In our background work using COTS transmitters and receivers, we have accomplished much or our wireless transmission using the Linx receiver/transmitters pairs. The Linx916ES transmitter and receiver pair operate using frequency modulation (FM) about a narrow band carrier of 916MHz. Applying a serial stream of bits will allow for Frequency Shift Keying (FSK) transmission of bits for digital communication over the network. The Linx transmitter and receiver can operate at serial baud rates of approximately 200,000. While this does not represent an extremely high rate of transfer, it will be sufficient for performing distributed processing on the data obtained from the acoustic, temperature and optical sensors which vary on a time scale of approximately 100milliseconds. In addition to continuing our work with the Linx system for transceiver development, we also plan to develop a prototype using the combined Chipcon 1010 transceiver/microntroller IC. A comparison will between the Linx-based and Chipcon-based systems will then be made to determine which is better suited for the distributed sensor network application. Figure 2.3 shows a prototype we developed in our background work which uses the Linx transmitter system in coordination with the PIC microcontroller. Antennas:

Microstrip surface patch antennas, which come in a wide variety of shapes, are ideal for smart stone applications because of their low profile, cost effectiveness, and ease of manufacturing. Wire antennas, on the other hand, have an extended profile that allows for increased efficiency but at the cost of volume. Microstrip antennas will be the first choice. Increasing the efficiency of these antennas can be made possible by increasing thickness of the substrate and using low-loss material.

3.2 Task 2: Developing Communication Protocols for the Smart Stone Network (Gil, please try to make this sound more intelligent) We plan to use a combination of TDMA and FDMA for networking the individual nodes. This will allow us to use both frequency and time domains for efficient digital transmission of data. In Phase 1 we will implement our system using TDMA, and design the FDMA/TDMA algorithm. In Phase 2 we plan to add the FDMA hardware and software components to the network. Source and Channel Coding To communicate effectively we will establish channels between nodes. We will develop algorithms for source and channel coding that are optimal for the transmission of data extracted from analog sensors. Source coding algorithms will accomplish efficient analog to digital conversion. In most cases this will be performed by the microprocessor. We will then determine methods to most efficiently package and transmit information using the minimum number of bytes. For example, specific type of data and information that is sent frequently will be represented by very simple bit patterns that are error tolerant, while data-types that are seldom transferred will require more energy to send. Data compression algorithms directed at minimizing the number of bits required to transfer relatively simple data extracted from sensors will be utilized. In addition to source coding, we will utilize channel coding to minimize error and maximize range of transmission. In our background work for Phase 1, we implemented bit synchronization, frame synchronization, cyclic

redundancy checks and forward error correction to help optimize transmitting distance and efficiency. We found that properly packaging of our digital data facilitated increasing the transmission distance by more than two orders of magnitude over simple streaming techniques, and incorporating Hamming codes for error correction increased the range by another 25%., Modulation As suggested above, we will be using FSK modulation. We choose this because for our purposes in digital communication FSK will be energy efficient and not prone to corruption from noise sources. In addition, the hardware to produce FSK signals is readily available in COTS parts. Furthermore, in later phases of the project, when we build our own circuits, FSK modulation is readily implemented using standard CMOS processes. Establishing the TDMA Protocol and Avoiding Interference In Phase 1 we plan to implement the wireless sensor using a TDMA protocol. This requires discretizing time into number of separate intervals or slots. The number of these intervals depends on the number of nodes in the network. and their expected connectivity. As a first design in Phase 1 we will transmit with sufficient power to establish universal connectivity of the network. Under these circumstances, we will have a time slot dedicated to each node. During the slot assigned to a specific Smart Stone, that node will transmit, and all other nodes will be receiving. As time progresses, all nodes will have the opportunity to transmit their data or results of the calculations. To achieve this time division and distributed computing, we will establish a system clock. This requires all smart stones to be time synchronized. It also requires that each stone has a unique address. The universal clock will be broadcast by one of the stones upon deployment, giving the opportunity for all other stones to synchronize to it. The individual time addresses of each stone will be pre-programmed in this stage of the project. At later stages, the time addresses of each stone will also be self-assembled by the network using statistical broadcast methods. Finally, it may be possible the nearby signals will interfere with our TDMA network. If we find that this is indeed the case, we plan to implement frequency hopping which will allow transmission on different carriers to avoid interference. 3.3 Task 3: Development and Implementation of Algorithms for Signal Processing and Fusion of Data

GIL, PLEASE PUT IN YOUR STUFF ON SIGNAL PROCESSING HERE FOR EVERYTHING BUT POSITIONING

3.4 Task 4: Achieving Localization: Algorithms and Hardware We plan to explore several methodologies to achieve localization. The methodology used will be dependent on the environment where the smart sensor network is established. We will begin with relatively simple hopping and received signal strength (RSSI) algorithms, as well as GPS. Hopping and RSSI algorithms can be implemented using the hardware we have already described. Incorporating GPS is an obvious approach that is readily achieved by integrating a small GPS receiver and a decoding microprocessor circuit into the Smart Stone. The drawbacks of GPS are that its accuracy may be limited to a few meters to tens of meters, in addition, it will not function

indoors. (Indoor GPS using the current system is unlikely to be accomplished due to power and line of sight restrictions from satellites.) For improved accuracy, and indoor operation, we also plan to explore developing active radar systems, which use ultra-wideband technology, as well as location by modulated wave phase shift. 3.4.1 Using the Global Positioning System While GPS receivers will not consistently operate indoors, we will still employ GPS receivers for situations where they are able to operate. Motorola Corporation has announced that it plans to bring a new GPS receiver IC to the market. The company claims that the sensitivity of the new MG4000 chip will be as much at -153dBm. The outdoor power of the GPS satellite signal when is reaches the earth is approximately -130dBm. Our modeling and the literature indicate that the signal is reduced by another 20dBm once it enters a single story building, and attenuates another 10dBm for each additional building level[7]. The conclusion from this information is that this nascent Motorola chip should be able to operate in small (one and perhaps two story) structures. We therefore plan to use this chip to complement our proposed system. It will be straightforward to incorporate this chip into our IPS system. If the GPS chip can detect the location, the information will be transmitted to the network. The GPS unit will be treated as another sensor input to the smart stone system described in Section 2.1. Figure xx show a prototype that we have already developed that contains a GPS receiver, and then has the ability to send the GPS information to the network.

Figure XXX: GPS receiver board which takes coordinates, deciphers, packages, and transmits them to the

t k

3.4.2 Signal Hopping If a large network is established, it will not have global connectivity, but only neighbors will be connected to form smaller cells. The nodes in each cell will know which other nodes they are connected to. By knowing these connections, physical map will be developed. This map will be developed based on the path signal take as they ‘hop’ through the network. We will use this hopping information to help construct a geographical distribution of the network. 3.4.3 Received Signal Strength One relatively obvious way of getting information as to the relative location of sensor nodes is through the received signal strength indication (RSSI) monitors. The transceivers that we plan to utilize have an RSSI output pin which usually provides an analog voltage. During the TDMA process, individual nodes will know which other node it is receiving from at each time slot. Using this information, and the RSSI value for that time slot, the nodes will know the power strength of the received signal from another particular node. In many circumstances (depending on the environment) the signal strength between two nodes will be directly translated into a distance. We will use this methodology to calculate distances between nodes.

3.4.4 Active Radar We are developing technology that enables indoor positioning. The indoor locating

technology is being developed using Ultra-Wide-Band (UWB) technology and the aid of a unique CAD tool we developed for electromagnetics, which is not available elsewhere. To achieve localization using Active Radar, we will include a UWB transceiver in each node. The system will be ground based, and thus, where necessary, be able to transmit more power between nodes than the GPS satellite system. In addition, instead of transmitting continuously with CW, active radar employs ultra-wideband pulsed power, with EM waves propagating for time scales that are on the order of nanoseconds. Active radar eliminates the line of sight problem of GPS and other continuous wave techniques because measurements and simulations both show that within a few percent error, in most situations where indoor and indoor-to-outdoor wave propagation occurs, the first pulse to arrive at its destination will have taken approximately a straight line path from its source. To achieve this new technology for indoor positioning, we are taking advantage of this new pulsed signal algorithm, as well as our unique, state of the art Finite Difference Time Domain Alternating Direction Implicit EM modeling code. Below we describe the basic operating principle of the positioning system. We start by explaining how we use electronics and RF to measure absolute distance. We then explain how we extend the principle to measure location. Measuring Location

To measure distance we use ultra-fast clocks in conjunction with the speed of light. Inexpensive ultra-fast clocks are now possible to build as a result of the microelectronic revolution. Integrated circuit oscillators and counters can now be purchased for a few dollars that operate in the GHz range. By knowing that the speed of light is 3 X 1010 cm/sec, we can use these clocks, in conjunction with electromagnetic wave propagation, to measure distances with a resolution of 3cm [(3 X 1010 cm/sec)(1 X 10 –10 sec )=3cm].

To understand how we measure distances using fast clocks and electromagnetic (EM) waves, consider the following. At location ‘A’ we have a transceiver that is capable of sending and receiving electromagnetic signals. Connected to the transceiver is a very high frequency clock that is operating at a known frequency of say 10GHz. At location ‘B’ we have another transceiver. To measure the distance between points A and B, the transceiver at point A sends an EM pulse to B, at the same time the clock at A starts. After a finite amount of time, transceiver B receives the signal and transmits it back to A. When A receives the signal the number of periods on the clock is recorded, which is the time it has required for the EM wave to go to from A to B and back to A. By multiplying this time by the speed of light, we can determine the distance between A and B. Intrinsic delays due to the electronics response times for the electronics will be easily measured and calibrated out. Figure xx shows a block diagram of the distance transceiver concept. To measure location coordinates, we will establish a fixed

RFoutUWB Pulse Generator

UWB Pulse Transmitter

Start

GHz Clock

UWB Pulse Receiver

Stop RFin

µCPU & Distance/ Location

Figure XX: Block Diagram for Distance measuring

reference of thee of the nodes, and then use triangulation to determine the location of all the other nodes when the ad-hoc network self-assembles. By knowing the position of the nodes, we will then determine the location of the where the data has been sensed, and its trajectory.

Suppose we want to measure the location of a point B. We achieve this by extending the above methodology by using two more transceivers. We place transceivers A1, A2 and A3 at three known locations. Each transceiver has its own clock. Using the algorithm discussed above, we can find the distance between point B and A1, A2, A3. By knowing the distance between B and the three positioned transceivers, a simple geometric relationship will give the precise location of point B relative to A1, A2 or A3. (This is analogous to the GPS triangulation.) Active Radar Hardware Design The active radar hardware will be based on ultra-wide-band transceivers and GHz clock. The transmitter sends a unique set of Ultra-Wideband pulses, the receiver then detects those pulses using a matched filter technique. Our transmitter will consist of a mixed signal circuit for generating nanosecond pulses. A block diagram of the mixed signal version of our Ultra-Wideband transmitter design is shown in Figure XXX below. Essentially, a very fast clock gives rise to square waves with very fast rise times (less than 100psec). The nanosecond time constant high pass filter transforms the square wave into very short pulses. The pulses are then ANDed with the output of a binary counter. By controlling the period of the counter, we can control the duty cycle and thus the output pulse waveform. Another design we plan to develop as well is based on analog technology only where a few high-speed transistors are used to implement a multi-vibrator-type circuit that is capable of generating nanosecond pulses. In our background investigation, we prototyped this analog circuit. A photograph of the circuit and the nanosecond pulse output is shown in Fig. XXX.

Figure XX: A block diagram of our Ultra-Wideband transmitter design

Clock genera

tor

High PassFilter AND

gate

Binary Counter÷4

ANDgate÷8

Figure XXX: Prototyped Analog Wideband Nanosecond Pulse Generator and Output for

Localization The wide band receiver functions using an analog matched filter. It consists of a wide-band

antenna that is situated within millimeter proximity to the low noise wideband input amplifier. The amplifier output is sent to into a mixer. The mixer multiplies the input signal with a local reproduction of the transmitted signal. The result of this mixing is then sent to a low pass capacitive network for integration. If the signals are integrated result is sufficiently large, the signal will be taken as detected. However, if the signals are orthogonal, the signal will be rejected as noise. The advantage of this technique is that it allows us to extract signals from a very noise and distorting environment that exists for non-line of sight transmission. A block diagram of our Ultra-Wideband receiver design is shown in Figure XXX.

Threshold ∫ dt Detector LNA

Local UWB

Figure XX: A block diagram of our Ultra-Wideband receiver design Each node will have a transmitter/receiver pair (transceiver), and an associated high speed

clock. The UWB pulse will be transmitted to another node, and simultaneously its internal high speed clock will start. Another node will receive the pulse and then transmit it back. Upon

receiving the retransmitted pulse, the first node will stop its counter. From the value of the counter and the speed of light, the distance between the nodes will be determined.

In Phase 1, we will use COTS parts to design a prototype. In Phase 2, we plan to transform

the design into an actual prototype. In addition, in Phase w we plan to fabricate our own ultra wide band chips. (We have considerable experience with designing and fabricating our own chips. This will be discussed later in the proposal). During Phase 1 we will design chips for UWB localization. However, due to costs and three month turn-around times for fabrication, only limited chip development can be accomplished in Phase 1. Active Radar prototyping and development of application specific integrated circuits developed more aggressively in Phase 2. Computer Aided Design (CAD) with State-of-the-Art Electromagnetic Modeling

Design of reliable localization systems requires accurate modeling of EM signal propagation inside structures. Such modeling requires a full-wave solution to Maxwell’s equation in the time domain. However, conventional Maxwell equation Finite-Difference-Time-Domain (FDTD) solvers employ methods are limited by the Courant condition. This restriction requires very small time steps, and therefore prohibitively long simulation times are required to analyze the details of EM propagation inside buildings. To overcome this problem, we have developed a unique state-of-the-art simulator that uses the Alternating-Direction-Implicit (ADI) method [4-6]. This new simulator has given our design team a unique capability in the CAD of IPS systems. In this new FDTD-ADI method. Maxwell’s equations are discretized with the electric and magnetic fields on different grids [4]. By manipulating Maxwell’s equations, we transform the differential equations to a system of tri-diagonal algebraic equations. Each matrix of the system corresponds to one specific dimension [4-6]. We then solve the tri-diagonal systems at each time step for the EM fields in 3D.

Our novel CAD tool predicts the velocity and power of an electromagnetic RF pulse as it propagates from a base station to the receiver and back. In addition, the CAD tool can tell us if there is any deviation from the straight line path of propagation. Fig. xxx shows the RF signal wavefronts as they propagate inside buildings. Data from the simulations shown in Fig.xxx indicates the path of the signal that first arrives at the receiver can be taken as virtually a straight line.

Fig 6.3a shows the simulation of EM waves propagating through walls inside a building. Red represents highest power and blue is lowest. Fig. xxx shows the simulated deviation from the straight line paths of EM waves propagating through wall inside a building. The line represents the straight line path. The points are the simulated distances and show very minor deviation from the straight line path. 3.4.5. Statistics and Algorithms for Localization (Gil, please revise)

The system will produce a large number of pulses within any time interval of a few milliseconds. Each pulse (group) will allow the computation of a location, therefore, within each 1 second (say) interval, we will have a large number of points as candidate locations. It is important to use an appropriate statistical process to select the location estimate from the candidate location points. This is a famous problem in statistics, treated by among others Donoho and Tukey. In one dimension the median is the “best” natural estimate, since the mean is strongly affected by outliers. In higher dimensions, the definition of the median is subtle. However, well posed definitions have been given – e.g., the Tukey median - and efficient algorithms are available for identifying the “best” estimate of a location given a (large) number of data points. See for example [8] for the definition and algorithms in 2 dimensions. See also [9] for several fast algorithms. 4. Phase 2 Having established the viability of the network in Phase 1, we will move to greatly reduce the physical dimensions and increase the complexity and functionality of the network in Phase 2. This will be achieved by, where necessary, developing our own integrated circuits which are specially tailored to the smart sensor network. In addition, we plan to leverage from our previous research programs in developing 3-dimensional integrated circuits and bring this technology to the development of compact sub-centimeter sized smart sensor nodes. In general, we plan to transform the sensor node design that we developed in Phase 1, into a 3-dimensional smart sensor, microprocessor, transceiver and locator stack. The general structure of the stack will have sensing and antenna elements on the outside layers. FSK transceivers for digital communication will be on an inner layer, as will be microprocessors for digital control and data fusion. Integrated circuits for location, which utilize ultra-wide band techniques, will also be contained on the inner layers. Achieving 3D Stacking

1. PACKAGING ISSUES. Obviously, in order to minimize system volume, very aggressive packaging techniques will be required. Ideally “3-D” Integrated circuits (ICs) would be ultimately desirable. Here, thin layers of “device grade” silicon are stacked and sandwiched between insulating layers. Circuits are manufactured on each layer using low-temperature IC processing techniques. Inter-layer contacts are made by cutting “vias” between the levels and forming contact “plugs” using selective metallization deposition. We are currently involved with Lincoln Labs and the Laboratory of Physical Sciences in a project to explore the utility of this approach in optical sensing technology. An example of such a

stacking process an how it might be used in a “smart dust” module configuration is shown here (fig.1).

Fig. 1 3-D IC technology applied to a “smart dust” module.

This is clearly a very aggressive technology. As an intermediate approach, we can “stack-and-bond” standard IC chips, allowing for bond-pad “ledges” surrounding each chip. This is shown in the figures below.

Fig.2. A schematic of the “stack-and-bond” approach

Fig. 3 Illustration of an actual “stack-and-bond” module.

The least aggressive process of all would be to face-to-face indium bump-bond two chips together. This effectively reduces surface area by a factor of two. We have access to tooling necessary for both stack-and-bond as well as indium bump bonding already present in the University of Maryland clean facilities. This be our first approach to IC stacking where we will develop two level stacks

Integrated Sensors in 3D 2. MEMS-Based Microphone. “Micro-miniature” microphones can be fabricated using

standard membrane approaches offered in Microelecrical-mechanical systems (MEMS) processing approaches. A viable process follow for such an instrument (courtesy of the University of Windsor) is shown below.

Fig. 4. A viable MEMS-based microphone process flow.

We plan to procure or fabricate such microphones. We will surface-mount these devices, and wire them using the “stack-and-bond” approach shown above. For fabrication, we plan to simplify the above process so that it is compatible with the MOSIS foundry. Such microphones can be tiled as arrays to perform acoustic triangulation. They can also be excited to form acoustic beams.

Achieving Application Specific Integrated Circuits Most of the circuits that we will require for developing this network will be available commercially. These circuits include the FSK transceivers and the microprocessors. We plan to utilize these existing circuits. To incorporate these chips into our 3D stack, we will purchase unpackaged die. However, certain components of our system will not be available as pre-existing COTs parts, because the technology is too new. Under these circumstances, we plan to design and fabricate our own integrated circuits. The application specific integrated circuit (ASIC) that we expect to design and fabricate ourselves will be the Ultra-Wideband Transceiver that we will utilize for localization. The block diagram of the circuit was given in Figure XXX of Section XXX. Incorporating the details into one chip will be acheivable using modern CMOS fabrication. In modern electronic manufacturing, the paradigm has been established that a small company can design sophisticated IC's, and then have those circuits fabricated by sending the design to a foundry. We have considerable experience in designing and fabricating ICs using this manufacturing model. The various components will be composed of 0.25µm CMOS, designed using the Cadence CAD toolset, and fabricated through MOSIS. The clock generator will consist of a current starved ring oscillator. The binary counter will be developed with from a shift registor topology using flip-flops implemented in CMOS. The AND gates will also be design with CMOS using standard implementation. We choose the 0.25µm process because it is has sufficient speed, while still being affordable on a Phase 2 budget. A layout and the actual chip that we have already developed that contains most of these components is shown in Figure XXX. In addition to having components for UWB transmission, the chip has specially placed vias for implementation into a 3D stack. Another component of the ASIC we plan to design and fabricate in Phase 2 is the UWB receiver. The input of the receiver will be a cascode low noise amplifier (LNA) designed to be impedance matched to the antenna for the fundamental frequencies. The LNA will be designed to provide approximately

Fig. XXX: Layout and actual chip developed during background that contains the oscillator, counter and combinatorial logic for the UWB

Transceiver

20dB gain and simultaneously minimizing power consumption and noise. This constraint of minimizing power and noise simultaneously will be a research challenge. Generally, noise decreases when transconductance increases. However, supply current also increases with higher transconductance. The receiver mixer will be of the Gilbert-cell type, with accommodations made for maximizing swing at low DC bias levels. [1.] Z. Dilli, and N. Goldsman, MOSIS Design number 65046; Design name: ringosc05; Technology: SCN3ME\_SUBM, lambda = 0.3; (An oscillator-counter chip test chip) 2002. [2.] Z. Dilli and N. Goldsman, MOSIS Design number 64639; Design name: diginterf;Technology: SCNA, lambda = 0.8; (An oscillator-counter test chip) 2002. [3.] Y. Bai and N. Goldsman, MOSIS Design number: 65008; Design name: FSK; Technology: SCN3ME\_SUBM, lambda = 0.3; (An FSK transmitter test chip) 2002. [4.] X. Shao, N. Goldsman, O. Ramahi, P. N. Guzdar, A New Method for Simulation of On-Chip Interconnects and Substrate Currents with 3D Alternating-Direction-Implicit (ADI) Maxwell Equation Solver. 2003 International Conference on Simulation of Semiconductor Processes and Devices, pp. 315-318. [5.] X. Shao, N. Goldsman, and O.. Ramahi, The Alternating-Direction Implicit Finite-Difference Time-Domain (ADI-FDTD) Method and its Application to Simulation of Scattering from Highly Conductive Material, IEEE International Antennas and Propagation Symposium and USNC/CNC/URSI North American Radio Science Meeting: URSI Digest, p. 358, Columbus, OH, 2003. [6.] X. Shao, O. Ramahi, L. Li, B. Mohajeriravani, and N. Goldsman, Study of Electromagnetic Field Radiation from Apertures using Alternating-Direction Implicit Finite-Difference Time-Domain (ADI-FDTD) Method, IEEE International Antennas and Propagation Symposium and USNC/CNC/URSI North American Radio Science Meeting: URSI Digest, p. 630, Columbus, OH, 2003.