1IWORID 2002 David San Segundo Bello

Design of an interface board for the control and data acquisition of the

Medipix2 chip

D. San Segundo Bello a,b, M. van Beuzekom a, P. Jansweijer a,H. Verkooijen a, J. Visschers a

a NIKHEF, Kruislaan 409,1098 SJ Amsterdam, The Netherlandsb MESA+Research Institute / University of Twente, Enschede, The Netherlands

2IWORID 2002 David San Segundo Bello

OutlineOutline

•Motivation and goals•Board components

•Power supplies•Data converters

•Control and data acquisition•Conclusions•Future work

3IWORID 2002 David San Segundo Bello

Motivation and goalsMotivation and goals

•Design and manufacture board for data acquisition and control of Medipix2 chip via conventional PC: MUROS2

•Use “off-the-shelf” components.

•Fully digital control (PCI card used in PC handles only digital signals).

•Maximum flexibility: use programmable logic (Field Programmable Gate Array)

•Use serial communication implemented in Medipix2 chip.

•For 8 chips chipboard (see talk AlessandroFornaini later today).

4IWORID 2002 David San Segundo Bello

CLOCK

DAC bias

DAC ext.

DACspulser

ADC

2 x 8

SerDesFIFOs

RX/TX

LVDS

RX/TX

FPGA

PC

(DIO

-653

X)

Med

ipix

2

H.V.Supply

/32

/16

/16

/8

Muros2: block diagramMuros2: block diagram

Muros2Muros2

5IWORID 2002 David San Segundo Bello

Muros2: this is itMuros2: this is it

6IWORID 2002 David San Segundo Bello

Muros2 components: OverviewMuros2 components: Overview

•Power supplies:-Medipix2 chips-Internal components

•Data converters:-4 DACs-1 ADC

•Voltage references (for data converters)•Analog multiplexer (works with ADC)•Clock source (7 MHz < fCK < 30 MHz) adjustable•Digital transceivers (TTL to CMOS, etc…)•FPGA (a.k.a. “the brains”)

7IWORID 2002 David San Segundo Bello

•Must deliver power to the Medipix2 chips AND the internal components used in Muros2:

2.2 V for Medipix2 chips:Analog (~ 300 mA /chip)Digital (~ 300 mA / chip)LVDS (~10 mA / chip)

1.8 V (~100 mA) , 3.3 V (~100 mA) and 5 V (~300 mA) for the Muros2 components.

•Solution:Use 5V from National Instruments cardUse external 3.3 V power supply:

Linear regulators for 1.8 V and 2.2 V

Muros2 components: Power SuppliesMuros2 components: Power Supplies

8IWORID 2002 David San Segundo Bello

Muros2 components: Data convertersMuros2 components: Data converters

•Digital to Analog Converters (DAC):-Bias DAC: control high voltage supply for detectors-External DAC: override one Medipix2 DAC-Pulser DACs: for analog test (more later…)Used National Semiconductor’s 14-bit DAC for all of them

•Analog to Digital Converter (ADC): Used for measuring values of DACs in Medipix2 chips. Analog multiplexer selects one out of 8 possible chips.

Used Analog Devices’ 16 bit ADC

9IWORID 2002 David San Segundo Bello

Control & data acquisition: OverviewControl & data acquisition: Overview

•Register controlled: registers in FPGA are used to control Muros2 (data converters, image acquisition modes….).•32 bit wide bus between NI card and Muros2:16 bits for asynchronous control signals (RESET, DATA/REG, etc…) and 16 bits for data transfer•Data transfer between Muros2 and Medipix2: serial LVDS (data, clock and token)

LVDS = Low Voltage Differential Signaling:•Differential: good against E.M.I. and common-mode noise•Low voltage: lower power dissipation, faster switching (Megabits @ milliwatts)•Data rates > 400 Mbit/s possible

Why serial? Industry-wide and research move towards serial data communication schemes: serial ATA, PCI-Express, USB, FireWire, Gigabit Ethernet,…

10IWORID 2002 David San Segundo Bello

RESET

Data / Registers

Read / Write

Acknowledge

Request

DATA

CommunicationCommunicationManagerManager

Stop

Busy

Ext. shutter

Clock

Reset Medipix2

Serial dataSerial data

DATA

DATA

Control

Control

ShutterEnable (token)

ANIN switch

ADC

DACs, etc...

Clock

Clock x 8

ControlMedipix2

CommandsCommandsManagerManager

RegistersRegisters

FIFOs andFIFOs andSerDesSerDes

Control & data acquisition: Blocks diagramControl & data acquisition: Blocks diagram

11IWORID 2002 David San Segundo Bello

Control & data acquisition: Registers IControl & data acquisition: Registers I

12 registers inside the FPGA for controlling the Medipix2 as wellas components in the Muros2 board:

Configuration Register: Main controlCounter: Control data transmission (count bits transmitted)Bias DAC: Control bias DACTimer: Control shutterFrame counter : Control shutter External DAC: Control “external” DACPulse DAC values: Control DACs for analog testPulse parameters: Parameters for analog test (number and duration of pulses)Read-only: Muros2 version numberADC control: Control ADCADC value: Value from ADC (read-only)Extra I/O: Control extra 32- bit I/O connector for general-purpose use

12IWORID 2002 David San Segundo Bello

Control & data acquisition: Registers IIControl & data acquisition: Registers II

Select for writing registers

Select which register

Prepare data in PC

Begin data transmission

Load high 16 bits

Load low 16 bits

13IWORID 2002 David San Segundo Bello

Control & data acquisition: Data transmissionControl & data acquisition: Data transmission

•FPGA implements:•Data serialization: from 16-bit PC card (TTL levels) to 1-bit Medipix2•Data de-serialization: from 1-bit Medipix2 to 16-bit PC card

•LVDS transceivers (1-bit CMOS to/from 1-bit LVDS) not in “our” FPGA (size/cost), but LVDS is standard in most FPGA chips (Altera, Xilinx,…)

14IWORID 2002 David San Segundo Bello

Control & data acquisition: Shutter controlControl & data acquisition: Shutter control

Acquisition modes:Software controlled (with or without timer): Shutter opens by writing to one bit in one of the registersHardware controlled (with or without timer): Shutter is controlled by an external signalContinuous acquisition (“movie mode”): Fully controlled by FPGA, so no latency due to software/computer

15IWORID 2002 David San Segundo Bello

Control & data acquisition: Analog test controlControl & data acquisition: Analog test control

Analogswitch

DAC 1

DAC 2

to input analog test Medipix2 chip

FPGA

Muros2Muros2

Medipix2 chipboardMedipix2 chipboard

16IWORID 2002 David San Segundo Bello

ConclusionsConclusions

•Muros2 has been successfully used with Medisoft4 software to test 5 Medipix2 wafers•Tests show that maximum data rates above 100 Mbit/s are possible. Main limitation seen so far is in maximum speed of Medipix2 chip: Muros2 alone can transmit/receive data at data rates > 160 Mbit/s•Muros2 can evolve in the future thanks to having most functions implemented in FPGA (reprogramming)

17IWORID 2002 David San Segundo Bello

Future workFuture work

•Increase speed at chip level: new PhD project at NIKHEF/U. of Twente for high-speed (serial) data transmission•Skip interface board (DIO-653X) between Muros2 and PC. (i.e. implementing PCI bridge in FPGA)

18IWORID 2002 David San Segundo Bello

NIKHEF: Ton Boerkamp, Alessandro Fornaini,Jan van VeenCERN: Xavier LlopartCzech T. U. (Prague): Tomas Horazdovski, Zdenek KohoutUniv. Napoli: Marino Maiorino (now in IFAE Barcelona), Cristina Montesi, Gianni MettivierUniv. Erlangen: Michaela Mitschke

Thanks to…Thanks to…