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Lecture 11Combinational Design Procedure

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Overview

° Design digital circuit from specification

° Digital inputs and outputs known• Need to determine logic that can transform data

° Start in truth table form

° Create K-map for each output based on function of inputs

° Determine minimized sum-of-product representation

° Draw circuit diagram

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Design Procedure (Mano)

Design a circuit from a specification.

1. Determine number of required inputs and outputs.

2. Derive truth table

3. Obtain simplified Boolean functions

4. Draw logic diagram and verify correctnessA00001111

B00110011

C01010101

R00000001

S01111111

S = A + B + CR = ABC

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Previously, we have learned…

° Boolean algebra can be used to simplify expressions, but not obvious:• how to proceed at each step, or

• if solution reached is minimal.

° Have seen five ways to represent a function:• Boolean expression

• truth table

• logic circuit

• minterms/maxterms

• Karnaugh map

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Combinational logic design

° Use multiple representations of logic functions

° Use graphical representation to assist in simplification of function.

° Use concept of “don’t care” conditions.

° Example - encoding BCD to seven segment display.

° Similar to approach used by designers in the field.

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BCD to Seven Segment Display

° Used to display binary coded decimal (BCD) numbers using seven illuminated segments.

° BCD uses 0’s and 1’s to represent decimal digits 0 - 9. Need four bits to represent required 10 digits.

° Binary coded decimal (BCD) represents each decimal digit with four bits

a

b

c

g

e

d

f

10019

00018

11107

01002

10001

00000

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BCD to seven segment display

0 a,b,c,d,e,f1 b,c2 a,b,d,e,g3 a,b,c,d,g4 b,c,f,g5 a,c,d,f,g6 a,c,d,e,f,g7 a,b,c8 a,b,c,d,e,f,g9 a,b,c,d,f,g

a

b

c

g

e

d

f

° List the segments that should be illuminated for each digit.

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BCD to seven segment display

.0111110019

.1111100018

.0011111107

.

.1101101002

.0011010001

.1111100000

.edcbazyxwDec

° Derive the truth table for the circuit.

° Each output column in one circuit.

Inputs Outputs

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BCD to seven segment display

1 0

10

1 1

1 1

11

yz

wx

10

11

01

00

10110100

For segment “a” :

Note: Have only filled in ten squares, corresponding to the ten numerical digits we wish to represent.

° Find minimal sum-of-products representation for each output

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Don’t care conditions (BCD display) ...

1 0

10

1 1 X X

X X X X

1 1

11

yz

wx

10

11

01

00

10110100

For segment “a” :

Put in “X” (don’t care), and interpret as either 1 or 0 as desired ….

° Fill in don’t cares for undefined outputs.• Note that these combinations of inputs should never happen.

° Leads to a reduced implementation

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Don’t care conditions (BCD display) ...

For segment “a” :

yFa1 1 0

10

1 1 X X

X X X X

1 1

11

yz

wx

10

11

01

00

10110100

° Circle biggest group of 1’s and Don’t Cares.

° Leads to a reduced implementation

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Don’t care conditions (BCD display)

For segment “a” :

wFa2 1 0

10

1 1 X X

X X X X

1 1

11

yz

wx

10

11

01

00

10110100

° Circle biggest group of 1’s and Don’t Cares.

° Leads to a reduced implementation

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Don’t care conditions (BCD display) ...

For segment “a” :

zxFa3

1 0

10

1 1 X X

X X X X

1 1

11

yz

wx

10

11

01

00

10110100

xzFa4

1 0

10

1 1 X X

X X X X

1 1

11

yz

wx

10

11

01

00

10110100

° Circle biggest group of 1’s and Don’t Cares.

° All 1’s should be covered by at least one implicant

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Don’t care conditions (BCD display) ...

For segment “a” :

xzzxwyF 1 0

10

1 1 X X

X X X X

1 1

11

yz

wx

10

11

01

00

10110100

° Put all the terms together

° Generate the circuit

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BCD to seven segment display

.0111110019

.1111100018

.0011111107

.

.1101101002

.0011010001

.1111100000

.edcbazyxwDec

° Derive the truth table for the circuit.

° Each output column in one circuit.

Inputs Outputs

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BCD to seven segment display

1 1

01

1 1

1 0

11

yz

wx

10

11

01

00

10110100

For segment “b” :

° Find minimal sum-of-products representation for each output

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1 1

01

1 1

1 0

11

yz

wx

10

11

01

00

10110100

For segment “b” :

X X X X

X X

19

1 1

01

1 1

1 0

11

yz

wx

10

11

01

00

10110100

For segment “b” :

X X X X

X X

20

1 1

01

1 1

1 0

11

yz

wx

10

11

01

00

10110100

For segment “b” :

X X X X

X X

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1 1

01

1 1

1 0

11

yz

wx

10

11

01

00

10110100

For segment “b” :

X X X X

X X

22

1 1

01

1 1

1 0

11

yz

wx

10

11

01

00

10110100

For segment “b” :

X X X X

X X

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BCD-to-Excess-3 Code converter

° BCD is a code for the decimal digits 0-9

° Excess-3 is also a code for the decimal digits

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Specification of BCD-to-Excess3

° Inputs: a BCD input, A,B,C,D with A as the most significant bit and D as the least significant bit.

° Outputs: an Excess-3 output W,X,Y,Z that corresponds to the BCD input.

° Internal operation – circuit to do the conversion in combinational logic.

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Formulation of BCD-to-Excess-3

° Excess-3 code is easily formed by adding a binary 3 to the binary or BCD for the digit.

° There are 16 possible inputs for both BCD and Excess-3.

° It can be assumed that only valid BCD inputs will appear so the six combinations not used can be treated as don’t cares.

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Optimization – BCD-to-Excess-3

° Lay out K-maps for each output, W X Y Z

° A step in the digital circuit design process.

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Placing 1 on K-maps

° Where are the minterms located on a K-Map?

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Expressions for W X Y Z

° W(A,B,C,D) = Σm(5,6,7,8,9) +d(10,11,12,13,14,15)

° X(A,B,C,D) = Σm(1,2,3,4,9) +d(10,11,12,13,14,15)

° Y(A,B,C,D) = Σm(0,3,4,7,8) +d(10,11,12,13,14,15)

° Z(A,B,C,D) = Σm(0,2,4,6,8) +d(10,11,12,13,14,15)

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Minimize K-Maps

° W minimization

° Find W = A + BC + BD

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Minimize K-Maps

° X minimization

° Find X = BC’D’+B’C+B’D

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Minimize K-Maps

° Y minimization

° Find Y = CD + C’D’

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Minimize K-Maps

° Z minimization

° Find Z = D’

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Two level circuit implementation

° Have equations• W = A + BC + BD = A + B(C+D)

• X = B’C + B’D + BC’D’ = B’(C+D) + BC’D’

• Y = CD + C’D’

• Z = D’

° Factoring out (C+D) and call it T

° Then T’ = (C+D)’ = C’D’• W = A + BT

• X = B’T + BT’

• Y = CD + T’

• Z = D’

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Create the digital circuit

° Implementing the second set of equations where T=C+D results in a lower gate count.

° This gate has a fanout of 3

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Summary

° Need to formulate circuits from problem descriptions1. Determine number of inputs and outputs

2. Determine truth table format

3. Determine K-map

4. Determine minimal SOP

o There may be multiple outputs per designo Solve each output separately

o Current approach doesn’t have memory.o This will be covered next week.