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325 References Chapter References [ABH93] A. Ast, J. Becker, R. Hartenstein, R. Kress, H. Reinig, K. Schmidt: MoPL- 3: A New High Level Xputer Programming Language; Proceedings of International Workshop on Field Programmable Logic and Applications, FPL’93, Oxford, UK, September 7-10, 1993. [ABH94] A. Ast, J. Becker, R. Hartenstein, R. Kress, H. Reinig, K. Schmidt: Data- procedural Languages for FPL-based Machines; Proceedings of International Workshop on Field Programmable Logic and Applications, FPL’94, Prague, Czech Republic, September 7-9, 1994. [ACS99] O. Agrawal, H. Chang, B. Sharpe-Geisler, N. Schmitz, B. Nguyen, J. Wong. G. Tran, F. Fontana, B. Harding: An Innovative, Segmented High Performance FPGA Family with Variable-Grain-Architecture and Wide- gating Functions; Proceedings of FPGA’99, Monterey, CA, USA, Feb. 21- 23, ACM Press, 1999. [AG94] G. Almasi, A. Gottlieb: Highly Parallel Computing; The Bejamin / Cummings Publishing Company, Redwood City, CA, USA, 1994. [AHR94] A. Ast, R. Hartenstein, H. Reinig, K. Schmidt, M. Weber: A General Purpose Xputer Architecture Derived from DSP and Image Processing; in M.A. Bayoumi (ed.): “VLSI Design Methodologies for Digital Signal Processing Architectures”; Kluwer Academic Publishers, pp. 365-394, 1994. [Alg91a] N.N.: CAL1024; Product Brief, Algotronix Ltd., Edinburgh, Scotland, 1991. [Alg91b] N.N.: CAL1024 Datasheet; Algotronix Ltd., Edinburgh, Scotland, 1991. [All98] G. Allan: DDR SDRAM/SGRAM - An Interpretation of the JEDEC Standard; MOSAID TEchnologies Inc., Ontario, Canada, Sep. 1998. [Alt98] N.N.: Altera 1998 Data Book; Altera Corporation, San Jose, CA, USA, 1998. [And91] G. Andrews: Concurrent Programming; The Benjamin/Cummings Publishing Company, Redwood City, CA, USA, 1991. [AW93] L. Agarwal, M. Wazlowski, et. al.: PRISM-II Compiler and Architecture; Proceedings of the IEEE Workshop on FPGAs for Custom Computing Machines, FCCM’93, Napa, CA, USA, April, 1993.
Transcript

325

References Chapter

References

[ABH93] A. Ast, J. Becker, R. Hartenstein, R. Kress, H. Reinig, K. Schmidt: MoPL-3: A New High Level Xputer Programming Language; Proceedings ofInternational Workshop on Field Programmable Logic and Applications,FPL’93, Oxford, UK, September 7-10, 1993.

[ABH94] A. Ast, J. Becker, R. Hartenstein, R. Kress, H. Reinig, K. Schmidt: Data-procedural Languages for FPL-based Machines; Proceedings ofInternational Workshop on Field Programmable Logic and Applications,FPL’94, Prague, Czech Republic, September 7-9, 1994.

[ACS99] O. Agrawal, H. Chang, B. Sharpe-Geisler, N. Schmitz, B. Nguyen, J. Wong.G. Tran, F. Fontana, B. Harding: An Innovative, Segmented HighPerformance FPGA Family with Variable-Grain-Architecture and Wide-gating Functions; Proceedings of FPGA’99, Monterey, CA, USA, Feb. 21-23, ACM Press, 1999.

[AG94] G. Almasi, A. Gottlieb: Highly Parallel Computing; The Bejamin /Cummings Publishing Company, Redwood City, CA, USA, 1994.

[AHR94] A. Ast, R. Hartenstein, H. Reinig, K. Schmidt, M. Weber: A General PurposeXputer Architecture Derived from DSP and Image Processing; in M.A.Bayoumi (ed.): “VLSI Design Methodologies for Digital Signal ProcessingArchitectures”; Kluwer Academic Publishers, pp. 365-394, 1994.

[Alg91a] N.N.: CAL1024; Product Brief, Algotronix Ltd., Edinburgh, Scotland, 1991.

[Alg91b] N.N.: CAL1024 Datasheet; Algotronix Ltd., Edinburgh, Scotland, 1991.

[All98] G. Allan: DDR SDRAM/SGRAM - An Interpretation of the JEDECStandard; MOSAID TEchnologies Inc., Ontario, Canada, Sep. 1998.

[Alt98] N.N.: Altera 1998 Data Book; Altera Corporation, San Jose, CA, USA,1998.

[And91] G. Andrews: Concurrent Programming; The Benjamin/CummingsPublishing Company, Redwood City, CA, USA, 1991.

[AW93] L. Agarwal, M. Wazlowski, et. al.: PRISM-II Compiler and Architecture;Proceedings of the IEEE Workshop on FPGAs for Custom ComputingMachines, FCCM’93, Napa, CA, USA, April, 1993.

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