1984 Implementation of Cellular-Logic Operators Using 3 3 Convolution and Table Lookup Hardware

8/20/2019 1984 Implementation of Cellular-Logic Operators Using 3 3 Convolution and Table Lookup Hardware

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COMPUTER VISION, GRAPHICS, AND IMAGE PROCESSING

27, 115-123 (1984)

NOTE

Implementation of Ce llular-Logic Operators Using 3 * 3

Convolution and Table Lookup Hardware

FRANS

A. GERRITSEN

Informatics Division, Nationa l Aerospace Laboratory NLR, Anthony Fokkerweg 2,

1059 CM Amsterdam, The Netherlands

AND

PIET W. VERBEEK

Pattern Recogniti on Group, App lied Physics Department, Delf University of Technology,

Lorentzweg I, 2628 CJ, De& The Netherlands

Received January 12,1983; revised February 23,1983 and August 26,1983

Cellular-logic operations such as erosion, dilation, con tour extra ction, ske letonization, local

majority voting, and pepper-and-salt noise remov al are essen tial in process ing binary im ages . It

is shown that cel lular-logic operations, l ike some homom orphic f i l ters, can be constructed from

a 3 * 3 convolution and a nonlinear table lookup, features o f many co mm ercially available

image-processing syste ms . The proposed method extends the f ield of appl ication of such

syste ms from enhancement and other preprocessing of gray-valued images to the processing

and measurement of objects in the segmented image.

1 . I NTRO DUCTI O N

In a number of applications of image processing, the segmentation of gray-valued

images into binary images consisting of objects and background, and the subsequent

processing and measurement of these binary images, are found to be extremely

important and powerful. The class of object/background-oriented operators that is

often used for these processing and measurement tasks is based on the set algebra

developed by Matheron [l] and Serra [2]. The operators that have gained the widest

attention include the erosion operator, sometimes referred to as shrinking (not to be

confused with topology-preserving thinning or shrinking), and the dilation operator.

The erosion and dilation operations may be used to build higher level operations

such as openings, closings, the medial axis transform, and binary template matching

[l-5]. The class of cellular-logic operations also includes such operations as binary

contour extraction, local majority voting and pepper-and-salt noise removal.

Over the past ten years, a number of hardware systems for the processing of

pictorial information have been designed and implemented. Some systems were

designed with the cellular-logic operators in mind, such as the Golay Logic Processor,

GLOPR [6,7], the diff3 system [8], the PICAP- system [9], the Leitz Texture

Analysis System, TAS [lo], the CLIP processor arrays [ll], the Cytocomputer [12],

and the Delft Image Processor, DIP-l [13, 141. Overviews of this class of systems

have been given by Preston et al. [15] and by Danielsson and Levialdi [16].

However, the more readily commercially available image-processing systems (such

as the COMTAL VISION/ONE system, the VICOM system, and the De Anza and

115

0734-189X/84 3.00

Copyright 6 1984 by Academic Press, Inc.

All rights of reproduction in any form reserved


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116 GERRITSEN AND VERBEEK

12S systems) do not include hardware specialized in cellular-logic operations. In-

stead, configuration options which may be incorporated into the processing loops of

such systems include lookup tables for pixel-by-pixel table lookup and also multipli-

cation and addition hardware for (almost) real-time convolution of the image array

with a 3 * 3 filter-coefficient convolution kernel.

The purpose of this paper is to show that such commercially available image

processing systems may be programmed in a straightforward way to execute nonlin-

ear cellular-logic operations with the same speed (and using the same hardware) as

the 3 * 3 linear filter convolutions.

As ‘a result, the applicability of these hardware options (until now limited to

enhancement and other preprocessing) is extended into the fields of processing and

measurement of objects in the segmented image.

2. IMPLEMENTATIONS OF THE CELLULAR-LOGIC OPERATORS

As far as the authors are aware, the literature shows that the cellular-logic

operators may be implemented by using special-purpose hardware in one of three

(major) different ways: the neighborhood table lookup approach, the processor-array

approach, and the run-list processing approaches. These approaches will be dis-

cussed in the following sections.

2.1. The Neighborhood Table Lookup Approach

The neighborhood table lookup approach (which is used in, e.g., GLOPR, diII3,

PICAP-1, TAS, Cytocomputer, and DIP-l) is illustrated in Fig. 1. In binary images,

512 possible 3*3 neighborhood configurations exist. By using shift registers, the

9-bit binary data of every 3 * 3 neighborhood are assembled and used as address for

table lookup in a 512-entry table memory. The contents of the table memory

determine the nature of the operation applied. Preferably, this table memory should

be writable (e.g., from a host computer).

This method of implementation is ideally suited for raster-scan-oriented applica-

tions, because (after an initial delay) results are produced at the same rate in which

operands are entered: every time a new binary pixel is shifted into the shift register,

the 3 * 3 neighborhood is translated by one position in the direction of the scan and

a new result becomes available at the output of the table memory.

Variations on this method include: hexagonal raster scanning (using 128 distinct

configurations, or 14 if only quasi-rotation-invariant operators are allowed; origi-

nally proposed by Golay and used in GLOPR, diII’3, and TAS); pipelining of

multiple stages of lookup tables (used in Cytocomputer, among other reasons, to

emulate neighborhoods larger than 3*3); the use of concurrent multiple table

lookup (illustrated in Fig. 1 and used in DIP-l), for instance to transform a binary

image into a 4-bit image, of which 1 bit indicates the presence of a binary contour

and the remaining 3 bits of each resulting pixel give the Freeman chain code of the

contour; the combination of nonrecursive table lookup as described with recursive

table lookup (proposed by Rosenfeld and Pfaltz [17]), e.g., for topology-preserving

thinning (Hilditch’s method [18], used in modified form in DIP-l).

In general-purpose computers the shift registers may be circumvented by assem-

bling the 9-bit address by sequentially OR-ing versions of the binary operand image

that have been shifted, both in position and in bitplane.


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IMPLEMENTATION OF CELLULAR-LOGIC OPERATORS 117

SERIAL OUTPUT OF

RESULTING PIXELS

( K BIT/PIXEL L

CELLULAR - LOGIC

LOOK - UP TABLE

TAPSP*,. ., P.

from shift re er

CURRENT

BINARY

NEIGHBORHOOD

SHIFT REGISTER

SHIFT REGISTER

SERIAL INPUT

OF BINARY PIXELS

OF SEGMENTED

IMAGE

( 1 BIT/PIXEL,

N PIXELSPER LINE )

FIG . 1. In the neighborhood table lookup approach , shift registers are used to assem ble and update

the 9 bits of the current 3 * 3 binary neighborhood. Thes e 9 bits are used as address for table lookup in a

512-entry lookup table.

Also the method proposed in this paper is a variation on this method, (ab) using

3 * 3 convolution hardware for the 9-bit address assembly.

2.2. The Processor-Array Approach

In the processor-array approach (which is used in CLIP 4, for instance) the

interconnection pattern of the processor array assures rapid access to neighboring

pixels. Each processing element receives the binary values of its neighbors and

applies the cellular-logic operation by directly computing the appropriate logical

combination of the nine neighbors. The simple logical combination needed for a

dilation may, e.g., be performed by CLIP 4 in a single (array) instruction step.

In general-purpose computers, the sequential analog of this direct computation

approach (computing the appropriate logical combination of the binary operand


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118

GERRITSEN AND VERBEEK

image and versions shifted in eight directions) may be seen as an alternative for the

neighborhood table lookup approach.

2.3. The Run-List Processing Approaches

The run-list processing approaches were originally designed as software methods

for use in general-purpose computers. These methods drastically reduce the compu-

tational complexity by using the fact that cellular-logic operators do not affect the

interiors of object or background. Consequently, these methods operate on the image

in some coded format. Of the formats which are in use for the coding of binary

images (e.g., Freeman chain code, run-length code, run-start/stop code, RC-code),

only the run-start/stop code (Young

et al.

[19], Verbeek and Young [20]) and the

RC-code (Cederberg [21, 221) have been shown to allow direct implementation of

cellular-logic operators. As far as the authors are aware, these methods have not yet

been implemented in special-purpose hardware.

3. THE PROPOSED METHOD

3.1. Principle of the Proposed Method

The method proposed in this paper is a variation on the method described in

Section 2.1.

A 3 X 3 window is moved over the original binary image. At one position of the

window let the pixels framed be

p3 p2 Pl

p4 p* PO

ps 4 p7

Each Pk is either 0 or 1 and may be seen as a separate bit. The bits are concatenated

into a string

P P P P P P P P P

The string is then interpreted as the address

8 7 6 5 4 3 2 1 0 ’

A in a 512-entry l-bit-wide table. The content at address A is the new value of the

central pixel.

This procedure is also followed in the existing method. What can be improved

pertains to commercial avai labil ity rather than to processing quality. Most commer-

cial image-processing systems (mere display systems included) feature at least 3 * 3

convolution. They contain the moving-window mechanism and would have the

values

Ps, P,, . . . , PI, PO

at hand when 3 * 3 convolution would be applied to a

binary image. However, the absence of a concatenation mechanism generally pro-

hibits fast cellular-logic operations. This is all the more unfortunate as the table

lookup option needed for the concluding step of the operations is quite common in

these systems.

We now propose to close the gap, realizing that the address string Ps, P7,. . . , PI, PO

(interpreted as the 9-bit number

A)

can be calculated by

A= f:z”P,.

k=O

Comparing this to the calculation of the new gray value B of the central pixel by a


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IMPLEMENTATION OF CELLULAR-LOGIC OPERATORS

119

A = 5 0 8 , 0

5 x 5 p a r t o f b m a r y

, m a g e a n d cw r e nf

3 x 3 n e l g h b o r h o o d

COnYOlUt lOn

filter

caefflcientr

wK=zK

bit st r ing of tnne r product of cur rent

n e ig h b o r h o o d a n d f i lt e r- co ef f ic ie n t a r r a y

u se d a s a d d r e ss A f o r t a b le lo o k - u p

FIG. 2. Construction of table address by 3 * 3 convolution

linear convolution with coefficient scheme

which is written as

8

B = c W,P,

k=O

we find that the addresses A can be calculated through linear convolution (instead of

concatenation) when W, = 2k is chosen for the coefficient scheme (see Fig. 2). More

explici tly, the coefficient scheme is

8 4 2

16 256 1.

32 64 128

In other words, cellular-logic operators can be described as convolution with a

special coefficient scheme, followed by a table lookup. It is piquant to realize that the

alternate application of linear filters and table lookups is as old as homomorphic

filtering (see Oppenheim et al. [23]).

3.2. Extensions of the Principle

One trivial extension exploits the fact that only one bit of the usually at least 8-bit

content of lookup tables has been used so far. Clearly each of the bits may be used

to store a separate table such that up to eight operations can be performed in

parallel.

In the previous section it was suggested that all nine pixels in the 3 * 3 window

must be taken into account. However, for operations based on other connectivities


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than S-connectivity some don’t cares may be defined through insertion of zeros in

the coefficient scheme. For 4-connectivity, the scheme is

0

2 0

4 16 1.

0 8 0

Hexagonal grids can be nicely mapped onto square grids when each line is shifted

by one-half grid-unit with respect to the previous line. For such a representation the

hexagonal 6-connectivity is mapped into Pavlidis ’ 6-connectivity [24]. The corre-

sponding coefficient scheme in our method is

4 2 0

8 64 1.

0 16 32

For quatemary images (where pixel values may be 0, 1, 2, or 3) the method may

be used in 4-connectivity operations. The powers of 2 must then be replaced by

powers of 4, as follows:

A = 2 4kP,k

k=O

with scheme

0

4 0

16 256 1.

0

64 0

In this case the table contents should also have double width in order to yield a

quaternary output image. One might argue that this version lies outside the field of

cellular logic.

3.3. Examples and Practical Considerations

Examples of the lookup tables used for binary pepper-and-salt noise removal,

8-connected dilation, and S-connected erosion are given in Tables 1 through 3.

As many image-processing systems have S-bit gray-value representation, their

lookup tables are possibly restricted to 256 entries. In such a case the method is

TABLE 1

Cellular-Logic Lookup Tab le for Rem oving Binary Pepper-and-Salt Noise

Situation in current neighborhood Addre ss A Content

No t all neighbors 1 Cen ter 0

0

to

254 0

All neighbors 1 Cen ter 0

255 1

All neighbors 0 Cen ter 1 256 0

No t all neighbors 0 Cen ter 1 257 to 511 1

Note . Pixels which are total ly surrounded by inverse-valued pixels are set to

the value of their neighbors.


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121

TABLE 2

Cellular-Logic Lookup Table for &C onnecte d D ilation

Situation in current neighborhood Addre ss A Con tent


No t all neighbors 0 Cen ter 0

1 to 255 1

Neighbors don’t care Center 1 256 to 511 1

TABLE 3

Cellular-Logic Lookup Table for S-Co nnected Erosion

Situation in current neighborhood Addre ss A

Content

Neighbors don’t care Center 0 0 to 255 0

No t all neighbors 1 Cen ter 1 256 to 510 0


TABLE 4

Cellular-Logic Lookup Table for Rem oving Binary Pepper-and-Salt Noise

That May Be Used when the Maxim um Length of the Lookup

Table is 256

Situation in current neighborhood

All neighbors 0

Not all neighbors 0

and not all neighbors 1

All neighbors 1

Address A’ Content

0

00

1 to 254 10

255 11

Nofe. In a subsequent 8-entry table, the center pixel value is used to

choose between the 2 bits of the table’s content.

adapted as follows. The coefficient scheme

8 4 2

16 0 1

32 64 128

is chosen, which implies that the value of the central pixel in the original image is

not yet taken into account. This central pixel would have determined if the first or

the second half of the 512-entry table should have been addressed. We store these

halves in two separate 256-entry tables, that can readily be combined into one

256-entry 2-bit table. The central value Ps is then used to determine if the left or the

right bit in the content found at the address A’ with

A’ = i 2kPk

k=O

is to be chosen as the new value (an example is given in Table 4). This may be


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achieved through a simple entry table. Note that the number of possible parallel

operations is halved.

4. GENERAL REMARKS AND C ONCLUSIONS

Concluding, we may say that we provide the owners of commercially available

image-processing systems (such as VICOM, COMTAL Vision One, 12S, and

De Anza), through a simple abuse of the convolution and table look-up abilit ies,

with the tool set of cellular-logic operators for binary images.

The execution speed of cellular-logic operators with our method depends, of

course, on the execution speed of 3 * 3 convolutions. For example, using the VICOM

system the execution speed of cellular- logic operators is 40 ms for images with

512 x 512 pixels.

In pipelined vector or array processors, the method can be used as a flexible test

bench until the concatenation of neighborhood bits into address strings has been

microprogrammed.

By using several bits of the table output, the method may be used to compute

several cellular-logic operations at a time.

If larger coefficient schemes are allowed, one may easily implement other sizes and

shapes of neighborhoods (which may lead to novel operators), keeping in mind that

the lookup table length restricts the number of nonzero coefficients (i.e., the number

of relevant pixels in the neighborhood).

The number of bits per pixel is easily traded off against the number of relevant

pixels in the neighborhood.

As first convolution and then table lookup are performed on the whole image, the

method is restricted to nonrecursive operations. This excludes Hilditch skeletoni-

zation [18], but allows the Arcelli skeletonization method [25].

ACKNOWLEDGMENTS

We thank J. J. Gerbrands and R. J. van Munster for trying out the method on a

VICOM system and an FPS AP-120B array processor, respectively,

REFERENCES

1. G. Matheron,

Random Sets and Integral

Geometry, Wiley, New York, 1975.

2. J. Serra, Applied Mathematical Morphology, SIAM, Washington, D.C . , 1975.

3. T. Hersant, D. Jeul in, and P. Pamiere, Basic Notions of Mathem atical Morphology used in Quantitative

Metallography, Vols. 1-5, Insti tut de Recherches de la Siderurgie Francaise, St. Germain en Laye,

1976.

4. L. A. Lyusternik, Convex Figures and Polyhedra, D. C. Heath, Boston, M ass. , 1966.

5. F. C. A. Groen, Local transformations, in Course on Pattern Recogni tion and Image Processing 1978

(C. .J. D. M. Verhagen, Ed.), Pattern Recognit ion Group, Appl ied Physics Depa rtment, Delft

University of Technology, D elft , 1978.

6. M. J. E. Golay, Apparatus for Counti ng Bi-N ucleate Lymphocytes in Bloo d, U.S. Patent 3,214,574,

1965 (fi led 1959).

7. M. J. E. Golay, H exagonal parallel pattern transform ations, IEEE Trans. Comput. C-18, 1969,

733-740.

8. D. Graham and P. E. Norgren, The difD analyzer: A parallel/serial Golay image processor, in

Real-Time Medical Image Processing (M. Onoe, K. Preston, Jr., and A. Rose nfeld, Eds.), pp.

163-182, Plenum, London/New York, 1980.

9. B. Kruse, Design an d Imple ment ation of a Picture Processor, Science and Technology Dissertations,

No. 13, University of Linkoeping, Linkoeping, 1977.

10. J. C. Klein and J. Serra, The texture analyzer, J. Microsc. 95, 1977, 349-356.


9/9


123

11. M. J. B. Du ff, Parallel processors for digi tal image processing, in Advances in Dig ital Image Processing

(P. Stucki, Ed.), pp. 265-279, Plenum, New York, 1979.

12. S. R. Stem berg, Language an d architecture for parallel image proces sing, in Proceedings, Conference

on Pattern Recogni tion in Practice, May 21-31, 1980, pp. 35-44, North-Hol land, Amsterd am.

13. F. A. Genitsen and L. G. Aardema, Design and use of DIP-l : A fast, f lexible and dynamical ly

microprogrammable image processor, Pattern Recognition 14, 1981, 319-330.

14. F. A. Gerri tsen, Design and Implementation of the Delft Image Processor DIP-l, Ph.D. dissertation,

Appl ied Physics Departm ent, Delft University of Technology, D elft , 1982.

15. K . P reston, Jr., M. .I . B. Duff, S. Levialdi , P. E. Norgren, and J. I . Toriwaki, Basics of cel lular logic

with some appl ications in biomedical image processing, Proc. IEEE 67, 1979, 826-856.

16. P. E. Danielsson and S. Levialdi , Comp uter architectures for pictorial information syste ms , Computer

14 (11) 1981, 53-67.

17. A. Ros enfeld and J. L. Pfa ltz, Sequential o perations in digital p icture proces sing, J. Assoc. Compu t.

Much. 13, 1966, 471-494.

18. C . J. Hi ldi tch, Linear skeletons from square cupboards, in Machine Intelligence 4 (B. Meltzer and D.

Michie, Ed s.), pp. 403-420, University Press, Edinburgh, 1969.

19. I. T. Young, R. L. Peverini, P. W . Verbeek, and P. J. van Otterloo, A new implementation for the

binary and Minkow ski operators, Computer Graphics and Image Processing 17, 1981, 189-210.

20. P. W . Verbeek and I. T. Young, Binary operations on run-coded images, in Proceedings, 4th European

Chromosom e Analysis Workshop, Edinbur gh,

Murch

25-27, 1981, MR C, Western General

Hospital, Edinburgh.

21. R. L. T. Cederberg, Shrinking of RC-coded binary patterns, in Proceedings 5th ICPR, Miam i Beach

(Florida), Dec. l-4, 1980, pp. 1019-1022.

22. R. L. T. Cederberg, Thinning of run-length coded binary images, in Proceedings, 2nd Scandinav ian

Conference on Image Analysis, Helsinki (Finland), June 15-l 7, 1981, pp. 24-28.

23. A. V. Oppenheim, R. W . Schaefer, and T. G. Stockha m, Non-l inear f i ltering of mult ipl ied and

convolved signals, Proc. IEEE 56, 1968, 1264-1291.

24. T. Pavl idis,

Structural Pattern Recogni tion,

pp. 57-63, Springer-Verlag, Berlin/New York, 1977.

25. C . Arcelli, L. Corde lla, and S. Levialdi, Parallel thinning of binary p ictures, Electronics Lett. 11, 1975,

148-149.

26. P . W . Verbeek and F . A. Gerri tsen, Cel lular logic on 3 X 3 convolution hardwa re, in Proceedings,

SPI E Conference, Geneua (Switzerland), April 18-22, 1983, paper 397-76.

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1984 Implementation of Cellular-Logic Operators Using 3 3 Convolution and Table Lookup Hardware

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