2005 Jan 28Meudon FASR Meeting 1 / 25 FASR Subsystem Testbed (FST) Overview Meudon Meeting 28 Jan...

2005 Jan 28 Meudon FASR Meeting 1 / 25

FASR Subsystem Testbed (FST)Overview

Meudon Meeting

28 Jan 2005


Overview of Project

• Proposed Goals

• Hardware Overview

• Current Status

• Time-line / Schedule


Proposed Goals• RFI Mitigation

– Interferometric and total power observations of terrestrial and satellite sources of radio interference

– Characterization of interference levels relative to solar signal

– Development of RFI mitigation strategies• Identify interference frequencies and blank/remove

(determine optimum frequency resolution)• Identify intermittent interference and use frequency

if okay, but blank if not• Produce “fast” algorithms that can work in real time


Distance Measuring Equipment Aircraft Interference


Blanking Performance


Proposed Goals• Calibration Strategies

– Investigate the use of satellite beacons for calibration– Investigate methods of calibrating across band vs.

integrated band—is the band calibration separable?

• Support FASR correlator design task• Solar Observations

– Observe type III and other dm bursts– Verify phase closure and measure centroid position

as a function of time and frequency– Obtain type III trajectories, fragmentation


Hardware Overview

LNAFeed

To existingOVSA receivers

RFsplitt

er

Block Down-converter

PSI

OpticalTransmitter

OpticalReceiver

Spectral LineDown converter

Digitizer PC storageSoftwarecorrelator

Fiber

Figure 1: system block diagram. The existing OVSA infrastructure will be utilized for antenna pointing and control ofthe front ends (feeds, LNA, and noise cal)

Front End Box Control Room Chassis

Ctrl Rm PC Remote PC

Colors denote different locations• blue = front end box (thermal control?)• orange = chassis in control room• yellow = PC in control room• green = remote PC

System Block Diagram


Storage PC

• Two Raid-0 250 GB SATA disks (sustained transfer speed better than 40 MB/s)

• 3.2 GHz CPU• 2 GB RAM• External 250 GB disk (for data transport?)• DVD+RW disk writer (for selected data transport)• CD-RW disk writer


Digitizer• 4 channels

• 1 GHz bandwidth

• 1-4 GS/s sampling rate

• Acquisition memory 2 Mpoints / channel

• Full front-end amplification with internal calibration

• Mezzanine front-end with input protection

• Complete pre- and post-triggering

• Multi-purpose I/O connectors for trigger, clock, reference and control signals

• Low dead-time (< 800 ns) sequential recording with time stamps for up to 8000 segments

• Built-in 5 ps Trigger Time Interpolator (TTI) for accurate timing measurements

• 1 GHz Auto-Synchronization-Bus (ASBus) for trigger and clock signal distribution

• Modular, 6U CompactPCI standard (PXI compliant)

• Low power (< 40 W)

• High-speed PCI bus transfers data at sustained rates up to 100 MB/s to host PC

• Device drivers for Windows 95/98/NT4.0/2000/XP, VxWorks and Linux

• Auto-install software with application code examples for C/C++, Visual Basic, MATLAB, National Instruments LabVIEW and LabWindows/CVI

Acqiris DC271 + Cougar Chassis

Tests show excellent performance:

• Phase jitter (time synchronization, 30 ps)

• Triggered acquisition (segments)

• Sustained transfer speed (74 MB/s)

• Retrigger time (700 ns)

• Aliasing characteristics


Spectral Line Downconverter



OVRO mmArray Spectral Line Downconverter Monitor and ControlPhycore XAC CAN Module

1.0-5.0GHzRF1

Spectral Line Downconverter PCB

CANNetwork

RESETRS-485

TIMEREFRS-485

PHASEREFRS-485

RJ45 Signals

AD7814Temperature

Sensor

AT25640Compensation

EEPROM

3

3

3 dBPad

MGA-82563G=14-20 dB

0-31.56-bit

DigitalAttenuator

6 dBPad

8 dBPad*

MCA-50LHLFTC-1350

AD8345QuadratureModulator

Gain=20 dB

Q P

os

Q N

eg

I P

os

I N

eg

DAC7624Quad 12-Bit

D/A Converter

12 3

6 dBPad

8 dBPad*

MCA-50LH LFTC-1350AD8345

QuadratureModulator

Gain=20 dB

Q P

os

Q N

eg

I P

os

I N

eg

DAC7624Quad 12-Bit

D/A Converter

12 3

90 DegHybrid

Coupler

6 dBPad

MatchingTransfomer

MatchingTransfomer

In-PhasePower

Combiner

AD8313Log Amp

HittiteVVA

AD8313Log Amp

IFOUT+6.0dBm

SGA-6485G=20.0 dB

PsysA/D

IFOUTVVA

Control

IFOUTPower

A/D

Analog/Digital Closed LoopControl Mode Selector

HMC346MS8G

3 dBPad*

IFOUTVVAA/D

INA-10386G=26.0 dB

INA-10386G=26.0 dB

RFINPOWER

RFINPOWER

2.0-4.0GHzLO

HMC311LP3G=14.0 dB

HMC311LP3G=14.0 dB

HMC311LP3G=14.0 dB

HMC311LP3G=14.0 dB

HMC311LP3G=14.0 dB

HMC424LP3G=-2 dB

3 dBPad*

3 dBPad*

2

NoiseCoupler

0.5-1.0GHz

Noise

3 dBPad*

500 MHz

250 MHz

125 MHz

62.5 MHz

8 dBPad

9 dBPad

6 dBPad

3 dBPad

8 dBPad*

2

3 dBPad*

SelectableBandpass

Filter

*Denotes DiscreteResistor Pad

6 dBPad

6 dBPad


Image Rejection

Gain vs. IF Output Frequency for Max, Mid, and Min Gain Settings

-10

10

30

50

70

90

400 500 600 700 800 900 1000 1100

Frequency (MHz)

Gai

n (

dB

)

Max GainMeasured Gain

Mid GainMeasured Gain

Min GainMeasured Gain

Gain vs. IF Output Frequency for Max, Mid, and Min Gain Settings

-30

-10

10

30

50

70

400 500 600 700 800 900 1000 1100

Frequency (MHz)

Gai

n (

dB

)

Max GainMeasured Gain

Mid GainMeasured Gain

Min GainMeasured Gain

Image Rejection vs. IF Output Frequency for Max, Mid, and Min Gain Settings

05

10

15202530

354045

400 500 600 700 800 900 1000 1100

Output Frequency (MHz)

Rej

ecti

on

(d

B)

Max Gain Image Rejection

Mid Gain Image Rejection

Min Gain Image Rejection



Spectral Line Downconverter History

Downconverter

Revision

Material RF

Input

(GHz)

LO

Freqs

(GHz)

Baseband

Frequency

(GHz)

Cobra FR4

T=10 mil, W=18 mil

Microstrip

0.5 - 4.5 2.0, 2.5, 3.0, and 3.5

0.5-1.0

SZA Wideband RO4350

T=10 mil, W=22 mil

Microstrip

1.0 - 5.0 2.0, 2.5, 3.0, 3.5 and 4.0

0.5-1.0

Spectral Line RO4350

T=20 mil, W=31 mil,

G=11 mil

GCPW

1.0 - 5.0 Many between 2.0 – 4.0

0.5-1.0


Block Downconverter

5 GHz2-waySwitch

MiniCircuitsZLC-5G

Amp

Pad

9 GHZLPF

1-5 GHzBPF

MCLI PS2-82

MarkiMicrowaveM2-0218LA

Block downconverterHMC232G8

MiniCircuitsZJL-5G

+13dB gain

Pad

Level=-28dBmto -10dBm

-31dBm to-13dBm

1-9GHzsplitt

er

Figure 3: Block diagram of the block downconverter which produce 1-5 GHz RF signal switchable within 1-9 GHz range

CTI 10GHz phaselocked Oscillator

1-9 GHz1-5 GHz

9-5 GHz

Same design as for CARMA—mechanical design for chassis exists.

Need three of items in box, one of items for LO

Control Item: switch (1-5 vs. 9-5 GHz bands)

RF from optical receiver

1-5 GHz IFto spectral linedownconverter


Optical Link

Amp?

PAM

MCLZFBT-4R2G

Laser NEC0228Q

002

DiscoveryDSC50S

s/n 500213 AmpJCA08-111

Feed

Bias tee

Single modeoptical fiber

To existingOVSA receivers PSI 1601 Analog Fiber-Optic Link

Weinschel1580

RFsplitt

er

Figure 2: PSI 1601 Analog Fiber-Optic Link with Post Amplifier Module (PAM)

Same design as for CARMA—Photon Systems Inc already agreed to make them for us.

Plan to set one up in lab for end-to-end test

Control Item: PAM (post-amplifier module)

Monitor Items


Post-Amplifier Module


Current Status• Lab at NJIT has been developed for setup and test of hardware

design.• Digitizer and PC are available for testing. All tests so far are very

encouraging. LabView software for acquisition, quick look, and playback have been developed.

• Spectral line downconverter not yet available, but similar one is available for testing of setup and procedures.

• Block downconverter is understood to part level, but not yet purchased and tested.

• Optical link will be ATA 11 GHz link (also used for CARMA)—provided by PSI. Details yet to be worked out.

• PAM (post-amplifier module) appears to be needed. Cost and complexity of operation are unknown.

• Mechanical design as yet completely undeveloped. CARMA mechanical design is available as a guide.

• Control software not yet developed. CARMA software is available as a guide.


Time-Line / ScheduleNJIT:2005 Feb: CARMA board testing begins2005 Apr: PAM module and optical link assembled, Spectral line downconverter

obtained.2005 July: NJIT hardware mockup complete2005 Aug: Control system functional at NJIT2005 Sep: Hardware mechanical design complete2005 Nov: Parts obtained for two additional channels2005 Dec: Hardware shipped to OVRO

Berkeley:2005 Feb: Draft data format2005 May: Software correlator (IDL code) functional at basic level, working on

NJIT test data2005 July: Data format complete2005 Sep: Definition of software correlator “plug-in” modules begun2006 Mar: Software correlator “plug-in” modules ready for testing


Time Line / Schedule (cont’d)Maryland:2005 Apr: Observing / Acquisition sequence definition for various modes

(terrestrial RFI, satellite RFI, satellite calibration, solar+RFI, solar bursts)2005 Jun: Strategies for characterization of RFI from data2005 Aug: Begin exploring amp/phase data from NJIT (test inputs)

OVRO:2005 May: Trenching begins at OVRO2005 July: Optical cable and racks / dog boxes for equipment installed at

OVRO2005 Dec: Hardware installed at OVRO—testing begins2006 Jan: Satellite data taken for calibration / phase closure demo2006 Jan: Solar / RFI data taking begins

Caltech:2005 Feb: Software for controlling CARMA board2005 May: Spectral line downconverter2005 Jun: Software for controlling spectral line downconverter2005 Nov: 3 additional downconverters plus hardware chassis


FOCIS

FASR Offline Correlator Implemented in Software


FOCIS Philosophy

FOCIS plays the roll of all the hardware and software between the digitized IF and the interim

database.

•This implies what FOCIS should do.

•It also implies what tasks are outside its scope.


FOCIS Inputs

• Primary input data:– Data sample files generated by NJIT acquisition system

– OR Simulated data files generated by UCB software

• Metadata file to support identification of appropriate input file• CLI-specified analysis parameters• Future option: (Simulated) RFI and calibration database files• Otherwise, all input ancillary parameters required for analysis should

be included in the data sample files.

• Each independent execution analyzes a single scan (or part thereof).• FOCIS has no knowledge of overall objective of scan.


FOCIS Outputs

• Primary output is semi-calibrated visibility files that mimic the interim database.

• Output displays will mimic the role of possible realtime correlator displays.

• Additional displays and analysis will be limited to features that directly support debugging or prompt evaluation of output.

• It is assumed that analysis of the FOCIS output files uses software developed elsewhere (Umd?)


FOCIS Implementation

• Optimized for transparency and flexibility in analysis options.

• Not necessarily optimized for speed.

• IDL-coded using ssw support as needed.

• Developed to run on normally configured Windows PC’s (expected, but not guaranteed to also run on Unix workstations)


Correlator Flow Diagram?

Downsampling?

E.g. 3 bit

Delay Adjustments

FFT or Polyphase

Filter

RFI Flagging

Correlation

Complex Gain Adjustments

Averaging / Accumulation

Frequency Averaging

From other channel

RFI Database

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