+ All Categories
Home > Documents > 2.2.3 Astable Circuits

2.2.3 Astable Circuits

Date post: 03-Jun-2018
Category:
Upload: rafaeltituz
View: 226 times
Download: 0 times
Share this document with a friend

of 18

Transcript
  • 8/12/2019 2.2.3 Astable Circuits

    1/18

    Topic 2.2.3 Astable Circuits.

    Learning Objectives:

    At the end of this topic you will be able to;

    recall that an astable circuit has two unstable states;

    explain the operation of a circuit based on a Schmitt inverter, and

    estimate the operating frequency usingRC

    f 1 ;

    draw the circuit diagram for an astable using a 555 timer i.c.;

    select and use formulae for

    o the time the output is high: CRRt BAH )(. += 70

    o the time the output is low: CRt BL 70.=

    o the frequency: CRRf

    BA )(. 270

    1

    +

    =

    calculate the mar space ratio;

    1

  • 8/12/2019 2.2.3 Astable Circuits

    2/18

    Module ET2

    Electronic Circuits and Components.

    Astable Circuit.

    !n our previous section we looed at the behaviour of a monostable circuit,i.e. a circuit with "ust one stable state. !n this section we will be looing at

    the astable circuit. #he astable circuit has no stable state and is constantly

    switching between logic $ and logic %. Alternative names for the astable are a

    pulse generator or cloc.

    #he astable is a very useful circuit in electronics as it the circuit responsible

    for causing flashing lights, pulsing bu&&ers in alarm circuits and eeping

    counters running as we found out in module '#$, even though we didn(t loo at

    how the cloc was produced at that time.

    )nce again we will be considering two different methods of producing an

    astable circuit. #he first method involves the use of a special type of *)#

    gate, called a Schmitt *)# gate, or Schmitt inverter. #he symbol for the

    Schmitt inverter is as follows:

    #he Schmitt *)# gate has a unique switching characteristic which is very

    different to the standard *)# gate. #he following diagrams illustrate the

    difference between to two.

    2

    0 1 2 3 4 5 VIN

    VOUT

    5

    4

    3

    2

    1

    00 1 2 3 4 5 V

    IN

    VOUT

    5

    4

    3

    2

    1

    0

    Switching Characteristic

    for a stanar NOT !ate

    Switching Characteristic

    for a Sch"itt NOT !ate

    A Q

  • 8/12/2019 2.2.3 Astable Circuits

    3/18

    Topic 2.2.3 Astable Circuits.

    +ooing at the two characteristics you should notice that for a standard *)#

    gate operating on a 5 supply that the switching point is at the midpoint of

    the supply voltage for an increasing or decreasing input voltage.

    -omparing this to the Schmitt characteristic reveals a different situation

    altogether. As !*increases the voltage has to increase above before the

    output voltage changes. )nce the output has changed however, if the input is

    then decreased bac to , the output does not change bac, as it would in

    the normal case, but now the voltage has to fall to below / before the

    output will go high again.

    0e have therefore created some hysteresis in the *)# gate with two

    distinct switching thresholds. 0e can use this to our advantage to mae an

    astable timer with the addition of "ust a resistor and a capacitor. #he circuit

    required is shown below.

    #his is a very simple circuit, but very reliable, requiring the minimum number

    of components, and taing up very little space on a circuit board.

    #he frequency of the output is given by the approximationRC

    f 1

    3

  • 8/12/2019 2.2.3 Astable Circuits

    4/18

    Module ET2

    Electronic Circuits and Components.

    1ow does it wor2

    Assume that initially there is no charge on the capacitor, so the input

    to the *)# gate will be +ogic %, so the output is at +ogic $.

    #he capacitor begins to charge through the resistor R1and so the

    voltage at the input of the *)# gate starts to rise.

    0hen the voltage at the input reaches the upper switching threshold,

    the output of the logic gate changes to +ogic %.

    #he capacitor now starts to discharge through the resistor R1, and

    the voltage across the capacitor begins to fall.

    0hen the voltage at the input reaches the lower switching threshold,

    the output of the logic gate changes to +ogic $ again,

    #he capacitor starts to charge through R1again and the wholeprocess repeats as long as the power is switched on.

    ote : !"en selecting t"e resistor #or t"e $c"mitt astable circuit %ou

    s"ould ensure t"at t"e minimum value o# resistance c"osen is

    &'(. T"is )ill limit t"e current #lo)ing to an acceptabl% lo)

    value* and prevent over"eating o# t"e $c"mitt i.c. device.

    4

  • 8/12/2019 2.2.3 Astable Circuits

    5/18

    Topic 2.2.3 Astable Circuits.

    #he addition of an oscilloscope to the circuit, shows this happening, as shown

    below:

    #he red trace, shows the voltage at the input to the Schmitt *)# gate, the

    blue trace shows the voltage at the output of the Schmitt *)# gate.

    *otes:

    $. #he first cycle lasts longer than subsequent pulses as the

    capacitor has to charge up from %, to the upper switching

    threshold.

    /. After the first cycle the capacitor charges and discharges

    between the upper and lower switching threshold of the Schmitt

    *)# gate.. #he 3)n( time, and 3)ff( time are of the same duration.

    5

  • 8/12/2019 2.2.3 Astable Circuits

    6/18

    Module ET2

    Electronic Circuits and Components.

    #he Schmitt *)# gate solution is a very simple, neat and reliable solution if a

    simple cloc, or pulse generator is required. 1owever if you want to have a

    different 3on( and 3off( time then this simple circuit cannot perform thisaction, and we need to consider a more complex solution.

    #he second method of maing an astable timer is to use a familiar device in

    the 555 timer we used for the monostable timer. #his versatile device can

    also be configured to run as an astable timer, by maing the connections

    shown below:

    #he circuit has many similarities with the monostable option, and it is

    important to ensure that you do not confuse the two as %ou are e+pected to

    be able to dra) t"is circuit in t"e e+amination.

    #here are three formulae that apply to this circuit, allof which areprovided

    on the -andidate !nformation page at the front of ever%examination paperso you do nothave to remember them.

    o the time the output is high: CRRt BAH )(. += 70

    o the time the output is low: CRt BL 70.=

    o the frequency: CRRf

    BA )(. 270

    1

    +

    =

    4rom these formulae we can see that the 3on( time is always greater than the

    3off( time, but will be approximately the same if RBRA.

    #

    $%

    $&

    C

  • 8/12/2019 2.2.3 Astable Circuits

    7/18

    Topic 2.2.3 Astable Circuits.

    0e can confirm this by adding an oscilloscope to the output of the 555

    astable circuit to see what the output loos lie.

    1ere we can see that with the two resistors equal in value, the 3on( time is

    approximately twice as long as the 3off( time. !fR1

    is changed to $6 andR2

    changed to $%%6 then output becomes as shown below, where the 3on( time is

    virtually equal to the 3off( time.

    '

  • 8/12/2019 2.2.3 Astable Circuits

    8/18

    Module ET2

    Electronic Circuits and Components.

    ote : !"en selecting resistors #or t"e ,,, timer circuit %ou s"ould

    ensure t"at t"e minimum value o# resistance c"osen is &'(. T"is

    )ill limit t"e current #lo)ing to an acceptabl% lo) value* andprevent over"eating o# t"e ,,, i.c. device.

    T"e Mar'-$pace atio.

    A common way of specifying the parameters of an astable circuit are in terms

    of the 7ar8Space ratio. #his sounds complicated but actually is quite

    straightforward. #he 37ar( refers to the 3)n( time, the 3Space( is simply the

    3)ff( time. So if an astable is specified as having a 7ar8Space ratio of :$,

    then the 3on( time must be three times as long as the 3off( time. 9raphically

    this would be shown as follows:

    ar* S+ace

    ti"e

  • 8/12/2019 2.2.3 Astable Circuits

    9/18

    Topic 2.2.3 Astable Circuits.

    $tudent E+ercise &:

    $. #he following circuit diagram shows a 555 timer configured as anastable timer.

    i -alculate the duration of the 3on( pulse for the above circuit.

    ......................................................................................................................................

    ......................................................................................................................................

    ......................................................................................................................................

    ii -alculate the duration of the 3off( pulse for the above circuit.

    ......................................................................................................................................

    ......................................................................................................................................

    ......................................................................................................................................

    iii 1ence, or otherwise calculate the frequency of the output.

    ......................................................................................................................................

    ......................................................................................................................................

    ......................................................................................................................................

    ......................................................................................................................................

    ,

  • 8/12/2019 2.2.3 Astable Circuits

    10/18

    Module ET2

    Electronic Circuits and Components.

    /. a

  • 8/12/2019 2.2.3 Astable Circuits

    11/18

    Topic 2.2.3 Astable Circuits.

    The fo--owing /estions hae een ta*en fro" recent ea"ination +a+ers coering the /se of asta-e

    circ/its. So"e reference is a-so "ae to "onosta-e circ/its as the two to+ics are often -in*e in

    ea"ination /estions.

    1. The fo--owing iagra" shows an asta-e /i-t with a 555 ti"er /se to c-oc* an -.e..

    % ata sheet for the 555 asta-e gies the fo--owing infor"ation

    (a) Ca-c/-ate the a-/es of T1an T2for the asta-e.

    .............................................................................................................................................................

    .............................................................................................................................................................

    .............................................................................................................................................................

    .............................................................................................................................................................

    .............................................................................................................................................................

    2

    () +-ain how the circ/it co/- e "oifie to +roie a aria-e "ar*6s+ace ratio.

    .............................................................................................................................................................

    .............................................................................................................................................................

    .............................................................................................................................................................

    2

    11

  • 8/12/2019 2.2.3 Astable Circuits

    12/18

    Module ET2

    Electronic Circuits and Components.

    2. The fo--owing iagra" shows a 555 ti"er eing /se as an asta-e.

    % ata sheet for the 555 asta-e gies the fo--owing infor"ation

    (a) Ca-c/-ate the a-/es of T1an T2for the asta-e.

    .............................................................................................................................................................

    .............................................................................................................................................................

    .............................................................................................................................................................

    .............................................................................................................................................................

    .............................................................................................................................................................

    2

    () Ca-c/-ate the fre/enc7 of the asta-e.

    .............................................................................................................................................................

    .............................................................................................................................................................

    .............................................................................................................................................................

    .............................................................................................................................................................

    2

    12

  • 8/12/2019 2.2.3 Astable Circuits

    13/18

    Topic 2.2.3 Astable Circuits.

    3. % Sch"itt inerter can e /se as an asta-e circ/it.

    (a) Co"+-ete the circ/it iagra" for the asta-e circ/it.

    2

    () 8raw a s*etch to i--/strate the o/t+/t waefor" +ro/ce 7 the asta-e. 9o/r s*etch

    sho/- show c-ear-7 how an asta-e waefor" iffers fro" a "onosta-e waefor".

    2

    13

  • 8/12/2019 2.2.3 Astable Circuits

    14/18

    Module ET2

    Electronic Circuits and Components.

    3. The fo--owing a-ar" s7ste" sets off a /::er when the "onosta-e is triggere.

    The "onosta-e o/t+/t re"ains high for secons after it is triggere.

    The asta-e has an e/a- "ar*6s+ace ratio an a +erio of 2 secons.

    The o/t+/t of the %N8 gate is high on-7 when oth its in+/t are high.

    (a) 8escrie what the a-ar" oes oer the secon +erio after the "onosta-e is triggere.

    .............................................................................................................................................................

    .............................................................................................................................................................

    .............................................................................................................................................................

    .............................................................................................................................................................

    1

    () 8raw a s*etch of the waefor" +ro/ce at the o/t+/t of the %N8 gate oer the 10

    secon +erio after the "onosta-e is triggere.

    2

    14

  • 8/12/2019 2.2.3 Astable Circuits

    15/18

    Topic 2.2.3 Astable Circuits.

    4. The fo--owing iagra" shows a 555 ti"er eing /se as an asta-e.

    (a) The o/t+/t signa- has a "ar*;s+ace ratio of 4;1. S*etch two c7c-es of the o/t+/t signa-.

  • 8/12/2019 2.2.3 Astable Circuits

    16/18

    Module ET2

    Electronic Circuits and Components.

    $olutions to $tudent E+ercises

    $tudent E+ercise &:

    $. i the time the output is high: CRRt BAH )(. += 70

    st

    st

    t

    t

    CRRt

    H

    H

    H

    H

    BAH

    161

    158081

    10471023570

    10471033102270

    70

    63

    633

    .

    .

    ).(.

    ).(.

    )(.

    =

    =

    +=

    +=

    ii the time the output is low: CRt BL 70.=

    st

    st

    t

    CRt

    L

    L

    L

    BL

    091

    08571

    1047103370

    70

    63

    .

    .

    .

    .

    =

    =

    =

    iii the frequency: CRRf BA )(. 2701

    +

    =

    Hzf

    f

    f

    CRRf

    BA

    4450

    10471026870

    1

    104710332102270

    1

    270

    1

    63

    633

    .

    ).(.

    ).(.

    )(.

    =

    =

    +

    =

    +

    =

    )r

    Hzf

    ttf

    LH

    4440252

    1

    091161

    1

    1

    ....

    ==

    +

    =

    +

    =

    1#

  • 8/12/2019 2.2.3 Astable Circuits

    17/18

    Topic 2.2.3 Astable Circuits.

    /. a

    b

    . 0hen faced with a design problem of this type we have a dilemma of

    whether to choose a capacitor or resistor value to start with. As the

    minimum value of resistor we can use is $6 then this might be a good

    value to start with, as the capacitor can be of any value.

    FFC

    C

    RCf

    5001050010510002

    1

    1000

    12

    1

    64===

    =

    =

    =

    #his is only one solution, the following

    combinations are also acceptable; 56 and

    $%%=4, /%6 and /5%=4, 5%%6 and $=4,

    /%%6 and /5=4, Substitute them into the formula to chec them out.

    >emember you may have come up with another perfectly acceptable solution.

    1'

    ti"e

    ti"e

  • 8/12/2019 2.2.3 Astable Circuits

    18/18

    Module ET2

    Electronic Circuits and Components.

    $el# Evaluation evie)

    Learning Objectives

    7y personal review of these ob"ectives:

    recall that an astable circuit has two

    unstable states;

    explain the operation of a circuit

    based on a Schmitt inverter, andestimate the operating frequency

    usingRC

    f 1 ;

    draw the circuit diagram for an

    astable using a 555 timer i.c.;

    select and use formulae for

    #he time the output is high:CRRt BAH )(. += 70

    #he time the output is low:

    CRt BL 70.=

    #he frequency: CRRf

    BA )(. 270

    1

    +

    =

    calculate the mar space ratio;

    #argets: $. ??????????????????????????????????????????

    ??????????????????????????????????????????

    /. ??????????????????????????????????????????

    ??????????????????????????????????????????

    1


Recommended