26 May 2004 A. Morgül – ISCAS’2004, Vancouver, Canada 1 A NEW LEVEL RESTORATION CIRCUIT FOR...

26 May 2004 A. Morgül – ISCAS’2004, Vancouver, Canada 1

A NEW LEVEL RESTORATION CIRCUIT

FOR MULTI-VALUED LOGICAvni MORGÜL and Turgay TEMEL

Boğaziçi UniversityElectrical&Electronics Engineering Department

Istanbul, TURKEY

Presented By: Avni Morgül


MVL: Multi-Valued Logicfills the gap between digital&analog

• More than two logic level (r>2)• Logic functions may be implemented

– Using less number of transistor (smaller chip area)

– Using less number of interconnections– Faster

• Disadvantages:– Static power dissipation– Lower noise margin


Comparison of MVL & Binary FA

MVL- radix-8 adder: (12 trans.) 87µm×24µm

3-bit binary-adder: (84 trans.) 160µm×85µm


Definitions

m: Number of variablesr : radix. Number of discrete values

f(x1 , x2 , ..., xm) : Multi Valued Logic function :

each xj takes values from the MVL set R={0,1, ... , r-1}In the current mode implementation each logic level is represented by a current level Ij = jIb ,

A logic level l corresponds to an interval of cont. variable, y

y l : {y|(j-0.5)Ib y < (j+0.5)Ib }

(j+0.5)Ib(j-0.5)Ib

y

jIb

discreteoutput

jIb

l

continuous input

The base current Ib=10A is selected for this work


Definitions

max(x,y) = xy = x + y max

complement of x

min(x,y) = x y = x • y min

xrx 1

truncated difference

otherwise 0

if yxyxyx

k-valued literal

otherwise 0 if bxak

)x,k(L ba


Definitions (cont.)

max(x,y) = x + (y x)

min(x,y) = x – (x y) = x (x y)

krxrkxkrxk'rk'rxkx

rkxxCWCkk

if if 0

if mod )(

r’=r-0.5

otherwise 0

if |

bacbc

athuupper threshold

Clockwise cyclic

lower threshold

otherwise 0

if |

baca

bc

thl


ImplementationBy using current-mode CMOS circuit

i. The basic circuit Elements

znN

z1...

1:k

x

n-type current mirror

Multiplying and re-directing a current

x

1:k

z1 zn

Md Mm

zn

1:k

x kxN

z1

P...

the symbol the circuit


Inverter

r-1

1:1

zx

Md Mm

r-1 x

r-1

0

Slope = -1 z

1:1

r-1

xN

xz


Implementationii. The Secondary Blocks

z

1:k

x

y

N

Truncated Difference

y

x

1:k

z

Md Mm

y0

Slope=k

x

z

otherwise 0 if yxyx

x y=

the definition the symbol the circuit


min(x,y) gate

z

xy

y

Slope = 1

Trans. N1,N3 N2,N4(W/L) 1.75/1 1.75/1+

y

N2 N3

x

N1

z

N4

yxin

vddmin

vssmin

innext

yin

35.5µm×19µm

IC Layouty

1:11:1

xN N

z

xy

y 1:1

Py

N

1:1


max(x,y) gate

0 xy

y

z Slope=1

y

x

N1 N5 N3 N4

VDDP1 P2

z

zx

y1:11:1

NN

Trans. N1,4 N2,3,5 P1,2(W/L) 1.75/1 1.75/1+ 5.5/1

1:1

Pz

N2

vddmax

vssmax

yinxin

outmax

innext

29µm×19µm

IC Layout


The new feedback type Threshold circuit

upper threshold, thu :

otherwise 0

if |

bacbc

a

Trans. N1,2 N3 N4W/L 1.75/1 4/1 1/4

zu

zu(a,b,c) thu+

b

ac

a

c I

bzu(a,b,c)

c

N4

a b

N1 N2 N3

lower threshold, thl :

otherwise 0

if |

baca

bc

zl (a,b,c) thl+

b

ac

zl (a,b,c) c

N4

b a

N1 N2 N3Trans. N1,2 N3 N4W/L 1.75/1 4/1 1/4

a

c I

b

zl


Level Restoration• The maximum number of identical structures that can be

cascaded, without loosing a predefined input logic level at the output, is limited.

• Maximum radix of a given MVL function implementation depends on logic level degradations of basic gates such as min and max gates, min, max.

• The allowable logic level degradation or a standard deviation for each m-input gate can be determined by

rlogm)m(log)/I( b

maxmin,22 1

2


Level Restoration

• It is necessary to restore the deviated levels after a certain number of cascaded gates

maxmin,

bIN

2

Process(W/L)n; (W/L)p

%σz/z

z=min(x,y)

%σz/z

z=max(x,y)

1.75/1; 5.5/1 3.1 4.3

2.25/1.5; 8/1.5 2.5 2.7


Statistical AnalysisSimulation results of deviation of the output

current from the nominal value, for k cascaded stages

0 20 40 60 8020

40

60

max

(x,y

), A

x, A

y= 30 A

k =1k =4k =8


Switched current type Restorer

A/D converter

BinaryDecoder

Ib 2IblogrIb

x<x>

current switches

Voltage mode circuits


Problems of Switched Current Restorers

• Voltage mode A/D converters and Binary decoders required

• Spikes are generated by the switches• Switching transistor sizes becomes too

large for radixes higher than 3• Operation frequency is limited by

voltage mode circuits


The new restoration circuit• We propose a novel generalized

restoration algorithm for current-mode MVL designs.

• The new algorithm eliminates current-to-

voltage mode conversions used by other circuits and the restored level is obtained directly.


The new restoration circuit (cont.)

• The new circuit is based on the new threshold circuit.

• The restored level current can be established by cascading stages for i=1 through log2r, and summing up individual restored level currents.



• The following quantities are used to obtain the intermediate restored levels:

)( )]2( [mod

.......)( )]8( [mod

)( )]4( [mod

)]2( [mod

1211

21223

1112

221

iiii

ii

rr

xxxrxx

xxxrxx

xxxrxx

rxxx



• The total restored level current can be established by cascading stages for i=1 through [log2r], and summing up individual restored level currents.

rlog

iixx

2

1


8-Level Restorer Circuit

x3.5Ib 4Ib

<x1>

1.5Ib 2Ib

<x2>

0.5Ib Ib

<x3>

x

x1

x1

x2

P-Type Mirror (1:1)

<x> <x>

Restored output

Input

Threshold circuit

MS LS


Simulations

Simulation results of two restoration circuits

Switched current type restorer Full current-mode new restorer


Performance of the circuit

• Delay : 2.75ns• Power dissipation: 0.25mW


CONCLUSION• In MVL circuits, it is necessary to restore the current level

to nominal values, after a certain number of cascaded stages. – Restoration circuits may be realized with

• Voltage mode, transmission gate type, current switches, or• The new current mode threshold circuits

• The new full current mode restorers show superiour performance in terms of circuit simplicity and transient behaviour.

• The transistor sizes vs number of necessary restoration circuits should be optimized in a large circuit.

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26 May 2004 A. Morgül – ISCAS’2004, Vancouver, Canada 1 A NEW LEVEL RESTORATION CIRCUIT FOR...

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