32-BIT ARM-BASED MICROPROCESSORS - Microchip...

32-BIT ARM-BASEDMICROPROCESSORS

SAMA5D2 (Rev. C) Xplained Ultra Evaluation Kit User'sGuide

Introduction

This user guide introduces the Microchip SAMA5D2 (Rev. C) Xplained Ultra evaluation kit (SAMA5D2C-XULT kit) and describes the development and debugging capabilities for applications running on theSAMA5D2 Arm Cortex-A5-based microprocessor unit (MPU). The SAMA5D2C-XULT kit supports thefollowing part numbers:

ATSAMA5D21C ATSAMA5D22C ATSAMA5D23C ATSAMA5D24C

2017 Microchip Technology Inc. User Guide DS50002691B-page 1

ATSAMA5D26C ATSAMA5D27C ATSAMA5D28C

32-BIT ARM-BASED MICROPROCESSORS


Table of Contents

Introduction......................................................................................................................1

1. Kit Contents............................................................................................................... 5

2. Evaluation Kit Specifications..................................................................................... 62.1. Electrostatic Warning....................................................................................................................62.2. Power Supply Warning.................................................................................................................6

3. Board Powerup..........................................................................................................8

4. Sample Code and Technical Support........................................................................ 9

5. Hardware Overview................................................................................................. 105.1. Introduction.................................................................................................................................105.2. Equipment List............................................................................................................................105.3. Board Features...........................................................................................................................10

6. Board Components..................................................................................................126.1. Board Overview..........................................................................................................................126.2. Connectors On Board.................................................................................................................136.3. Function Blocks..........................................................................................................................136.4. PIO Usage and Interface Connectors........................................................................................ 266.5. PIO Usage on Expansion Connectors........................................................................................47

7. Board Schematics................................................................................................... 617.1. Schematics.................................................................................................................................61

8. Errata.......................................................................................................................768.1. NRST..........................................................................................................................................768.2. nLBO.......................................................................................................................................... 768.3. R63.............................................................................................................................................76

9. Revision History.......................................................................................................77

The Microchip Web Site................................................................................................ 78

Customer Change Notification Service..........................................................................78

Customer Support......................................................................................................... 78

Microchip Devices Code Protection Feature................................................................. 78

Legal Notice...................................................................................................................79

Trademarks................................................................................................................... 79


Quality Management System Certified by DNV.............................................................80

Worldwide Sales and Service........................................................................................81

32-BIT ARM-BASED MICROPROCESSORS


1. Kit ContentsThe SAMA5D2 (Rev. C) Xplained Ultra evaluation kit includes:

One SAMA5D2C-XULT board One Micro-AB type USB cable

32-BIT ARM-BASED MICROPROCESSORSKit Contents


2. Evaluation Kit SpecificationsTable 2-1.Evaluation Kit Specifications

Characteristic Specifications

Board SAMA5D2C-XULT

Board Supply Voltage USB and/or Battery powered

Temperature Operating 0C to +70C

Storage -40C to +85C

Relative Humidity 0 to 90% (non-condensing)

Main Board Dimensions (L x W x H) 135 88 20 mm

Board Identification SAMA5D2 XPLAINED ULTRA (see Note 1)

Note:1. No change to board name marking from Revision A and B. The bill of materials of mounted

components has changed but the PCB itself remains unchanged.

2.1 Electrostatic Warning

WARNING ESD-Sensitive Electronic Equipment!The evaluation kit is shipped in a protective anti-static package. The board system must not besubject to high electrostatic potentials.

We recommend using a grounding strap or similar ESD protective device when handling theboard in hostile ESD environments (offices with synthetic carpet, for example). Avoid touchingthe component pins or any other metallic element on the board.

2.2 Power Supply Warning

WARNING Hardware Power Supply LimitationPowering the board with voltages higher than 5 VCC (e.g., the 12 VCC power adapters fromother kits such as Arduino kits) may damage the board.

32-BIT ARM-BASED MICROPROCESSORSEvaluation Kit Specifications


WARNING Hardware Power BudgetUsing the USB as the main power source (max. 500 mA) is acceptable only with the use of theon-board peripherals and low-power LCD extension.

When external peripheral or add-on boards need to be powered, we recommend the use of anexternal power adapter connected to the USB Micro-AB connectors (can provide up to 1.2A onthe 3.3V node).

32-BIT ARM-BASED MICROPROCESSORSEvaluation Kit Specifications


3. Board PowerupThree sources are available to power up the SAMA5D2C-XULT board:

USB-powered through the USB Micro-AB connector (J23 - default configuration) Powered through the USB Micro-AB connector on the Embedded Debugger (EDBG) interface (J14) Powered through a rechargeable battery Li-polymer 3.7V connected to J3 or J4

WARNING Unlike Arduino Uno boards, the SAMA5D2C-XULT board runs at 3.3V. The maximum voltagethat the I/O pins can tolerate is 3.3V. Providing higher voltages (e.g., 5V) to an I/O pin coulddamage the board.

The sequence for the initial powerup of the board is the following:

1. Unpack the board, taking care to avoid electrostatic discharge.2. Connect the USB Micro-AB cable to the connector J23 (or J14).3. Connect the other end of the cable to a free USB port of your PC.

Table 3-1.Electrical Characteristics

Parameter Value

Input voltage 5 VCC

Maximum input voltage (limits) 6 VCC

Maximum DC 3.3V current available 1.2A

I/O voltage 3.3V only

32-BIT ARM-BASED MICROPROCESSORSBoard Powerup


4. Sample Code and Technical SupportAfter boot up, you can run sample code or your own application on the evaluation kit. Sample code andtechnical support is available on http://www.microchip.com. In particular, the software package (examplesource code and drivers) can be found on the SAMA5D2 Software Package page of our website.

Linux software and demos can be found on http://www.at91.com/linux4sam/bin/view/Linux4SAM/.

WARNING Make sure that the latest software version is downloaded before starting your evaluation. Formore information, go to http://www.at91.com/linux4sam/bin/view/Linux4SAM/.

32-BIT ARM-BASED MICROPROCESSORSSample Code and Technical Support


http://www.microchip.comhttp://www.at91.com/linux4sam/bin/view/Linux4SAM/http://www.at91.com/linux4sam/bin/view/Linux4SAM/

5. Hardware Overview

5.1 IntroductionThe SAMA5D2C-XULT kit is a full-featured evaluation platform for the SAMA5D2 series ARM-basedmicroprocessor units (MPU). It allows users to extensively evaluate, prototype and create application-specific designs.

5.2 Equipment ListThe SAMA5D2C-XULT board is based on the integration of an ARM Cortex-A5-based microprocessorwith external memory, one Ethernet physical layer transceiver, one SD/MMC interface, one host USB portand one device USB port, one 24-bit RGB LCD and debug interfaces.

Seven headers, compatible with Arduino R3 (Uno, Due) and two Xplained headers are available forvarious shield connections.

5.3 Board FeaturesTable 5-1.Board Specifications

Characteristics Specifications

Dimensions (L x Wx H)

135 x 88 x 20 mm

Processor SAMA5D27C (289-ball BGA package), 14x14 mm body, 0.8 mm ball pitch

Oscillators MPU, EDBG: 12 MHz crystalRTC: 32.768 kHz

PHY: 25 MHz

Main memory 2 x DDR3L SDRAM 2 Gbit - 16 Mbit x 16 x 8 banks (total 4 Gbit = 512 Mbyte)1 x eMMC NAND Flash 4 Gbit

Accessorymemories

One Serial EEPROM SPIOne QSPI Serial Flash MX25L25673G

One EEPROM with MAC Address and Serial Number

SD/MMC One 4-bit SD card connector

USB One USB Host with power switchOne Micro-AB USB device

Display One LCD interface connector, LCD TFT Controller with overlay, alpha-blending,rotation, scaling and color space conversion

Image sensor One ISC interface and connector

Ethernet One Ethernet PHY (RMII 10/100 MHz)

Debug port One JTAG interface connector

32-BIT ARM-BASED MICROPROCESSORSHardware Overview


Characteristics Specifications

One EDBG interface with CDC

One serial debug console interface (3.3V level)

Expansionconnector

Arduino R3 compatible set of connectorsXPRO set of connectors

Board supplyvoltage

5V from USBOn-board power regulation by PMIC

External battery-powered capability

Battery On-board PowerCap

User interface Reset, Wakeup and user configurable push buttonsOne tri-color user LED (red, green, blue)

32-BIT ARM-BASED MICROPROCESSORSHardware Overview


6. Board Components

6.1 Board OverviewThe fully-featured SAMA5D2C-XULT board integrates multiple peripherals and interface connectors asshown in the figure below.

Figure 6-1.SAMA5D2C-XULT Board Overview

R18R11

R24

C1

C3

TP3

C2R17

R16

R15

R14

Q1C

8 R9R8

Q2C9

R10

R23

C5

C6R5R1

TP1 TP2

J1

R27

R22

R21

R7R6

C7

C11 R12

R25

U1C

4

JP1

BP1

C12

L2R35

R31

R32

R34

R33R

39

R36

R37

R38J2R28

J3R26R20

R19L1

C13L3Q

3

C10R13

C14R29R2

R3

R4

L4

J5

C18C16

R48

R45R47JP2

R40R42

J4

R30R41

D1

U2

C17

C20

TP5

Y1D4

R46

D3

C15R43 TP

4

Q4 C21

J6

R64

U3

R61R60R49

C25

D2R44C19C22

L6L5

TP6

JP3

C24

R59

C35

C34

R70

R69

R68

R67

C36C31C

28

C29

C30C

27JP4

C37

TP7C23R63C33

C26

Q5

Y2R66

R65J

9J8C

38

R58

R57

R56

R55

R54

R53

C39

R52

R51

R50

R71

R62C32

R73

R72

J17

R81

R80

R79

R78

R77

R76

Y3

L10

J7L7 L8 L9

R74

J11

C42

R123R105R100C

41C

40R96

R95

R94

R93

R92

R91

R90

R89

R88

R87

R86

R85

R84

R83

R82

JP5

R75J10

J13

J12

C43

R103

R12

2R

121

R12

0R

119

R11

8

R11

7

R11

6R

115

R11

4R

113

R11

2R

111

R11

0R

109

R10

8

R12

4R104R99

R130

C44

R12

9C45

R131 L12

L11

J18R

137

R13

6R

135

R13

4R

133

R13

2JP6C46Y4R13

8

C47

TP8

R102R10179R 89RU

5

J14

J19

R152

R146C51

R143R142R141R140

R139C48

R128R127R126R125R107R106

U4C50

C49

L13

U7J15

R154R151 R150R149R148R147R145R144

U6

R153U8

R158R155

C52

J16

R163R161R159R156

R16

2

R160R157

BP2 U9C53

U10

R169R167R165

R16

4U11

R177R175R173R171

R18

2

R18

1C

55R18

0C

54R17

9R

178

J22

R172R170R168R166

JP7

L14C56

J20

BP3

J21

R176R174

J23

J24

JP8

C60

C59

R184R183C57

JP9J2

6J25

C58

42

3

42

3

41

3

42

32

D22

SCL1

F3_R

XD

SDA1

F0_R

XD

F3_T

XD

F0_T

XD

F4_R

XD

F4_T

XDGN

D

AREF

SDA0

SCL0

A5-U

SB-A

D23

V5 V5

810 912 1113

BOOT_DIS

2119 2017 18

XPR

O E

XT2

1614 151 03 24567

XPR

O E

XT1

XPR

O P

OW

ER

VDD

_5V_

IN

F1_T

XDF1

_RXD

WWW.ATMEL.COM

D51

D49

D50

D48PI

OBU

A5-JTAGEDBG-JTAG

D47D46EDBG

-USB S

DM

MC

1

ISC

D45

D43

D44

D42

DIG

ITA

L

VDDBUD41D40BB

D39

D37

D38

D36HSIC

AWAK

E U

P

D35

D33

D34

D32

SDM

MC

0 D31D30

RES

ET

D29

D27

D28

D26VDDIODDR

D25D24

D53

GNDGNDD52

A

A5-U

SB-B

R

CAN

TX1

CAN

RX1

VDD_3V3

CAN

RX0

CAN

TX0

VBAT

STAT

ETH

A11

A10A9A8A7A6A5A4A3A2A1A0NC

GN

D

GN

D5V3V3

RST3V

3

CLASS D

TM

VDDCORE

POW

ER

3.3V

LEV

ELS

RTS GNDRXD VCCTXDCTSEDBG_DIS

DEBUG

PB_USERDEBUG_DISLCDPin1

VBAT

RG

B LE

D

VDD

_3V3

_LP

6.1.1 Default Jumper SettingsThe board overview shows the default jumper settings. Blue jumpers are configuration items. Redjumpers are current measurement points. The table below describes the functionality of the jumpers.

Table 6-1.SAMA5D2C-XULT Jumper Settings

Jumper Default Function

JP1 OPEN Disable EDBG

JP2 OPEN Disable Debug

JP3 CLOSE VDD_3V3_LP current measurement

JP4 CLOSE VDDCORE current measurement

JP5 CLOSE VDDISC + VDDIOP0/1/2 current measurement

JP6 CLOSE VDDBU current measurement

32-BIT ARM-BASED MICROPROCESSORSBoard Components


Jumper Default Function

JP7 CLOSE VDDIODDR_MPU current measurement

JP8 CLOSE VDD_5V_IN current measurement

JP9 OPEN Disable CS of SPI, QSPI and eMMC memories

6.2 Connectors On BoardThe table below describes the interface connectors on the SAMA5D2C-XULT board.

Table 6-2.SAMA5D2C-XULT Board Interface Connectors

Connector Interfaces to

J23 USB A Device. Supports USB device using a type Micro-AB connector

J13 USB Host B. Supports USB host using a type A connector

J1 Serial DBGU (3.3V level)

J11 JTAG, 10-pin IDC connector

J14 EDBG USB connector

J15 USB C (not populated)

J6 Ethernet

J2 Expansion connector with all LCD controller signals for display module connection (QTouch,TFT LCD display with touchscreen and backlight)

J19 SDHCI SD/MMC connector

J3, J4 Battery connectors

J12 Tamper connector (not populated)

J7, J8, J9,J16, J17,J20, J21, J22

Expansion connectors with Arduino R3 compatible PIO signals

J24, J25, J26 Xplained Pro Expansion connectors

J10 EDBG JTAG (not populated)

J18 ISC interface

J5 Class-D amplifier output

6.3 Function Blocks

6.3.1 ProcessorThe SAMA5D2 Series is a high-performance, power-efficient MPU based on the ARM Cortex-A5processor. Refer to the SAMA5D2 Series datasheet for more information.



6.3.2 Power Supply Topology and Power Distribution

6.3.2.1 Power SuppliesDetailed information on the device power supplies is provided in the tables SAMA5D2 Power Suppliesand Power Supply Connections in the SAMA5D2 Series datasheet.

Figure 6-2.Processor Power Lines Supplies

(3V3)

(1V2)

(1V35)

(3V3)

)3V3()3V3()3V3(

)5V2()2V1(

(3V3)

(3V3)

(3V3)

(3V3)

(3V3)

(3V3)

(3V3)

(3V3)

(3V3)

(1V35)

(1V2)

(1V2)

(1V2)

(1V2)

(2V5)

(3V3)

(1V2)

)3V3()2V1(

(3V3)

(3V3)

(3V3 or 1V8)

(3V3 or 1V8)

VDDBU

VDDCORE

VDDPLLA

VDDIOP0

VDDIOP1

VDDIOP2

VDDHSIC

VDDUTMIC

VDDUTMII

VDDSDHC

VDDPLLA

VDDOSC

VDDISC

VDDFUSE

VDDAUDIOPLL

VDDBU

VDDIODDR

VDDANA

VDDANA

VDDIOP0 VDDIOP1 VDDIOP2

VDDHSIC VDDFUSE

VDDUTMII VDDSDHC

VDDOSC VDDISC

VDDUTMIC

VDDCORE

VDDIODDR

VDDAUDIOPLL

GNDUTMII

VDDBU

VDDCORE

VDDIODDR

VDDANA

VDDIOP0 VDDIOP1 VDDIOP2

VDDHSIC VDDFUSE

VDDUTMII VDDSDHC

VDDPLLA VDDOSC VDDISC

VDDUTMIC

GNDUTMII

VDDAUDIOPLL

C135100nF

C31100nF

C29100nF

C128100nF

C140100nF

C132100nF

C134100nF

C434.7uF

C80100nF

R2691R 1%

C131100nF

C102100nF

C144100nF

C2710uF

C101100nF

C136100nF

C111100nF

C118100nF

C7010uF

C971nF

C301nF

C108100nF

C119100nF

C1424.7uF

C1371nF

C2810uF

C110100nF

C138100nF

R264 0R

C107100nF

R1311R 1%

C88100nF

C7110uF

C133100nF

C104100nF

C45100nF

C120100nF

C1051nF

C125100nF

C114100nF

SAMA5D27-CU

U6G

GNDANA_2 K5

GNDBU N6

GNDCORE_1 E7

GNDCORE_2 E9

GNDCORE_3 H4

GNDCORE_4 K12

GNDCORE_5 M5

GNDCORE_6 M9

GNDDDR_1 D14

GNDDDR_2 E11

GNDDDR_3 E12

GNDDDR_4 E14

GNDDDR_5 H14

GNDDDR_6 J14

GNDDDR_7 L14

GNDDPLL T5

GNDAUDIOPLL T4

GNDIOP0_1 F6

GNDIOP0_2 G7

GNDIOP1_1 M13

GNDIOP1_2 P14

GNDIOP2 F9

GNDISC G4GNDOSC T6

GNDPLLA U5GNDSDMMC R11

GNDUTMII P9GNDUTMIC R7

VDDANA_2L5

VDDBUN7

VDDCORE_1D7

VDDCORE_2D9

VDDCORE_3H3

VDDCORE_4K13

VDDCORE_5N5

VDDCORE_6N9

VDDDDR_1D11

VDDDDR_2D12

VDDDDR_3D15

VDDDDR_4E15

VDDDDR_5H15

VDDDDR_6J15

VDDDDR_7L15

VDDAUDIOPLLT3VDDFUSEM12VDDHSICR9

VDDIOP0_1E6

VDDIOP0_2F7

VDDIOP1_1N13

VDDIOP1_2R14

VDDIOP2F10

VDDISCF4VDDOSCT7VDDPLLAU4VDDSDMMCP11VDDUTMIIP8VDDUTMICP7

GNDANA_1 L3VDDANA_1K3

C1221nF

C1474.7uF

C103100nF

C841nF

C143100nF

C1484.7uF

6.3.2.2 Powerup and Powerdown ConsiderationsPowerup and powerdown considerations are described in section Power Considerations of theSAMA5D2 Series datasheet.

WARNING The powerup sequence provided in the SAMA5D2 Series datasheet must be respected forreliable operation.

6.3.2.3 ACT8945A Power Management ICThe ACT8945A is a complete, cost-effective and highly-efficient ActivePMU power managementsolution, optimized to provide a single-chip power solution and voltage sequencing for SAMA5D2/SAMA5D3/SAMA5D4 and SAM9 series MPUs. It also meets the control requirements of these devices.



The ACT8945A features three step-down DC-DC converters and four low-noise, low-dropout linearregulators along with a complete battery charging solution featuring the advanced ActivePath system-power selection function.

WARNING Refer to the ACT8945A datasheet at http://www.active-semi.com/ for more details.

The three DC-DC converters utilize a high efficiency, fixed-frequency (2 MHz), current-mode PWM controlarchitecture that requires a minimum number of external components. Two DC-DC converters arecapable of supplying up to 1100 mA of output current, while the third supports up to 1200 mA. All fourlow-dropout linear regulators are high performance, low-noise regulators that supply up to 320 mA ofoutput current.

Figure 6-3.Board Power Management

VDD_2V5

Populate R ifno Super Cap

(Super)-Capacitorenergy storage

VDD_3V3VDD_3V3VDD_1V8

WAKE UP RESET

For DDR3 For MPU

VIN_5V

nPBSTAT

VBATVBAT

VDD_5V_IN

VDD_1V2

VDD_1V35

VDD_3V3

VBAT

VDDFUSE

VSYS_5V

VDD_3V3_LP

VDD_LEDVSYS_5V

VDDSDHC1V8

VSYS_5V

VSYS_5V

VDDHSIC

VDD_3V3

VDD_1V2

VDDCORE

VDD_1V35

VDDIOP0

VDDIOP2

VDDIOP1

VDDPLLA

VDDUTMIC

VDDIODDR

VDD_3V3_LP

VDDAUDIOPLL

VDDANA

VDDOSC

VDDUTMII

VDD_5V_IN

VSYS_5V

VDDBU

VDDISC

VDD_3V3

VDD_3V3

VSYS_5V VDDB_5V

USBA_VBUS_5V[10]

EDBG_USB_VBUS_5V[14]

SHDN[9]

PMIC_CHGLEV_PA12[7]

PMIC_IRQ_PB13[7]

PMIC_TWD0_PD21[8]PMIC_TWCK0_PD22[8]

NRST[9,10,12,14,15]

5V_EXT_INP[15]

PMIC_LBO/EXP_PC8[8,15]

C194.7uF

R17 100R 1%

C18010uF

R30 0R

L7

180ohm at 100MHz

1 2

R293 2R2

J31X3Pin

123

R129 2R2

R14 49.9K 1%

R284 0R

C210uF

L12 10uH_150mA

L16

180ohm at 100MHz

1 2

L18

180ohm at 100MHz

1 2

JP3Header 1X2

1 2

Q2BSS138

1

3

2

R12100K

C8100nF

R303 0RR9 1K

R24DNP

(3.9K 1%)

U22

FAN48610

VINA3

SW1B1

SW2B2

ENB3

PGND1 C1

VOUT2 A2VOUT1 A1

AGND C3PGND2 C2

L8

180ohm at 100MHz

1 2

R26

DNP(8.2K 1%)

C10 100nF

C38100nF

JPR3Jumper

C6010uF

L270.47uH

C24100nF

R16 100R 1%

D6BAT54C

31

2C18122uF

R7

10K

C5910uF

R27

2.43K 1%

TP11SMD

C46100nF

BP3

Tact

Sw

itch

C2210uF

JPR4Jumper

C2010uF

R330 0R

R22 1.5M 1%

R190R

JP7Header 1X2

1 2

C44DNP(1uF)

C3710uF

R868K

C2310uF

+ C420.2F/3.3V

JPR5Jumper

C58100nF

JP8Header 1X2

1 2

R327 0R

R44 100R 1%

R139DNP(2.2K)

C7DNP(1nF)

JP4Header 1X2

1 2

R1349.9K 1%

L6 2.2uH

R18

11K 1%

C1694.7uF

JPR6Jumper

L22 10uH_150mA

R6

10K

C1654.7uF

C1734.7uF

D5RB160M-60TR

JPR7Jumper

U12

TPS2113

IN18

VSNS3

EN2

IN26 GND 5ILIM 4OUT 7

STAT 1

R20 100R 1%

L23

180ohm at 100MHz

1 2

Q7DNP(IRLML6402)

1

32

R21 2.2M 1%

L10

180ohm at 100MHz

1 2

L3

180ohm at 100MHz

1 2

JP6Header 1X2

1 2

R187 10K

Q1BSS138

1

3

2

C174.7uF

JPR8Jumper

BP2

Tact

Sw

itch

C16647nF

J4DNP(Header 1X2 2.00MM)

12

R186 10K

C134.7uF

C16410uF

L20 10uH_150mA

C310uF

R300 2R2

R34

510

K

C16310uF

L9

180ohm at 100MHz

1 2

Q3BSS138

1

3

2

JP5Header 1X2

1 2

C1100nF

L5 2.2uH

R280 100R 1%

C167100nF

L19

180ohm at 100MHz

1 2TP14SMD

D1 RED

R41 DNP(0R)

R185 390R 1%

C17610uF

D9(replaced with 0R-1206- see User Guide)

L1 2.2uH

R15100K

R11

DNP(11K 1%)

U2 ACT8945AQJ405-T

CHGIN33

ACIN21

LBI20

ISET23

REFBP1

CHGLEV22

nRSTO11

nIRQ12

nPBSTAT13

nLBO19

SDA27

SCL26

VSEL25

PWRHLD10

GN

DA

3PW

REN

18

GN

DP1

237

GN

DP3

14

EXPA

D41

VSYS1 31

VSYS2 32

VP1 39

VP2 35

VP3 16

INL 6

NC1 40

nSTAT 28

BAT1 29

BAT2 30

TH 24

SW1 38

OUT1 2

SW2 36

OUT2 34

SW3 15

OUT3 17

OUT4 4

OUT5 5

OUT6 8

OUT7 7

nPBIN9

(See note 1)

Note: Occasional board startup problems occurred when powered from a USB source with a weakVBUS level below 4.8V. To avoid the voltage drop and resulting startup problems, production boards wereassembled with a 0 resistor in place of the Schottky diode D9 shown here.

Supply Group ConfigurationThe ACT8945A provides:

All power supplies required by the SAMA5D2 device: 1.2V VDDCORE, VDDPLLA, VDDUTMIC, VDDHSIC 1.35V VDDIODDR 2.0V VDDBU 3.3V VDDIOP, VDDISC 1.8V or 3.3V VDDSDHC (= VDDSDMMC) 2.5V VDDFUSE 3.3V VDDOSC, VDDUTMII, VDDANA, VDDAUDIOPLL

Power supplies to external chips on the main board:



http://www.active-semi.com/

2.5V VDDLED 4.8V VSYS_5V

6.3.2.4 Power Boost 5VTo generate a true 5V voltage from the PMIC output (4.8V typical), a FAN48610 low-power boostregulator is integrated into the design. This feeds the 5V USB host and the 5V LCD.

Figure 6-4.Power Boost 5VVSYS_5V VDDB_5V

C18010uF

U22

FAN48610

VINA3

SW1B1

SW2B2

ENB3

PGND1 C1

VOUT2 A2VOUT1 A1

AGND C3PGND2 C2

L270.47uH

C18122uFR

345

10K

6.3.2.5 Input Power OptionsThere are several power options for the SAMA5D2C-XULT board.

USB-powered operation is the default configuration, where the USB device port is connected to a PC or a5V DC supply. The USB supply is sufficient to power the board in most applications. It is important to notethat when the USB supply is used, the USB-B Host port has limited power. If USB Host port is requiredfor the application, it is recommended that an external DC supply be used.

The figure below provides the schematics of power options.

Figure 6-5.Input Powering Scheme

VDD_5V_IN

USBA_VBUS_5V[10]

EDBG_USB_VBUS_5V[14]

C6010uF

C5910uF

C58100nF

JP8Header 1X2

1 2

U12

TPS2113

IN18

VSNS3

EN2

IN26 GND 5ILIM 4OUT 7

STAT 1R187 10K

JPR8Jumper

R186 10KR185 390R 1%

Note: USB-powered operation eliminates additional wires and batteries. It is the preferred mode ofoperation for any project that requires only a 5V source at up to 500 mA.

6.3.2.6 Battery Supply SourceThe ACT8945A features an advanced battery charger that incorporates the ActivePath architecture forsystem power selection. This combination of circuits provides a complete, advanced battery-managementsystem that automatically selects the best available input supply, manages charge current to ensuresystem power availability, and provides a complete, high accuracy (0.5%), thermally regulated, full-featured single-cell linear Li+ charger.

The ActivePath circuitry monitors the state of the input supply, the battery, and the system, andautomatically reconfigures itself to optimize the power system. If a valid input supply is present,ActivePath powers the system from the input while charging the battery in parallel. This allows the batteryto charge as quickly as possible, while supplying the system. If a valid input supply is not present,ActivePath powers the system from the battery. Finally, if the input is present and the system currentrequirement exceeds the capability of the input supply, ActivePath allows system power to be drawn fromboth the battery and the input supply.



Figure 6-6.Battery Powering Scheme

nPBSTAT

VBATVBAT

VSYS_5V

VSYS_5V

VSYS_5V

VDD_3V3

PMIC_CHGLEV_PA12[7]

PMIC_IRQ_PB13[7]

PMIC_TWD0_PD21[8]PMIC_TWCK0_PD22[8]

NRST[9,10,12,14,15]

PMIC_LBO/EXP_PC8[8,15]

C194.7uF

R17 100R 1%

R30 0R

J31X3Pin

123

R26

DNP(8.2K 1%)

R16 100R 1%

R7

10K

R27

2.43K 1%

R44 100R 1%

C7DNP(1nF)

R6

10K

R20 100R 1%

C16647nF

J4DNP(Header 1X2 2.00MM)

12

C16410uF

C16310uF

C167100nF

D1 RED

R41 DNP(0R)

C17610uF

U2 ACT8945AQJ405-T

CHGIN33

ACIN21

LBI20

ISET23

REFBP1

CHGLEV22

nRSTO11

nIRQ12

nPBSTAT13

nLBO19

SDA27

SCL26

VSEL25

VSYS1 31

VSYS2 32

VP1 39

VP2 35

VP3 16

INL 6

NC1 40

nSTAT 28

BAT1 29

BAT2 30

TH 24

SW1 38

OUT1 2

SW2 36

OUT2 34

SW3 15

OUT3 17

(See note 1)

(See note 3)

(See note 3)

(See note 2)

Note:1. Refer to errata NRST.2. If the battery does not have a pack embedded thermistor (i.e., battery temperature monitoring), the

TH pin should be connected to ground => short J3 pins 2 and 3.3. If no battery is connected on connector J3 or J4, it is recommended that the charging function be

disabled in the ACT8945 chip. To do so, write the SUSCHG bit to 1 in APCH register (REG 0x71,SUSCHG = 1).

Charger Input InterruptsTo facilitate input supply detection and eliminate the size and cost of external detection circuitry, thecharger has the ability to generate interrupts based upon the status of the input supply. This function iscapable of generating an interrupt when the input is connected, disconnected, or both, when the chargerstate machine transitions.

Charge Status IndicatorThe charger provides a charge-status indicator output, nSTAT. nSTAT is an open-drain output which sinkscurrent when the charger is in an active-charging state, and is high-Z otherwise. nSTAT features aninternal 8 mA current limit, and is capable of directly driving an LED (D1).

Precision Voltage DetectorThe low battery input (LBI) connects to one input of a precision voltage comparator, which can be used tomonitor a system voltage such as the battery voltage. An external resistive-divider network can be usedto set voltage monitoring thresholds. The output of the comparator is present at the open-drain lowbattery indicator output (nLBO) and connected to the red LED D1.

Table 6-3.PIOs Used to Control the Battery Charger

PIO Function

PA12 CHGLEV: Charge Current Selection Input

PB13 nIRQ: Open-Drain Interrupt Output. nIRQ is asserted any time an unmasked fault condition exists or acharger interrupt occurs.

PC8 nLBO: Low Battery Indicator Output. nLBO is asserted low whenever the voltage at LBI is lowerthan1.2V; it is high-Z otherwise.



Figure 6-7.Battery Connector J3 and Optional J4

R18R11

R24

C1C3

TP3

C2R17R16

R15

R14

Q1C

8 R9R8Q2C9

R10

R23

C5 C6R5R1

TP1 TP2

J1

R27

R22

R21

R7R6C7

C11 R12

R25

U1C4

JP1

BP1

C12

L2R35

R31

R32

R34

R33R3

9

R36

R37

R38

J2R28

J3R26R20

R19

L1

C13L3Q

3

C10

R13

C14R29R2 R3 R4

L4

J5

C18C16

R48

R45R47JP2

R40R42

J4

R30R41

D1

U2

C17

C20

TP5

Y1D4

R46

D3

C15R43 TP

4

Q4 C21

J6

R64

U3

R61R60R49

C25

D2

R44C19C22

L6L5

TP6

JP3

C24

R59

C35

C34

R70

R69

R68

R67

C36

C31C2

8

C29

C30C2

7

JP4

C37

TP7C2

3R63

C33

C26

Q5

Y2R66

R65J9J

8C3

8

R58

R57

R56

R55

R54

R53

C39

R52

R51

R50R71

R62C32

R73

R72J

17

R81

R80

R79

R78

R77

R76

Y3

L10

J7L7 L8 L9

R74

J11

C42

R123R105R100C4

1C4

0R9

6R9

5

R94

R93

R92

R91

R90

R89

R88

R87

R86

R85

R84

R83

R82

JP5

R75J10

J13

J12

C43

R103

R122

R121

R120

R119

R118

R117

R116

R115

R114

R113

R112

R111

R110

R109

R108R1

24R104R99

R130

C44

R129C

45

R131L12

L11

J18

R137

R136

R135

R134

R133

R132

JP6C46Y4R13

8

C47

TP8

R102R10179R 89RU5J1

4

J19

R152

R146C51

R143R142R141R140

R139C48

R128R127R126R125R107R106

U4C50

C49

L13

U7J15

R154R151 R150R149R148R147R145R144

U6R153U8

R158R155

C52

J16

R163R161R159R156

R162

R160R157

BP2 U9C53

U10

R169R167R165

R164

U11

R177R175R173R171

R182

R181

C55

R180

C54

R179

R178

J22

R172R170R168R166

JP7

L14

C56

J20

BP3

J21

R176R174

J23

J24

JP8

C60

C59

R184R183C57

JP9J2

6J25

C58

42

3

42

3

41

3

42

32

D22

SCL1

F3_R

XD

SDA1

F0_R

XD

F3_T

XD

F0_T

XD

F4_R

XD

F4_T

XDGND

AREF

SDA0

SCL0

A5-U

SB-A

D23

V5 V5

810 912 1113

BOOT_DIS

2119 2017 18

XPRO

EXT

21614 151 03 24567

XPRO

EXT

1

XPRO

PO

WER

VDD_

5V_I

N

F1_T

XDF1

_RXD

WWW.ATMEL.COM

D51

D49

D50

D48

PIO

BU

A5-JTAGEDBG-JTAG

D47D46EDBG

-USB S

DMM

C1

ISC

D45

D43

D44

D42

DIG

ITAL

VDDBUD41D40BB

D39

D37

D38

D36HSICAW

AKE

UP D35

D33

D34

D32

SDM

MC0 D31D30

RESE

T

D29

D27

D28

D26VDDIODDR

D25D24

D53

GNDGNDD52

A

A5-U

SB-B

R

CANT

X1CA

NRX1

VDD_3V3

CANR

X0

CANT

X0

VBAT

STAT

ETH

A11


GND

GND5V3V3

RST

3V3

CLASS D

TM

VDDCORE

POW

ER

3.3V

LEVE

LS


DEBUG


VBAT

RGB

LED

VDD_

3V3_

LP

Table 6-4.Battery J3 Signal Descriptions

Pin Mnemonic Signal Description

1 VBAT Battery I/O (exploitation and charging). Connect this pin directly to the battery anode (+terminal)

2 GND Common ground

3 TH Temperature Sensing Input. Connect to battery thermistor. TH is pulled up with a 102 A(typical) current internally.

6.3.2.7 Backup Power SupplyThe SAMA5D2C-XULT board requires a power source to permanently power the backup part of theSAMA5D2 device (refer to SAMA5D2 Series datasheet). A super capacitor sustains such permanentpower to VDDBU when all system power sources are off.

Figure 6-8.VDDBU Powering Scheme Option

Populate R ifno Super Cap

(Super)-Capacitorenergy storage

VDDBU

VDD_3V3D6

BAT54C

31

2

C46100nF

C44DNP(1uF)

+ C420.2F/3.3V

R139DNP(2.2K)

JPR6Jumper

D5RB160M-60TR

JP6Header 1X2

1 2

R280 100R 1%



6.3.2.8 Power Supply ControlIn the ACT8945A, three DC-DC converters (1.8V, 1.2V, 3.3V) and two LDO outputs are available.

All ACT8945A outputs can be controlled by the TWI interface through software.

The three DC-DC outputs can be enabled or disabled by the SAMA5D2 SHDN output:

SHDN = 0: The DC-DC output is disabled. SHDN = 1: The DC-DC output is enabled.

Two push buttons are also available:

Wakeup push button: When pressed, the ACT8945A power outputs are restarted if the ACT8945Ais in shutdown mode.

Reset push button: When pressed, the ACT8945A transfers the reset signal to the MPU.

6.3.3 Reset CircuitryThe reset sources for the SAMA5D2C-XULT board are:

Power-on reset from the power management unit (PMIC) Push button reset BP3 External reset from Arduino connectors JTAG or EDBG reset from an in-circuit emulator

Figure 6-9.Reset/Wakeup and Shutdown Control

WAKE UP RESET

VSYS_5V

VSYS_5VVSYS_5V

SHDN[9]

R30 0R

R14 49.9K 1%

Q2BSS138

1

3

2

R12100K

C8100nF

R9 1K C10 100nF

TP11SMD

BP3

Tact

Sw

itch

R190R

R868K

R1349.9K 1%

R20 100R 1%

Q1BSS138

1

3

2

BP2

Tact

Sw

itch

Q3BSS138

1

3

2

TP14SMD

R41 DNP(0R)R15100K

nPBSTATnLBO19

SDA27

SCL26

VSEL25

PWRHLD10

GN

DA

3PW

REN

18

GN

DP1

237

GN

DP3

14

EXPA

D41

SW2OUT2 34

SW3 15

OUT3 17

OUT4 4

OUT5 5

OUT6 8

OUT7 7

nPBIN9

6.3.4 Clock CircuitryThe SAMA5D2C-XULT board includes four clock sources:

Two clocks are alternatives for the SAMA5D2 processor (12 MHz, 32 kHz) One crystal oscillator used for the Ethernet RMII chip (25 MHz) One crystal oscillator used for the EDBG (12 MHz)



Figure 6-10.Clock CircuitryETH_XI

ETH_XO

C34 22pF

C3522pF

Y2

25MHz CL=20pF

123 4

R68DNP(1M)

XOUT32

XIN32

XIN

XOUT R109 DNP(1M)R146 DNP(1M)

C4022pFC45

27pF

C4122pF

Y4

12MHz CL=15pF

1 4

32C4727pF Y3

32.768KHz CL=12.5pF1

23

4

6.3.5 Memory

6.3.5.1 Memory OrganizationThe SAMA5D2 features a DDR/SDR memory interface and an External Bus Interface (EBI) to allowinterfacing to a wide range of external memories and to almost any kind of parallel peripheral.

This section describes the memory devices that equip the SAMA5D2C-XULT board.

6.3.5.2 DDR3/SDRAMTwo DDR3L/SDRAM (MT41H128M16JT-125-K - 2 Gbit = 16 Mbit x 16 x 8 banks) are used as mainsystem memory and total 4 Gbit of SDRAM on the board. The memory bus is 32 bits wide and operateswith a frequency of up to 166 MHz.



Figure 6-11.DDR3L

DDR_VREF

DDR_D0DDR_D1DDR_D2DDR_D3DDR_D4DDR_D5DDR_D6DDR_D7DDR_D8DDR_D9DDR_D10DDR_D11DDR_D12DDR_D13DDR_D14DDR_D15

DDR_D16DDR_D17DDR_D18DDR_D19DDR_D20DDR_D21DDR_D22DDR_D23DDR_D24DDR_D25DDR_D26DDR_D27DDR_D28DDR_D29DDR_D30DDR_D31

DDR_A0DDR_A1DDR_A2DDR_A3DDR_A4DDR_A5DDR_A6DDR_A7DDR_A8DDR_A9DDR_A10DDR_A11DDR_A12DDR_A13


DDR_BA0DDR_BA1DDR_BA2

DDR_BA0DDR_BA1DDR_BA2

DDR_RESETN DDR_RESETN

DDR_CLK+DDR_CLK-DDR_CKEDDR_CSDDR_RASDDR_CASDDR_WE

DDR_CLK+DDR_CLK-DDR_CKEDDR_CSDDR_RASDDR_CASDDR_WE

DDR_DQS0-DDR_DQS0+

DDR_DQS1-DDR_DQS1+

DDR_DQS2+DDR_DQS2-

DDR_DQS3-DDR_DQS3+

DDR_DQM1DDR_DQM0

DDR_DQM3DDR_DQM2

DDR_VREF DDR_VREF

VDD_1V35

VDD_1V35

VDD_1V35

VDD_1V35

VDD_1V35

VDD_1V35

VDDIODDRL14 10uH_150mA

C564.7uF

C834.7uF

R178 0R R258 0R

R1806.8K 1%

R179 DNP(1K)

C55100nF

U8

MT41K128M16JT-125:K

CKJ7

CK#K7

CKEK9

CS#L2

RAS#J3

CAS#K3

WE#L3

A0 N3

A1 P7

A2 P3

A3 N2

A4 P8

A5 P2

A6 R8

A7 R2

A8 T8

A9 R3

A10/AP L7

A11 R7

A12/BC# N7

A13 T3

A14 T7

BA0 M2

BA1 N8

BA2 M3

DQ0E3

DQ1F7

DQ2F2

DQ3F8

DQ4H3

DQ5H8

DQ6G2

DQ7H7

ODT K1

VSS1 A9

VSS2 B3

VSS3 E1

VSS4 G8

VSSQ4 D8VSSQ3 D1VSSQ2 B9VSSQ1 B1

VSSQ5 E2

VDDQ1A1

VDDQ2A8

VDDQ3C1

VDDQ4C9

VDDQ5D2

VDD1 B2

VDD2 G7

UDQS#B7

UDMD3

LDME7

LDQS#G3

UDQSC7

LDQSF3

DQ8D7

DQ10C8

DQ11C2

DQ14B8DQ12A7

DQ15A3DQ13A2

VDD9 D9

VSSQ6 E8

VDDQ6E9

VDDQ7F1

VSSQ7 F9

VSSQ8 G1

VSSQ9 G9

VREFDQH1

VDDQ8H2

VDDQ9H9

NC1J1

NC2J9

VSS5 J2

VSS6 J8

VDD4 K2

VDD5 K8

NC3L1

ZQ L8

NC4L9

VSS7 M1

A15 M7

VREFCAM8

VSS8 M9

VDD6 N1

VDD7 N9

VSS9 P1

VSS10 P9

VDD8 R1

VDD3 R9

VSS11 T1

RESET#T2

VSS12 T9

DQ9C3

C121100nF

U4

MT41K128M16JT-125:K

CKJ7

CK#K7

CKEK9

CS#L2

RAS#J3

CAS#K3

WE#L3

A0 N3

A1 P7

A2 P3

A3 N2

A4 P8

A5 P2

A6 R8

A7 R2

A8 T8

A9 R3

A10/AP L7

A11 R7

A12/BC# N7

A13 T3

A14 T7

BA0 M2

BA1 N8

BA2 M3

DQ0E3

DQ1F7

DQ2F2

DQ3F8

DQ4H3

DQ5H8

DQ6G2

DQ7H7

ODT K1

VSS1 A9

VSS2 B3

VSS3 E1

VSS4 G8

VSSQ4 D8VSSQ3 D1VSSQ2 B9VSSQ1 B1

VSSQ5 E2

VDDQ1A1

VDDQ2A8

VDDQ3C1

VDDQ4C9

VDDQ5D2

VDD1 B2

VDD2 G7

UDQS#B7

UDMD3

LDME7

LDQS#G3

UDQSC7

LDQSF3

DQ8D7

DQ10C8

DQ11C2

DQ14B8DQ12A7

DQ15A3DQ13A2

VDD9 D9

VSSQ6 E8

VDDQ6E9

VDDQ7F1

VSSQ7 F9

VSSQ8 G1

VSSQ9 G9

VREFDQH1

VDDQ8H2

VDDQ9H9

NC1J1

NC2J9

VSS5 J2

VSS6 J8

VDD4 K2

VDD5 K8

NC3L1

ZQ L8

NC4L9

VSS7 M1

A15 M7

VREFCAM8

VSS8 M9

VDD6 N1

VDD7 N9

VSS9 P1

VSS10 P9

VDD8 R1

VDD3 R9

VSS11 T1

RESET#T2

VSS12 T9

DQ9C3

C72100nF

R254 DNP(1K)

C91100nF

R238

240R 1%

C54100nF

R124

240R 1%

C145100nF

R1821R 1%

R1816.8K 1%

6.3.5.3 DDR_CAL Analog InputOne specific analog input, DDR_CAL, is used to calibrate all DDR I/Os.



Figure 6-12.DDR Signals and CAL Analog Input

DDR_D0DDR_D1DDR_D2DDR_D3DDR_D4DDR_D5DDR_D6DDR_D7DDR_D8DDR_D9DDR_D10DDR_D11DDR_D12DDR_D13DDR_D14DDR_D15DDR_D16DDR_D17DDR_D18DDR_D19DDR_D20DDR_D21DDR_D22DDR_D23DDR_D24DDR_D25DDR_D26DDR_D27DDR_D28DDR_D29DDR_D30DDR_D31

DDR_DQM0DDR_DQM1DDR_DQM2DDR_DQM3

DDR_DQS0+DDR_DQS0-

DDR_DQS1+DDR_DQS1-

DDR_DQS2+DDR_DQS2-

DDR_DQS3+DDR_DQS3-


DDR_BA0DDR_BA1

DDR_RASDDR_CAS

DDR_BA2

DDR_CSDDR_WE

DDR_VREF

DDR_RESETN

DDR_CLK+DDR_CLK-DDR_CKE

VDD_1V35

R242100K

R25023.2K 1%

R243100K

C10622pF

SAMA5D27-CN

U6E

DDR_A0F12

DDR_A1C17

DDR_A10C15

DDR_A11A16

DDR_A12A17

DDR_A13G11

DDR_A2B17

DDR_A3B16

DDR_A4C16

DDR_A5G14

DDR_A6F14

DDR_A7F11

DDR_A8C14

DDR_A9D13

DDR_BA0H12

DDR_BA1H13

DDR_BA2F17

DDR_CALE13

DDR_CASG12

DDR_CKEF16DDR_CLKE17

DDR_CLKND17

DDR_CSG13

DDR_D0 B12

DDR_D1 A12

DDR_D10 H17

DDR_D11 K17

DDR_D12 K16

DDR_D13 J13

DDR_D14 K14

DDR_D15 K15

DDR_D16 B8

DDR_D17 B9

DDR_D18 C9

DDR_D19 A9

DDR_D2 C12

DDR_D20 A10

DDR_D21 D10

DDR_D22 B11

DDR_D23 A11

DDR_D24 J12

DDR_D25 H10

DDR_D26 J11

DDR_D27 K11

DDR_D28 L13

DDR_D29 L11

DDR_D3 A13

DDR_D30 L12

DDR_D31 M17

DDR_D4 A14

DDR_D5 C13

DDR_D6 A15

DDR_D7 B15

DDR_D8 G17

DDR_D9 G16

DDR_DQM0 C11

DDR_DQM1 G15

DDR_DQM2 C8

DDR_DQM3 H11

DDR_DQS0 B13

DDR_DQS1 J17

DDR_DQS2 C10

DDR_DQS3 L17

DDR_DQSN0 B14

DDR_DQSN1 J16

DDR_DQSN2 B10

DDR_DQSN3 L16

DDR_RASF13

DDR_RESETNE16

DDR_VREFCMD16DDR_VREFB0H16

DDR_WEF15

C100100nF

C99100nF

6.3.5.4 eMMCThe Secure Digital Multimedia Card (SDMMC) Controller supports the Embedded MultiMedia Card(e.MMC) Specification V4.41, the SD Memory Card Specification V3.0, and the SDIO V3.0 specification.It is compliant with the SD Host Controller Standard V3.0 specification

One MTFC4GLDEA 4 GB eMMC is connected to the processor through the SDMMC0 port.

Table 6-5.SDMMC Reference Documents

Name Link

SD Host Controller Simplified Specification V3.00 www.sdcard.org

SDIO Simplified Specification V3.00 www.sdcard.org

Physical Layer Simplified Specification V3.01 www.sdcard.org

Embedded MultiMedia Card (e.MMC) Electrical Standard 4.51 www.jedec.org



http://www.sdcard.orghttp://www.sdcard.orghttp://www.sdcard.orghttp://www.jedec.org

Figure 6-13.eMMC

(3V3 or 1V8)

47K pull down on SDHC0_CMD_PA1 close to MPU.

IN=0: S1 ClosedIN=1: S2 Closed

(3V3)

Impedance match ofCLK/CMD/DAT[7:0] 50R

39R on SDHC0_CK_PA0 close to MPU.

(3V3 or 1V8)

VDDSDHC

VDDSDHC

VDDSDHC

VDDSDHC1V8 VDDSDHCVDD_3V3

VDD_3V3

VDD_3V3

VDD_3V3

SDHC0_DAT0_PA2[7]SDHC0_DAT1_PA3[7]SDHC0_DAT2_PA4[7]SDHC0_DAT3_PA5[7]SDHC0_DAT4_PA6[7]SDHC0_DAT5_PA7[7]SDHC0_DAT6_PA8[7]SDHC0_DAT7_PA9[7]SDHC0_CMD_PA1[7]SDHC0_CK_PA0[7]SDHC0_RSTN_PA10[7]

SDHC0_VDDSEL_PA11[7]

R25

5D

NP(

47K)

C81100nF

R23

247

K

R14

947

K

U13ADG849

S26

S14

IN1

D 5

VDD

2G

ND

3

U11 MTFC4GLDEA-0M WT

NC11 A1

NC4 A2

DAT0A3

DAT1A4

DAT2A5

NC5 A6

NC6 A7

NC7 A8

NC18 A9

NC95A10

NC94A11

NC93A12

NC92A13

NC91A14

NC90B1

DAT3B2

DAT4B3

DAT5B4

DAT6B5

DAT7B6

NC89B7

NC

74B8

NC53 B9NC52 B10NC51 B11NC50 B12NC49 B13

NC19 B14

NC34 C1

VDD

IC

2

NC33 C3

VSSQ

4C

4

NC32 C5

VCC

Q4

C6

NC31 C7NC30 C8NC29 C9

NC25 C10NC23 C11NC22 C12NC21 C13NC20 C14

NC48 D1NC46 D2

NC39 D3NC38 D4NC37 D12NC36 D13NC35 D14

NC1 E1

NC2 E2

NC3 E3VC

C3

E6

VSS2

E7

VSS5

N5

NC8 E8

NC9 E9

NC10 E10

NC12 E12

NC13 E13

NC14 E14

NC15 F1

NC16 F2

NC17 F3

VCC

2F5

NC24 F10

NC26 F12

NC27 F13

NC28 F14

NC88G1N

C81

G2

VSS1

G5

NC

78G

10

NC40 G12

NC41 G13

NC42 G14

NC

79G

3

NC43 H1

NC44 H2

NC45 H3

VSS3

H10

NC54 H12

NC

55H

13N

C56

H14

NC47 H5

NC

57J1

NC

58J2

NC

59J3

NC

60J5

NC

69J1

3N

C70

J14

NC

71K1

NC

72K2

NC

73K3

NC

77K7

VSS4

K8

VCC

1K9

NC

80K1

0

NC82K12NC83K13NC84K14NC85L1NC86L2NC87L3

NC96L12NC97L13NC98L14NC99M1NC100M2NC101M3

VCC

Q5

M4

CMDM5

CLKM6

NC105M7NC106M8NC107M9NC108M10NC109M11NC110M12NC111M13NC112M14NC113N1

VSSQ

1N

2

NC115N3

VCC

Q3

N4

NC117J12NC118N7NC119N8NC120N9

NC

75N

10N

C76

N11

NC

68N

12

NC

67N

13

NC

66N

14

NC

65P1

NC

64P2

VCC

Q1

P3

VSSQ

3P4

VCC

Q2

P5

VSSQ

2P6

NC

63P7

NC

61P8

NC

62P9

NC114P10

NC104P11

NC103P12

NC102P13

NC116P14

RSTK5

VCC

0J1

0

NC121E5NC122N6NC123K6R235

DNP(47K)

R22510K

R14

247

K

R211 0R

C79100nF

R23

747

K

R212 DNP(0R)

R14

447

K

R14

747

K

R140 39R

C69100nF

C612.2uF

R23

447

K C851uF

R210 DNP(0R)

R15

147

K

C732.2uF

R23

647

K

C86100nF

R23

347

K

6.3.5.5 CS DisableThe SAMA5D2 device boots according to the following sequence:

1. SD CARD connected on SDHC12. eMMC connected on SDHC03. Serial Flash connected on SPI0_IOSET1 (Chip Select 0: NPCS0)4. Optional QSPI Flash connected on QSPI0_IOSET3 (Chip Select 0: CS0)

In this sequence, the first device found with bootable contents is selected as the boot source. The othersare disregarded. (see Note below)

An on-board jumper (JP9) controls the selection (CS#) of the on-board bootable memory components(eMMC and Serial Flash) using a non-inverting 3-state buffer.



Figure 6-14.CS Disable

BOOT_DIS

QSPI Flash CS

eMMC Flash CS

SPI Flash CS

QSPI0_CS

SPI0_CS0_PA17

VDD_3V3

VDD_3V3

QSPI0_CS_PA23[7]

SPI0_NPCS0_PA17[7]

SDHC0_CD_PA13 [7]

C62100nF

JPR9Jumper

VCC

GND

U15

NL17SZ126DFT2G

1

2

3

4

5

Q6BSS138

1

3

2

R227 100R 1%

VCC

GND

U14

NL17SZ126DFT2G

1

2

3

4

5

JP9Header 1X2

1 2

R21810K

C63100nF

R23010K

R21710K

R22610K

The rule of operation is:

JP9 = OFF (default) enable normal boot from serial Flash memories mounted on board JP9 = ON booting from optional serial Flash memories is disabled

Refer to the SAMA5D2 Series datasheet for more information on standard boot strategies andsequencing.

Note: The errata in the SAMA5D2 datasheet state that booting from SD/MMC devices isnondeterministic. In order to have a known behavior regardless of SD/MMC data contents, werecommend SDMMC0/SDMMC1 boot bits be disabled in the Boot Configuration Word fuse.

6.3.6 Additional Memories

6.3.6.1 Serial FlashThe SAMA5D2 provides two high-speed Serial Peripheral Interface (SPI) controllers. One port is used tointerface with the on-board serial serial Flash.

The four main signals used in the SPI are Clock, Data In, Data Out, and Chip Select. The SPI is a serialinterface similar to the I2C bus interface but with three main differences:

It operates at a higher speed. Transmit and receive data lines are separate. Device access is chip select-based instead of address-based.

Figure 6-15.Serial Flash

SPI0_CS0_PA17

VDD_3V3

SPI0_MOSI_PA15[7]SPI0_MISO_PA16[7]SPI0_SPCK_PA14[7] C53

100nF

U9

AT25DF321A

HOLD 7

GND 4

VCC 8

CS1SCK6SI5

SO2

WP 3

6.3.6.2 QSPI Serial FlashThe SAMA5D2 provides two Quad Serial Peripheral Interfaces (QSPI). One port is used to interface withthe optional on-board QSPI serial Flash.

The Quad SPI Interface (QSPI) is a synchronous serial data link that provides communication withexternal devices in Master mode.



The QSPI can be used in SPI mode to interface to serial peripherals (such as ADCs, DACs, LCDcontrollers, CAN controllers and sensors), or in Serial Memory mode to interface to serial Flashmemories.

The QSPI allows the system to execute code directly from a serial Flash memory (XIP) without codeshadowing to RAM. The serial Flash memory mapping is seen in the system as other memories (ROM,SRAM, DRAM, embedded Flash memory, etc.).

With the support of the Quad SPI protocol, the QSPI allows the system to use high-performance serialFlash memories which are small and inexpensive, in place of larger and more expensive parallel Flashmemories.

Figure 6-16.QSPI Serial Flash

QSPI0_CS

VDD_3V3

QSPI0_SCK_PA22 [7]

QSPI0_IO0_PA24[7]

QSPI0_IO1_PA25[7]

QSPI0_IO2_PA26[7]

QSPI0_IO3_PA27[7]

U10

MX25L25673GM2I-08G

SI/SIO05

SO/SIO12

SIO23

SIO37

VCC8

CS#1

SCLK6

GND4

C52100nF

6.3.6.3 Serial EEPROM with Unique MAC AddressThe SAMA5D2C-XULT board embeds one Microchip AT24MAC402/602 EEPROM using a TWI1interface.

The AT24MAC402/602 provides 2048 bits of Serial Electrically-Erasable Programmable Read-OnlyMemory (EEPROM) organized as 256 words of eight bits each and is accessed via an I2C-compatible (2-wire) serial interface. In addition, the AT24MAC402/602 incorporates an easy and inexpensive method toobtain a globally unique MAC or EUI address (EUI-48 or EUI-64).

The EUI-48/64 addresses can be assigned as the actual physical address of a system hardware deviceor node, or it can be assigned to a software instance. These addresses are factory-programmed by Atmeland guaranteed unique. They are permanently write-protected in an extended memory block locatedoutside of the standard 2-Kbit memory array.

In addition, the AT24MAC402/602 provides the value-added feature of a factory-programmed, alsoguaranteed unique 128-bit serial number located in the extended memory block (same area as the EUIaddress values).

WARNING The EEPROM device is also used as a software label to store board information such as chiptype, manufacture name and production date, using the last two 16-byte blocks in memory. Topreserve the ease of board identification by software, the information contained in theseblocks should not be modified.

Figure 6-17.EEPROM

EEPROM_WP

EEPROM_WP

VDD_3V3 VDD_3V3

EEPROM_TWD1_PD4 [8]

EEPROM_TWCK1_PD5 [8]

R316

0R

R31

910

K

U18

AT24MAC402-MAHM-T

A01

A12

A23

GND4

VCC 8

WP 7

SCL 6

SDA 5

R32

0D

NP(

10K)

C161 100nF



6.4 PIO Usage and Interface Connectors

6.4.1 Secure Digital Multimedia Card Interface

6.4.1.1 Secure Digital Multimedia Card Controller (SDMMC)The SAMA5D2C-XULT board has two SDMMC interfaces that support the MultiMedia Card (e.MMC)Specification V4.41, the SD Memory Card Specification V3.0, and the SDIO V3.0 specification. It iscompliant with the SD Host Controller Standard V3.0 specification.

SDMMC0 interface is connected to the eMMC. SDMMC1 Interface based on a 7-pin interface (clock, command, 4-bit data, power lines).

6.4.1.2 SDMMC1 Card ConnectorA standard MMC/SD card connector, connected to SDMMC1, is mounted on the top side of the board. Itincludes a card detection switch.

Figure 6-18.SDMMC1

(MCI1_CD)

(SDHC1_WP)

(MCI1_DA1)(MCI1_DA0)

(MCI1_CK)

(MCI1_CDA)(MCI1_DA3)(MCI1_DA2)

VDD_3V3

VDD_3V3

SDHC1_DAT0_PA18[7]SDHC1_DAT1_PA19[7]

SDHC1_DAT2_PA20[7]SDHC1_DAT3_PA21[7]SDHC1_CMD_PA28[7]

SDHC1_CK_PA22[7]

SDHC1_CD_PA30[7]

R20

910

K

C75100nFR

241

68K

R19

268

K

R24

568

K

R2140R

J19

SD Card Connector

8

5

76

43219

141516

13121110

R18

968

K

R2490R

C6410uFR

229

10K

Note: Refer to details on SDcard boot in CS Disable.



Standard SD Socket J19

R18R11

R24

C1C3

TP3

C2R17R16

R15

R14

Q1C

8 R9R8Q2C9

R10

R23

C5 C6R5R1

TP1 TP2

J1

R27

R22

R21

R7R6C7

C11 R12

R25

U1C4

JP1

BP1

C12

L2R35

R31

R32

R34

R33R3

9

R36

R37

R38

J2R28

J3R26R20

R19

L1

C13L3Q

3

C10

R13

C14R29R2 R3 R4

L4

J5

C18C16

R48

R45R47JP2

R40R42

J4

R30R41

D1

U2

C17

C20

TP5

Y1D4

R46

D3

C15R43 TP

4

Q4 C21

J6

R64

U3

R61R60R49

C25

D2

R44C19C22

L6L5

TP6

JP3

C24

R59

C35

C34

R70

R69

R68

R67

C36

C31C28

C29

C30C27

JP4

C37

TP7C2

3R63

C33

C26

Q5

Y2R66

R65J9J

8C3

8

R58

R57

R56

R55

R54

R53

C39

R52

R51

R50R71

R62C32

R73

R72J

17

R81

R80

R79

R78

R77

R76

Y3

L10

J7L7 L8 L9

R74

J11

C42

R123R105R100C4

1C4

0R9

6R9

5

R94

R93

R92

R91

R90

R89

R88

R87

R86

R85

R84

R83

R82

JP5

R75J10

J13

J12

C43

R103

R122

R121

R120

R119

R118

R117

R116

R115

R114

R113

R112

R111

R110

R109

R108R124R104

R99

R130

C44

R129C

45

R131L12

L11

J18

R137

R136

R135

R134

R133

R132

JP6C46Y4R13

8

C47

TP8

R102R10179R 89RU5J1

4

J19

R152

R146C51

R143R142R141R140

R139C48

R128R127R126R125R107R106

U4C50

C49

L13

U7J15

R154R151 R150R149R148R147R145R144

U6R153U8

R158R155

C52

J16

R163R161R159R156

R162

R160R157

BP2 U9C53

U10

R169R167R165

R164

U11

R177R175R173R171

R182

R181

C55

R180

C54

R179

R178

J22

R172R170R168R166

JP7

L14

C56

J20

BP3

J21

R176R174

J23

J24

JP8

C60

C59

R184R183C57

JP9J2

6J25

C58

42

3

42

3

41

3

42

32

D22

SCL1

F3_R

XD

SDA1

F0_R

XD

F3_T

XD

F0_T

XD

F4_R

XD

F4_T

XDGND

AREF

SDA0

SCL0

A5-U

SB-A

D23

V5 V5

810 912 1113

BOOT_DIS

2119 2017 18

XPRO

EXT

21614 151 03 24567

XPRO

EXT

1

XPRO

PO

WER

VDD_

5V_I

N

F1_T

XDF1

_RXD

WWW.ATMEL.COM

D51

D49

D50

D48

PIO

BU

A5-JTAGEDBG-JTAG

D47D46EDBG

-USB S

DMM

C1

ISC

D45

D43

D44

D42

DIG

ITAL

VDDBUD41D40BB

D39

D37

D38

D36HSICAW

AKE

UP D35

D33

D34

D32

SDM

MC0 D31D30

RESE

T

D29

D27

D28

D26VDDIODDR

D25D24

D53

GNDGNDD52

A

A5-U

SB-B

R

CANT

X1CA

NRX1

VDD_3V3

CANR

X0

CANT

X0

VBAT

STAT

ETH

A11


GND

GND5V3V3

RST

3V3

CLASS D

TM

VDDCORE

POW

ER

3.3V

LEVE

LS


DEBUG


VBAT

RGB

LED

VDD_

3V3_

LP

Table 6-6.Standard SD Socket J19 Signal Descriptions

Pin Mnemonic PIO Signal Description

1 DAT3 PA21 Data Bit 3

2 CDA PA28 Command Line

3 GND Common ground

4 VCC Supply Voltage 3.3V

5 CLK PA22 Clock / Command Line

6 CD PA30 Card Detect




10 GND Common ground

6.4.2 Communication InterfacesThe SAMA5D2C-XULT board is equipped with GMAC and USB Host/Device communication interfaces.

6.4.2.1 Ethernet 10/100 (GMAC) PortThe SAMA5D2C-XULT board contains a MICREL PHY device (KSZ8081) operating at 10/100 Mb/s. Theboard supports RMII interface modes. The Ethernet interface consists of two pairs of low-voltagedifferential pair signals designated from GRX and GTX plus control signals for link activity indicators.



These signals can be used to connect to a 10/100 Base-T RJ45 connector integrated on the SAMA5D2C-XULT board.

Additionally, for monitoring and control purposes, LED functionality is carried on the RJ45 connectors toindicate activity, link, and speed status information.

For more information about the Ethernet controller device, refer to the MICREL KSZ8081RN controllerdatasheet.

Figure 6-19.Ethernet (GMAC)

10Base-T/100Base-TX

Ethernet

LINK

ACT

top/bot

top/bot

top/bot

top/bot

ETH_LED0

ETH_LED0

TX+TX+

ETH_XI

ETH_XO

ETH_LED1ETH_LED1

TX-

RX+

RX-RX-

RX+

TX-

EARTH_ETHEARTH_ETH

GND_ETH VDDA_3V3

VDD_3V3

VDD_3V3

VDD_3V3

VDD_3V3

NRST [4,9,10,14,15]

ETH_GRX0_PB18 [7]

ETH_GTX0_PB20 [7]

ETH_GRX1_PB19 [7]

ETH_GTXEN_PB15 [7]

ETH_GRXER_PB17 [7]ETH_GRXDV_PB16 [7]

ETH_GTX1_PB21 [7]

ETH_INT_PC9 [8]ETH_GMDIO_PB23 [7]ETH_GMDC_PB22 [7]

ETH_GTXCK_PB14 [7]

R68

10K

R69

1K

R48

10K

R317 470R

U3

KSZ8081RNB

RXC/B-CAST_OFF 19

CRS/CONFIG1 29

COL/CONFIG0 28

TXD1 25

TXD0 24

TXEN 23

RXD3/PHYAD0 13

RXD2/PHYAD1 14

RXD1/PHYAD2 15

RXD0/DUPLEX 16

RXDV/CONFIG2 18

RXER/ISO 20

MDC 12

MDIO 11

INTRP/NAND 21

VDDA_3V3 3

VDDIO 17

RESET 32

TXP7

TXM6

RXP5

RXM4

VDD_1V22

GND1

PADDLE33

TXC22

TXD226

TXD327

REXT10

XO8

XI9

LED0/NWAYEN30

LED1/SPEED31

R45

1K

R3410K C25

100nF

C162100nF

R3310K C36

10uF

R31

10K

C160100nF

C21100nF

R65

10K

C16 2.2uF

R60

10K

C1210uF

C18 100nF

R66

10K

L2180ohm at 100MHz

1 2 R67

10KR706.49K 1%

1

2

3

6

4

5

7

8

75

75

75 75

1nF

TD+

TD-

CT

NC

RD-

CT

TX+

TX-

RX+

RX-

RD+

Left Green LED Right yellow LED

J6 RJ45 Connector1

2

7

8

3

6

5

4

9101112

1314

1516

R314 470R

R35 0R

R32

10K

Figure 6-20.ETH RJ45 Connector J6

R18R11

R24

C1C3

TP3

C2R17R16

R15

R14

Q1C

8 R9R8Q2C9

R10

R23

C5 C6R5R1

TP1 TP2

J1

R27

R22

R21

R7R6C7

C11 R12

R25

U1C4

JP1

BP1

C12

L2R35

R31

R32

R34

R33R3

9

R36

R37

R38

J2R28

J3R26R20

R19

L1

C13L3Q

3

C10

R13

C14R29R2 R3 R4

L4

J5

C18C16

R48

R45R47JP2

R40R42

J4

R30R41

D1

U2

C17

C20

TP5

Y1D4

R46

D3

C15R43 TP

4

Q4 C21

J6

R64

U3

R61R60R49

C25

D2

R44C19C22

L6L5

TP6

JP3

C24

R59

C35

C34

R70

R69

R68

R67

C36

C31C28

C29

C30C27

JP4

C37

TP7C2

3R63

C33

C26

Q5

Y2R66

R65J9J

8C3

8

R58

R57

R56

R55

R54

R53

C39

R52

R51

R50R71

R62C32

R73

R72J

17

R81

R80

R79

R78

R77

R76

Y3

L10

J7L7 L8 L9

R74

J11

C42

R123R105R100C4

1C4

0R9

6R9

5

R94

R93

R92

R91

R90

R89

R88

R87

R86

R85

R84

R83

R82

JP5

R75J10

J13

J12

C43

R103

R122

R121

R120

R119

R118

R117

R116

R115

R114

R113

R112

R111

R110

R109

R108R124R104

R99

R130

C44

R129C

45

R131L12

L11

J18

R137

R136

R135

R134

R133

R132

JP6C46Y4R13

8

C47

TP8

R102R10179R 89RU5J1

4

J19

R152

R146C51

R143R142R141R140

R139C48

R128R127R126R125R107R106

U4C50

C49

L13

U7J15

R154R151 R150R149R148R147R145R144

U6R153U8

R158R155

C52

J16

R163R161R159R156

R162

R160R157

BP2 U9C53

U10

R169R167R165

R164

U11

R177R175R173R171

R182

R181

C55

R180

C54

R179

R178

J22

R172R170R168R166

JP7

L14

C56

J20

BP3

J21

R176R174

J23

J24

JP8

C60

C59

R184R183C57

JP9J2

6J25

C58

42

3

42

3

41

3

42

32

D22

SCL1

F3_R

XD

SDA1

F0_R

XD

F3_T

XD

F0_T

XD

F4_R

XD

F4_T

XDGND

AREF

SDA0

SCL0

A5-U

SB-A

D23

V5 V5

810 912 1113

BOOT_DIS

2119 2017 18

XPRO

EXT

21614 151 03 24567

XPRO

EXT

1

XPRO

PO

WER

VDD_

5V_I

N

F1_T

XDF1

_RXD

WWW.ATMEL.COM

D51

D49

D50

D48

PIO

BU

A5-JTAGEDBG-JTAG

D47D46EDBG

-USB S

DMM

C1

ISC

D45

D43

D44

D42

DIG

ITAL

VDDBUD41D40BB

D39

D37

D38

D36HSIC

AWAK

E UP D35

D33

D34

D32

SDM

MC0 D31D30

RESE

T

D29

D27

D28

D26VDDIODDR

D25D24

D53

GNDGNDD52

A

A5-U

SB-B

R

CANT

X1CA

NRX1

VDD_3V3

CANR

X0

CANT

X0

VBAT

STAT

ETH

A11


GND

GND5V3V3

RST

3V3

CLASS D

TM

VDDCORE

POW

ER

3.3V

LEVE

LS


DEBUG


VBAT

RGB

LED

VDD_

3V3_

LP



Table 6-7.ETH RJ45 Connector Signal Descriptions


1 TX+ Transmit

2 TX- Transmit

3 RX+ Receive

4 Decoupling capacitor

5 Decoupling capacitor

6 RX- Receive

7 NC

8 EARTH / GND Common ground

9 ACT LED LED activity

10 ACT LED LED activity

11 LINK LED LED link connection

12 LINK LED LED link connection



15 NC

16 NC

6.4.2.2 USB Host/Device A, BThe SAMA5D2C-XULT board features three USB communication ports:

USB Host B High- and Full-speed Interface One USB host type A connector

USB A Device Interface One USB device standard micro-AB connector. This port has a VBUS detection function

made through the resistor ladder R183 and R184. UBC C high-speed host port

One USB high-speed host port with a High-Speed Inter-Chip (HSIC) interface. This port isconnected to a single 2-pin jumper.



Figure 6-21. USB-B Host & USB-A Device Interface

USB A USB B

USBB_VBUS_5V

EARTH_USB_A

EARTH_USB_B

USBA_VBUS_5V [4]

USBA_DM [9]USBA_DP [9]

USBB_DP [9]USBB_DM [9]

USBA_VBUS_5V_PA31 [7]

C5720pF

VBUS

SHD

DMDPID

GND

J23MicroUSB AB Connector

12345

8 6

11 7

9

10

R184200K

A

J13Single USB Type A

VBUS 1

DM 2

DP 3

GND 4

SH1

5

SH2

6

R183 100K

The USB B Host port is equipped with 500 mA high-side power switch for self-powered and bus-poweredapplications.

Figure 6-22.USB Power Switch

EN: Active HighUSBB_VBUS_5V

VDDB_5VUSBB_OVCUR_PA29 [7]

USBB_EN5V_PB10 [7]

C15710uF

U16

SP2525A-1EN-L

EN 1

FLG 2

NC 4

OUT_28

OUT_16

GND 3IN_27

IN_15

L21180ohm at 100MHz

1 2

C156100nF

R30110K

C155100nF



6.4.3 USB-A Micro-AB Connector J23Figure 6-23.USB-A Connector J23

R18R11

R24

C1C3

TP3

C2R17R16

R15

R14

Q1C

8 R9R8Q2C9

R10

R23

C5 C6R5R1

TP1 TP2

J1

R27

R22

R21

R7R6C7

C11 R12

R25

U1C4

JP1

BP1

C12

L2R35

R31

R32

R34

R33R3

9

R36

R37

R38

J2R28

J3R26R20

R19

L1

C13L3Q

3

C10

R13

C14R29R2 R3 R4

L4

J5

C18C16

R48

R45R47JP2

R40R42

J4

R30R41

D1

U2

C17

C20

TP5

Y1D4

R46

D3

C15R43 TP

4

Q4 C21

J6

R64

U3

R61R60R49

C25

D2

R44C19C22

L6L5

TP6

JP3

C24

R59

C35

C34

R70

R69

R68

R67

C36

C31C28

C29

C30C27

JP4

C37

TP7C2

3R63

C33

C26

Q5

Y2R66

R65J9J

8C3

8

R58

R57

R56

R55

R54

R53

C39

R52

R51

R50R71

R62C32

R73

R72J

17

R81

R80

R79

R78

R77

R76

Y3

L10

J7L7 L8 L9

R74

J11

C42

R123R105R100C4

1C4

0R9

6R9

5

R94

R93

R92

R91

R90

R89

R88

R87

R86

R85

R84

R83

R82

JP5

R75J10

J13

J12

C43

R103

R122

R121

R120

R119

R118

R117

R116

R115

R114

R113

R112

R111

R110

R109

R108R124R104

R99

R130

C44

R129C

45R131L12

L11

J18

R137

R136

R135

R134

R133

R132

JP6C46Y4R13

8

C47

TP8

R102R10179R 89RU5J1

4

J19

R152

R146C51

R143R142R141R140

R139C48

R128R127R126R125R107R106

U4C50

C49

L13

U7J15

R154R151 R150R149R148R147R145R144

U6R153U8

R158R155

C52

J16

R163R161R159R156

R162

R160R157

BP2 U9C53

U10

R169R167R165

R164

U11

R177R175R173R171

R182

R181

C55

R180

C54

R179

R178

J22

R172R170R168R166

JP7

L14

C56

J20

BP3

J21

R176R174

J23

J24

JP8

C60

C59

R184R183C57

JP9J2

6J25

C58

42

3

42

3

41

3

42

32

D22

SCL1

F3_R

XD

SDA1

F0_R

XD

F3_T

XD

F0_T

XD

F4_R

XD

F4_T

XDGND

AREF

SDA0

SCL0

A5-U

SB-A

D23

V5 V5

810 912 1113

BOOT_DIS

2119 2017 18

XPRO

EXT

21614 151 03 24567

XPRO

EXT

1

XPRO

PO

WER

VDD_

5V_I

N

F1_T

XDF1

_RXD

WWW.ATMEL.COM

D51

D49

D50

D48

PIO

BU

A5-JTAGEDBG-JTAG

D47D46EDBG

-USB S

DMM

C1

ISC

D45

D43

D44

D42

DIG

ITAL

VDDBUD41D40BB

D39

D37

D38

D36HSIC

AWAK

E UP D35

D33

D34

D32

SDM

MC0 D31D30

RESE

T

D29

D27

D28

D26VDDIODDR

D25D24

D53

GNDGNDD52

A

A5-U

SB-B

R

CANT

X1CA

NRX1

VDD_3V3

CANR

X0

CANT

X0

VBAT

STAT

ETH

A11


GND

GND5V3V3

RST

3V3

CLASS D

TM

VDDCORE

POW

ER

3.3V

LEVE

LS


DEBUG


VBAT

RGB

LED

VDD_

3V3_

LP

6.4.4 USB-B Type B Connector J13The USB-B host port A (J13) features a VBUS insert detection function through the ladder-type resistorsR26 and R27.



Figure 6-24.USB B Connector J13

R18R11

R24

C1C3

TP3

C2R17R16

R15

R14

Q1C

8 R9R8Q2C9

R10

R23

C5 C6R5R1

TP1 TP2

J1

R27

R22

R21

R7R6C7

C11 R12

R25

U1C4

JP1

BP1

C12

L2R35

R31

R32

R34

R33R3

9

R36

R37

R38

J2R28

J3R26R20

R19

L1

C13L3Q

3

C10

R13

C14R29R2 R3 R4

L4

J5

C18C16

R48

R45R47JP2

R40R42

J4

R30R41

D1

U2

C17

C20

TP5

Y1D4

R46

D3

C15R43 TP

4

Q4 C21

J6

R64

U3

R61R60R49

C25

D2

R44C19C22

L6L5

TP6

JP3

C24

R59

C35

C34

R70

R69

R68

R67

C36

C31C2

8

C29

C30C2

7

JP4

C37

TP7C2

3R63

C33

C26

Q5

Y2R66

R65J9J

8C3

8

R58

R57

R56

R55

R54

R53

C39

R52

R51

R50R71

R62C32

R73

R72J

17

R81

R80

R79

R78

R77

R76

Y3

L10

J7L7 L8 L9

R74

J11

C42

R123R105R100C4

1C4

0R9

6R9

5

R94

R93

R92

R91

R90

R89

R88

R87

R86

R85

R84

R83

R82

JP5

R75J10

J13

J12

C43

R103

R122

R121

R120

R119

R118

R117

R116

R115

R114

R113

R112

R111

R110

R109

R108R1

24R104R99

R130

C44

R129C

45

R131L12

L11

J18

R137

R136

R135

R134

R133

R132

JP6C46Y4R13

8

C47

TP8

R102R10179R 89RU5J1

4

J19

R152

R146C51

R143R142R141R140

R139C48

R128R127R126R125R107R106

U4C50

C49

L13

U7J15

R154R151 R150R149R148R147R145R144

U6R153U8

R158R155

C52

J16

R163R161R159R156

R162

R160R157

BP2 U9C53

U10

R169R167R165

R164

U11

R177R175R173R171

R182

R181

C55

R180

C54

R179

R178

J22

R172R170R168R166

JP7

L14

C56

J20

BP3

J21

R176R174

J23

J24

JP8

C60

C59

R184R183C57

JP9J2

6J25

C58

42

3

42

3

41

3

42

32

D22

SCL1

F3_R

XD

SDA1

F0_R

XD

F3_T

XD

F0_T

XD

F4_R

XD

F4_T

XDGND

AREF

SDA0

SCL0

A5-U

SB-A

D23

V5 V5

810 912 1113

BOOT_DIS

2119 2017 18

XPRO

EXT

21614 151 03 24567

XPRO

EXT

1

XPRO

PO

WER

VDD_

5V_I

N

F1_T

XDF1

_RXD

WWW.ATMEL.COM

D51

D49

D50

D48

PIO

BU

A5-JTAGEDBG-JTAG

D47D46EDBG

-USB S

DMM

C1

ISC

D45

D43

D44

D42

DIG

ITAL

VDDBUD41D40BB

D39

D37

D38

D36HSICAW

AKE

UP D35

D33

D34

D32

SDM

MC0 D31D30

RESE

T

D29

D27

D28

D26VDDIODDR

D25D24

D53

GNDGNDD52

A

A5-U

SB-B

R

CANT

X1CA

NRX1

VDD_3V3

CANR

X0

CANT

X0

VBAT

STAT

ETH

A11


GND

GND5V3V3

RST

3V3

CLASS D

TM

VDDCORE

POW

ER

3.3V

LEVE

LS


DEBUG


VBAT

RGB

LED

VDD_

3V3_

LP

Table 6-8.USB A&B Connector Signal Descriptions


1 VBUS 5V power

2 DM Data minus

3 DP Data plus

4 ID On-the-go identification

5 GND Common ground

6.4.5 LCD TFT Interface

6.4.5.1 LCDThe SAMA5D2C-XULT board provides 18 bits of data and control signals to the LCD interface. Othersignals are used to control the LCD and are available on connector J2: TWI, SPI, two GPIOs for interrupt,1-Wire and power supply lines.

6.4.5.2 LCD Expansion HeaderJ2 is a 1.27mm pitch 50-pin header. It gives access to the LCD signals.



Figure 6-25.LCD Expansion Header Interface Schematic

(LCDDAT0)

(LCDDAT6)(LCDDAT5)(LCDDAT4)

(LCDDAT3)(LCDDAT2)

(LCDDAT1)

(LCDDAT11)(LCDDAT10)

(LCDDAT9)(LCDDAT8)

(LCDDAT7)

(LCDDAT16)(LCDDAT15)(LCDDAT14)(LCDDAT13)(LCDDAT12)

(LCDDAT22)(LCDDAT21)(LCDDAT20)

(LCDDAT19)(LCDDAT18)

(LCDDAT17)

(LCDDEN)(LCDHSYNC)(LCDVSYNC)(LCDPCK)

(LCDDAT23)

(IRQ1)(IRQ2)(LCDPWM)

(LCDDISP)

(ID_SYS)

LCD

(TWI_SCL)(TWI_SDA)

VDDB_5V VDD_3V3

LCD_ID_PB0[7]

LCD_DAT6_PC14[8]LCD_DAT7_PC15[8]



LCD_DEN_PD1[8]LCD_HSYNC_PC31[8]LCD_VSYNC_PC30[8]LCD_PCK_PD0[8]

LCD_TWCK1_PD5[8]LCD_TWD1_PD4[8]LCD_DISP_PC29[8]

LCD_PWM_PC28[8]

LCD_IRQ1_PB7[7]LCD_IRQ2_PB8[7]

LCD_AD3_YM_PD22[8]ISC_PCK/SPI1_NPCS0_PC4[8,10,15]

LCD_AD2_YP_PD21[8]ISC_D9/SPI1_MISO_PC3[8,10,15]

LCD_AD1_XM_PD20[8]ISC_D8/SPI1_MOSI_PC2[8,10,15]

LCD_AD0_XP_PD19[8]ISC_D7/SPI1_SPCK_PC1[8,10,15]

EDBG_ID_01[14]







NRST[4,9,12,14,15]

R335 DNP(0R)

R36 DNP(0R)

R37 DNP(0R)

R28 DNP(330R)R42 0R

R40 0R

R231 22R

R222 39R

R219 22R

R213 22R

J2

50 Pin FPC Connector

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950

5251

R38 DNP(0R)

R347 0R

R39 DNP(0R)

6.4.5.3 LCD PowerIn order to operate correctly out of the processor with various LCD modules, two voltage lines areavailable: 3.3V and 5 VCC (default), both selected by 0R resistors R335 and R347.

Figure 6-26.LCD Power

LCDVDDB_5V VDD_3V3

NRST[4,9,12,14,15]

R335 DNP(0R)

R40 0R

J2

454647484950

R347 0R



6.4.5.4 LCD Connector J2Figure 6-27.LCD Connector J2

R18R11

R24

C1C3

TP3

C2R17R16

R15

R14

Q1C

8 R9R8Q2C9

R10

R23

C5 C6R5R1

TP1 TP2

J1

R27

R22

R21

R7R6C7

C11 R12

R25

U1C4

JP1

BP1

C12

L2R35

R31

R32

R34

R33R3

9

R36

R37

R38

J2R28

J3R26R20

R19

L1

C13L3Q

3

C10

R13

C14R29R2 R3 R4

L4

J5

C18C16

R48

R45R47JP2

R40R42

J4

R30R41

D1

U2

C17

C20

TP5

Y1D4

R46

D3

C15R43 TP

4

Q4 C21

J6

R64

U3

R61R60R49

C25

D2

R44C19C22

L6L5

TP6

JP3

C24

R59

C35

C34

R70

R69

R68

R67

C36

C31C2

8

C29

C30C2

7

JP4

C37

TP7C2

3R63

C33

C26

Q5

Y2R66

R65J9J

8C3

8

R58

R57

R56

R55

R54

R53

C39

R52

R51

R50R71

R62C32

R73

R72J

17

R81

R80

R79

R78

R77

R76

Y3

L10

J7L7 L8 L9

R74

J11

C42

R123R105R100C4

1C4

0R9

6R9

5

R94

R93

R92

R91

R90

R89

R88

R87

R86

R85

R84

R83

R82

JP5

R75J10

J13

J12

C43

R103

R122

R121

R120

R119

R118

R117

R116

R115

R114

R113

R112

R111

R110

R109

R108R1

24R104R99

R130

C44

R129C

45R131L12

L11

J18

R137

R136

R135

R134

R133

R132

JP6C46Y4R13

8

C47

TP8

R102R10179R 89RU5J1

4

J19

R152

R146C51

R143R142R141R140

R139C48

R128R127R126R125R107R106

U4C50

C49

L13

U7J15

R154R151 R150R149R148R147R145R144

U6R153U8

R158R155

C52

J16

R163R161R159R156

R162

R160R157

BP2 U9C53

U10

R169R167R165

R164

U11

R177R175R173R171

R182

R181

C55

R180

C54

R179

R178

J22

R172R170R168R166

JP7

L14

C56

J20

BP3

J21

R176R174

J23

J24

JP8

C60

C59

R184R183C57

JP9J2

6J25

C58

42

3

42

3

41

3

42

32

D22

SCL1

F3_R

XD

SDA1

F0_R

XD

F3_T

XD

F0_T

XD

F4_R

XD

F4_T

XDGND

AREF

SDA0

SCL0

A5-U

SB-A

D23

V5 V5

810 912 1113

BOOT_DIS

2119 2017 18

XPRO

EXT

21614 151 03 24567

XPRO

EXT

1

XPRO

PO

WER

VDD_

5V_I

N

F1_T

XDF1

_RXD

WWW.ATMEL.COM

D51

D49

D50

D48

PIO

BU

A5-JTAGEDBG-JTAG

D47D46EDBG

-USB S

DMM

C1

ISC

D45

D43

D44

D42

DIG

ITAL

VDDBUD41D40BB

D39

D37

D38

D36HSIC

AWAK

E UP D35

D33

D34

D32

SDM

MC0 D31D30

RESE

T

D29

D27

D28

D26VDDIODDR

D25D24

D53

GNDGNDD52

A

A5-U

SB-B

R

CANT

X1CA

NRX1

VDD_3V3

CANR

X0

CANT

X0

Date post:	03-Apr-2018
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