372312f[1]

7/29/2019 372312f[1]

1/20

LTC3723-1/LTC3723-2

1

372312f

, LTC and LT are registered trademarks of Linear Technology Corporation.All other trademarks are the property of their respective owners.APPLICATIO S

U

FEATURES

TYPICAL APPLICATIOU

DESCRIPTIOU

The LTC

3723-1/LTC3723-2 synchronous push-pull PWMcontrollers provide all of the control and protection func-tions necessary for compact and highly efficient, isolatedpower converters. High integration minimizes externalcomponent count, while preserving design flexibility.

The robust push-pull output stages switch at half theoscillator frequency. Dead-time is independently pro-grammed with an external resistor. Synchronous rectifiertiming is adjustable to optimize efficiency. A UVLO pro-gram input provides precise system turn-on and turn offvoltages. The LTC3723-1 features peak current modecontrol with programmable slope compensation and lead-ing edge blanking, while the LTC3723-2 employs voltagemode control with voltage feedforward capability.

The LTC3723-1/LTC3723-2 feature extremely low operat-ing and start-up currents. Both devices provide reliableshort-circuit and overtemperature protection. TheLTC3723-1/LTC3723-2 are offered in a 16-pin SSOPpackage.

Telecommunications, Infrastructure Power Systems Distributed Power Architectures

High Efficiency Synchronous Push-Pull PWM 1.5A Sink, 1A Source Output Drivers Supports Push-Pull, Full-Bridge, Half-Bridge, and

Forward Topologies Adjustable Push-Pull Dead-Time and Synchronous

Timing Adjustable System Undervoltage Lockout and

Hysteresis Adjustable Leading Edge Blanking Low Start-Up and Quiescent Currents Current Mode (LTC3723-1) or Voltage Mode

(LTC3723-2) Operation Single Resistor Slope Compensation VCC UVLO and 25mA Shunt Regulator Programmable Fixed Frequency Operation to 1MHz 50mA Synchronous Output Drivers Soft-Start, Cycle-by-Cycle Current Limiting and

Hiccup Mode Short-Circuit Protection 5V, 15mA Low Dropout Regulator Available in 16-Pin SSOP Package

Synchronous Push-PullPWM Controllers

VOUT

VOUT

V+

VOUT

GND-F

LT1431

GND-S

COLL RREF

372312 TA01

VIN

VREF

FROMAUXILIARY

WINDING

VREF

DRVA

DRVB

CSVCC

DPRG

LTC3723-1

SDRA

SDRB

VREF

COMP

UVLO

SPRG

CT

RLEB

SS

FB GND

LTC3901

SYNC

ME

MF

Isolated Push-Pull Converter

7/29/2019 372312f[1]

2/20

LTC3723-1/LTC3723-2

2

372312f

VCC to GND (Low Impedance Source) .......0.3V to 10V(Chip Self-Regulates at 10.3V)

UVLO to GND............................................. 0.3V to VCCAll Other Pins to GND(Low Impedance Source) .........................0.3V to 5.5VVCC (Current Fed) ................................................. 40mA

ABSOLUTE AXI U RATI GSW WW U

PACKAGE/ORDER I FOR ATIOU UW

(Note 1)

ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operatingtemperature range, otherwise specifications are at TA = 25C. VCC = 9.5V unless otherwise noted.

VREF Output Current ............................... Self-RegulatedOperating Temperature (Notes 5,6)

LTC3723E ........................................... 40C to 85C

Storage Temperature Range ................. 65C to 125CLead Temperature (Soldering, 10sec)................... 300C

TJMAX = 125C, JA = 100C/W

ORDER PART NUMBER GN PART MARKING

Consult LTC Marketing for parts specified with wider operating temperature ranges.

LTC3723EGN-1

Order Options Tape and Reel: Add #TRLead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF

Lead Free Part Marking:http://www.linear.com/leadfree/

37231

1

2

3

45

6

7

8

TOP VIEW

GN PACKAGE16-LEAD PLASTIC SSOP

16

15

14

1312

11

10

9

VREF

SDRB

SDRA

DRVBVCC

DRVA

GND

CT

SPRG

UVLO

SS

FBRLEB

COMP

CS

DPRG

TJMAX = 125C, JA = 100C/W

ORDER PART NUMBER GN PART MARKING

LTC3723EGN-2 37232

1

2

3

45

6

7

8

TOP VIEW

GN PACKAGE16-LEAD PLASTIC SSOP

16

15

14

1312

11

10

9

VREF

SDRB

SDRA

DRVBVCC

DRVA

GND

CT

SPRG

UVLO

SS

FBDPRG

COMP

CS

RAMP

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Input Supply

VCCUV VCC Undervoltage Lockout Measured on VCC 10.25 10.7 V

VCCHY VCC UVLO Hysteresis Measured on VCC 3.8 4.2 V

ICCST Start-Up Current VCC = VUVLO 0.3V 145 230 AICCRN Operating Current No Load on Outputs 3 8 mA

VSHUNT Shunt Regulator Voltage Current into VCC = 10mA 10.3 10.8 V

RSHUNT Shunt Resistance Current into VCC = 10mA to 17mA 1.4 3.5

SUVLO System UVLO Threshold Measured on UVLO Pin, 10mA into VCC 4.8 5.0 5.2 V

SHYST System UVLO Hysteresis Current Current Flows Out of UVLO Pin, 10mA into VCC 8.5 10 11.5 A

Pulse Width Modulator

ROS Ramp Offset Voltage Measured on COMP, RAMP = 0V 0.65 V

IRMP Ramp Discharge Current RAMP = 1V, COMP = 0V, CT = 4V, 3723-1 Only 50 mA
http://www.linear.com/leadfree/http://www.linear.com/leadfree/http://www.linear.com/leadfree/

7/29/2019 372312f[1]

3/20

LTC3723-1/LTC3723-2

3

372312f



ISLP Slope Compensation Current Measured on CS, CT = 1V, 3723-1 Only 30 AC

T= 2.25V 68 A

DCMAX Maximum Duty Cycle COMP = 4.5V 47 48.2 50 %

DCMIN Minimum Duty Cycle COMP = 0V 0 %

DTADJ Dead-Time 130 ns

Oscillator

OSCI Initial Accuracy TA = 25C, CT = 270pF 220 250 280 kHz

OSCT VCC Variation VCC = 6.5V to 9.5V, Overtemperature 3 3 %

OSCV CT Ramp Amplitude Measured on CT 2.35 V

Error Amplifier

VFB FB Input Voltage COMP = 2.5V, (Note 3) 1.172 1.2 1.22 V

FBI FB Input Range Measured on FB, (Note 4) 0.3 2.5 V

AVOL Open-Loop Gain COMP = 1V to 3V, (Note 3) 70 90 dBIIB Input Bias Current COMP = 2.5V, (Note 3) 5 50 nA

VOH Output High Load on COMP = 100A 4.7 4.92 V

VOL Output Low Load on COMP = 100A 0.27 0.5 V

ISOURCE Output Source Current COMP = 2.5V 400 700 A

ISINK Output Sink Current COMP = 2.5V 2 5 mA

Reference

VREF Initial Accuracy TA = 25C, Measured on VREF 4.925 5.00 5.075 V

REFLD Load Regulation Load on VREF = 100A to 5mA 2 15 mV

REFLN Line Regulation VCC = 6.5V to 9.5V 1 10 mV

REFTV Total Variation Line, Load and Temperature 4.900 5.000 5.100 V

REFSC Short-Circuit Current VREF Shorted to GND 18 30 45 mAPush-Pull Outputs

DRVH(x) Output High Voltage IOUT(x) = 100mA 9.0 9.2 V

DRVL(x) Output Low Voltage IOUT(x) = 100mA 0.17 0.6 V

RDH(x) Pull-Up Resistance IOUT(x) = 10mA to 100mA 2.9 4

RDL(x) Pull-Down Resistance IOUT(x) = 10mA to 100mA 1.7 2.5

TDR(x) Rise-Time COUT(x) = 1nF 10 ns

TDF(x) Fall-Time COUT(x) = 1nF 10 ns

Synchronous Outputs

OUTH(x) Output High Voltage IOUT(x) = 30mA 9.0 9.2 V

OUTL(x) Output Low Voltage IOUT(x) = 30mA 0.44 0.6 V

RHI(x) Pull-Up Resistance IOUT(x) = 10mA to -30mA 11 15

RLO(x) Pull-Down Resistance IOUT(x) = 10mA to -30mA 15 20

TR(x) Rise-Time COUT(x) = 50pF 10 ns

TF(x) Fall-Time COUT(x) = 50pF 10 ns

Current Limit and Shutdown

CLPP Pulse by Pulse Current Limit Threshold Measured on CS 280 300 320 mV

CLSD Shutdown Current Limit Threshold Measured on CS 475 600 725 mV

CLDEL Current Limit Delay to Output 100mV Overdrive on CS, (Note 2) 80 ns

7/29/2019 372312f[1]

4/20

LTC3723-1/LTC3723-2

4

372312f

VCC (V)

0

ICC(A)

100

150

8

372312 G01

50

02 4 6 10

200



Start-Up ICC vs VCC VCC vs ISHUNT

Oscillator Frequency vsTemperature

TYPICAL PERFOR A CE CHARACTERISTICSUW

ISHUNT (mA)

0

VCC(V)

10.00

10.25

40

372312 G02

9.75

9.5010 20 30 50

10.50

TEMPERATURE (C)

FREQUENCY(kHz)

240

250

80

372312 G03

230

2204060 20 200 40 60 100

260CT = 270pF

(TA = 25C unless otherwise noted)

Leading Edge Blanking Timevs RLEB VREF vs IREF VREF vs Temperature

RLEB (k)

0

BLANKTIME(ns)

350

300

250

200

150

100

50

0

372312 G04

40 1002010 30 50 70 9060 80

IREF (mA)

0

VREF(V)

5.05

5.00

4.95

4.90

4.85

4.8015 25 40

372312 G05

5 10 20 30 35

TJ = 25C

TJ

= 85C

TJ = 40C

TEMPERATURE (C)

VREF(V)

4.99

5.00

80

372312 G06

4.98

4.974060 20 200 40 60 100

5.01

Note 1: Absolute Maximum Ratings are those values beyond which the lifeof a device may be impaired.

Note 2: Includes leading edge blanking delay, RLEB = 20k, not tested inproduction.

Note 3: FB is driven by a servo loop amplifier to control VCOMP for thesetests.

Note 4: Set FB to 0.3V, 2.5V and insure that COMP does not phase invert.

Note 5: The LTC3723E1/LTC3723E-2 are guaranteed to meet

performance specifications from 0C to 70C. Specifications over the40C to 85C operating temperature range are assured by design,characterization and correlation with statistical process controls.

Note 6: This IC includes overtemperature protection that is intended toprotect the device during momentary overload conditions. Junctiontemperature will exceed 125C when overtemperature protection is active.Continuous operation above the specified maximum operating junctiontemperature may impair device reliability.

SSI Soft-Start Current SS = 2.5V 10 13 16 A

SSR Soft-Start Reset Threshold Measured on SS 0.7 0.4 0.1 V

FLT Fault Reset Threshold Measured on SS 4.5 4.2 3.5 V

7/29/2019 372312f[1]

5/20

LTC3723-1/LTC3723-2

5

372312f

FREQUENCY (Hz)

GAIN(dB)

PHASE(DEG) 180

1M

372312 G07

270

360

10 1k100 10k 100k 10M

100

80

60

40

20

0

TEMPERATURE (C)

55

ICC(A)

190

180

170

160

150

140

130

120

110

100

372312 G08

25 5 35 95 12565

RDPRG (k)

050

DELAY(ns)

100

150

200

75

125

175

225

275

50 100 150 200

372312 G09

250 500450400350300

250

NO 200k PREBIAS

200k PREBIAS

RSPRG (k)

00

DELAY(ns)

400

500

700

600

900

100 150

372312 G12

300

200

100

800

250 30050 200

TEMPERATURE (C)

55

CURRENT(A)

90

80

70

60

50

40

30

20

10

0

372312 G10

25 5 35 95 12565

CT = 1V

CT = 2.25V

TEMPERATURE (C)

55

10.5

10.4

10.3

10.2

10.1

10.0

9.9

9.8

372312 G11

25 5 35 95 12565

SHUNTVOLTAGE(V)

ICC = 10mA

Error Amplifier Gain/Phase Start-Up ICC vs Temperature

TYPICAL PERFOR A CE CHARACTERISTICSUW

LTC3723 Deadtime vs RDPRGWith and Without 200k PrebiasCompensation

(TA = 25C unless otherwise noted)

Synchronous Driver Turn-Off Delayvs RSPRG Referenced to CT PeakSlope Current vs Temperature

VCC Shunt Voltage vsTemperature

FB Input Voltage vs Temperature

TEMPERATURE (C)

55

FBVOLTAGE(V)

1.205

1.204

1.203

1.202

1.201

1.200

1.199

1.198

1.197

372312 G13

25 5 35 95 12565

Synchronous Driver Turn-OffDelay vs RSPRG Referenced toPush-Pull Driver Outputs

RSPRG (k)

0

200

250

350

100

372312 G14

150

100

50 200150 250 300

50

50

0

300

DELAY(ns)

RDPRG = 150k

7/29/2019 372312f[1]

6/20

LTC3723-1/LTC3723-2

6

372312f

VREF (Pin 1/Pin 1): Output of the 5.0V Reference. VREF iscapable of supplying up to 18mA to external circuitry. VREFshould be decoupled to GND with a 0.47F ceramiccapacitor.

SDRB (Pin 2/Pin 2): 50mA Driver for Synchronous Recti-fier associated with DRVB.

SDRA (Pin 3/Pin 3): 50mA Driver for Synchronous Recti-fier associated with DRVA.

DRVB (Pin 4/Pin 4): High Speed 1.5A Sink, 1A SourceTotem Pole MOSFET Driver. Connect to gate of externalpush-pull MOSFET with as short a PCB trace as practicalto preserve drive signal integrity. A low value resistor

connected between DRVA and the MOSFET gate is op-tional and will improve the gate drive signal quality if thePCB trace from the driver to the MOSFET cannot be madeshort.

VCC (Pin 5/Pin 5): Supply Voltage Input to the LTC3723-1/LTC3723-2 and 10.25V Shunt Regulator. The chip isenabled after VCC has risen high enough to allow the VCCshunt regulator to conduct current and the UVLO com-parator threshold is exceeded. Once the VCC shunt regu-lator has turned on, VCC can drop to as low as 6V (typical)and maintain operation. Bypass VCC to GND with a high

quality 1F or larger ceramic capacitor to supply thetransient currents caused by the high speed switching andcapacitive loads presented by the on chip totem poledrivers.

DRVA (Pin 6/Pin 6): High Speed 1.5A Sink, 1A SourceTotem Pole MOSFET Driver. Connect to gate of externalpush-pull MOSFET with as short a PCB trace as practicalto preserve drive signal integrity. A low value resistorconnected between DRVA and the MOSFET gate is op-tional and will improve the gate drive signal quality if the

PCB trace from the driver to the MOSFET cannot be madeshort.

GND (Pin 7/Pin 7): All circuits in the LTC3723 are refer-enced to GND. Use of a ground plane is highly recom-

DESCRIPTIO SU

PIU

(LTC3723-1/LTC3723-2)

mended. VIN and VREF bypass capacitors must be termi-nated with a star configuration as close to GND as practicalfor best performance.

CT (Pin 8/Pin 8): Timing Capacitor for the Oscillator. Usea 5% or better low ESR ceramic capacitor for bestresults. CT ramp amplitude is 2.35V peak-to-peak(typical).

DPRG (Pin 9/Pin 12): Programming Input for Push-PullDead-Time. Connect a resistor between DPRG and VREFto program the dead-time. The nominal voltage on DPRGis 2V.

RAMP (N/A/Pin 9): Input to PWM Comparator for

LTC3723-2 Only (Voltage Mode Controller). The voltageon RAMP is internally level shifted by 650mV.

CS (Pin 10/Pin 10): Input to Pulse-by-Pulse and OverloadCurrent Limit Comparators, Output of Slope Compensa-tion Circuitry. The pulse-by-pulse comparator has a nomi-nal 300mV threshold, while the overload comparator hasa nominal 600mV threshold. An internal switch dischargesCS to GND after every timing period. Slope compensationcurrent flows out of CS during the PWM period.An external resistor connected from CS to the externalcurrent sense resistor programs the amount of slope

compensation.

COMP (Pin 11/Pin 11): Error Amplifier Output, InvertingInput to Phase Modulator.

RLEB (Pin 12/N/A): Timing Resistor for Leading EdgeBlanking. Use a 10k to 100k resistor connected betweenRLEB and GND to program from 40ns to 310ns of leadingedge blanking of the current sense signal on CS for theLTC3723-1. A 1% tolerance resistor is recommended.The LTC3723-2 has a fixed blanking time of approximately80ns. The nominal voltage on RLEB is 2V. If leading edge

blanking is not required, tie RLEB to VREF to disable.

FB (Pin 13/Pin 13): Error Amplifier Inverting Input. This isthe voltage feedback input for the LTC3723. The nominalregulation voltage at FB is 1.2V.

7/29/2019 372312f[1]

7/20

LTC3723-1/LTC3723-2

7

372312f

PROGRAMMABLEDEAD-TIME

PROGRAMMABLESYNCHRONOUS

TURN-OFF DELAYDRVA

DRVB

SDRA

SDRB

372312 TD01

CURRENTSENSE

OR CT RAMP

PWMCOMPARATOR

()

TI I G DIAGRAWU W

DESCRIPTIO SU

PIU

(LTC3723-1/LTC3723-2)

SS (Pin 14/Pin 14): Soft-Start/Restart Delay CircuitryTiming Capacitor. A capacitor from SS to GND provides acontrolled ramp of the current command (LTC3723-1) or

duty cycle (LTC3723-2). During overload conditions, SS isdischarged to ground initiating a soft-start cycle. SScharging current is approximately 13A. SS will charge upto approximately 5V in normal operation. During a con-stant overload current fault, SS will oscillate at a lowfrequency between approximately 0.5V and 4V.

UVLO (Pin 15/Pin 15): Input to Program System Turn-Onand Turn-Off Voltages. The nominal threshold of the UVLOcomparator is 5.0V. UVLO is connected to the main DCsystem feed through a resistor divider. When the UVLO

threshold is exceeded, the LTC3723-1/LTC3723-2 com-mences a soft-start cycle and a 10A (nominal) current isfed out of UVLO to program the desired amount of systemhysteresis. The hysteresis level can be adjusted by chang-ing the resistance of the divider. UVLO can also be used toterminate all switching by pulling UVLO down to less than4V. An open drain or collector switch can perform thisfunction without changing the system turn on or turn offvoltages.

SPRG (Pin 16/Pin 16): A resistor is connected betweenSPRG and GND to set the turn off delay for the synchro-nous rectifier driver outputs. The nominal voltage onSPRG is 2V.

7/29/2019 372312f[1]

8/20

LTC3723-1/LTC3723-2

8

372312f

BLOCK DIAGRA SW

R Q

S

Q

T 1.5A SINK

1A SOURCE

DRVA

Q

RQ

S

6

DRVB4

1.5A SINK

1A SOURCE

SDRB2

SDRA3SYNC

RECTIFIERDRIVELOGIC

FAULTLOGIC

OSCILLATOR

SLOPECOMPENSATOR

PULSE-BY-PULSECURRENT LIMIT

300mV 372312 BD01

SPRG

16

CT

8

DPRG

9

+

PULSE WIDTHMODULATOR

ERRORAMPLIFIER

+

SHUTDOWNCURRENTLIMIT

VREF

13A

50k

14.9k

600mV

+

+

BLANK

RLEB 12 7

CS 10

SS 14

COMP

1.2V

11

FB 13

+

SYSTEMUVLO

VCC

VCCGOOD

10A

5V

+

+

650mV

UVLO

15

REF, LDO1.2V

5V

REF GOOD

VREF

1

VCC UVLO

10.25V ON6V OFF

VCC

5

GND

LTC3723-1 Block Diagram

7/29/2019 372312f[1]

9/20

LTC3723-1/LTC3723-2

9

372312f

R Q

S

Q

T 1.5A SINK

1A SOURCE

DRVA

Q

RQ

S

6

DRVB4

1.5A SINK

1A SOURCE

SDRB2

SDRA3SYNC

RECTIFIERDRIVELOGIC

OUTPUTDRIVELOGIC

FAULTLOGIC

OSCILLATOR

PULSE-BY-PULSECURRENT LIMIT

300mV 372312 BD02

SPRG

16

DPRG

9

CT

8

+

PULSE WIDTHMODULATOR

ERRORAMPLIFIER

+

SHUTDOWNCURRENTLIMIT

VREF

13A

50k

600mV

+

BLANK

7

CS 10

SS 14

COMP

1.2V

11

FB 13

+

SYSTEMUVLO

VCC

VCCGOOD

10A

5V

+

+

650mV

UVLO

15

REF, LDO1.2V

5V

REF GOOD

VREF

1

VCC UVLO

10.25V ON6V OFF

VCC

5

GND

RAMP 9

+

BLOCK DIAGRA SW

LTC3723-2 Block Diagram

7/29/2019 372312f[1]

10/20

LTC3723-1/LTC3723-2

10

372312f

+TURN-ONOUTPUT

2.5V

+

V 2V

10A

VREF

DPRGRDPRG

372312 F01

200kOPTIONAL

Please refer to the detailed Block Diagrams for this discus-sion. The LTC3723-1 and LTC3723-2 are synchronousPWM push-pull controllers. The LTC3723-1 operates with

peak pulse-by-pulse current mode control while theLTC3723-2 offers voltage mode control operation. Theyare best suited for moderate to high power isolated powersystems where small size and high efficiency are required.The push-pull topology delivers excellent transformerutilization and requires only two low side power MOSFETswitches. Both controllers generate 180 out of phase0% to

7/29/2019 372312f[1]

11/20

LTC3723-1/LTC3723-2

11

372312f

very low (145A typ) start-up current that allows the useof 1/8W to 1/4W trickle charge start-up resistors.

The trickle charge resistor should be selected as follows:RSTART(MAX) = VIN(MIN) 10.7V/250A

Adding a small safety margin and choosing standardvalues yields:

APPLICATION VIN RANGE RSTART

DC/DC 36V to 72V 100k

Off-Line 85V to 270VRMS 430k

PFC Preregulator 390VDC 1.4M

VCC should be bypassed with a 0.1F to 1F multilayer

ceramic capacitor to decouple the fast transient currentsdemanded by the output drivers and a bulk tantalum orelectrolytic capacitor to hold up the VCC supply before thebootstrap winding, or an auxiliary regulator circuit takesover.

CHOLDUP = (ICC + IDRIVE) tDELAY/3.8V(minimum UVLO hysteresis)

Regulated bias supplies as low as 7V can be utilized toprovide bias to the LTC3723-1/LTC3723-2. Refer toFigure 2 for various bias supply configurations.

Figure 2. Bias Configurations

372312 F02

12V 10%

1.5k

VCC

VIN

VCC

CHOLD

1N52263V

1F 1F

VBIAS < VUVLO

RSTART1N914

+

Figure 3. System UVLO Setup

ON OFF RBOTTOM

RTOP

UVLO

372312 F03

OPERATIOU

UVLO. The amount of DC feed hysteresis provided by thiscurrent is: 10A RTOP, (Figure 3). The system UVLOthreshold is: 5V {(R

TOP+ R

BOTTOM)/R

BOTTOM}. If the

voltage applied to UVLO is present and greater than 5Vprior to the VCC UVLO circuitry activation, then the internalUVLO logic will prevent output switching until the follow-ing three conditions are met: (1) VCC UVLO is enabled, (2)VREF is in regulation and (3) UVLO pin is greater than 5V.

UVLO can also be used to enable and disable the powerconverter. An open drain transistor connected to UVLO asshown in Figure 3 provides this capability.

Programming Undervoltage Lockout

The LTC3723-1/LTC3723-2 provides undervoltage lock-

out (UVLO) control for the input DC voltage feed to thepower converter in addition to the VCC UVLO functiondescribed in the preceding section. Input DC feed UVLO isprovided with the UVLO pin. A comparator on UVLOcompares a divided down input DC feed voltage to the 5Vprecision reference. When the 5V level is exceeded onUVLO, the SS pin is released and output switching com-mences. At the same time a 10A current is enabled whichflows out of UVLO into the voltage divider connected to

Off-Line Bias Supply Generation

If a regulated bias supply is not available to provide VCCvoltage to the LTC3723-1/LTC3723-2 and supportingcircuitry, one must be generated. Since the power require-ment is small, approximately 1W, and the regulation is notcritical, a simple open-loop method is usually the easiestand lowest cost approach. One method that works well isto add a winding to the main power transformer, and postregulate the resultant square wave with an L-C filter (seeFigure 4a). The advantage of this approach is that itmaintains decent regulation as the supply voltage varies,and it does not require full safety isolation from the inputwinding of the transformer. Some manufacturers includea primary winding for this purpose in their standard

Figure 4a. Auxiliary Winding Bias Supply

372312 F04a

+

VCCVIN

CHOLD 1F

RSTART

2k

15V*

*OPTIONAL

7/29/2019 372312f[1]

12/20

LTC3723-1/LTC3723-2

12

372312f

OPERATIOU

product offerings as well. A different approach is to add awinding to the output inductor and peak detect and filterthe square wave signal (see Figure 4b). The polarity of thiswinding is designed so that the positive voltage squarewave is produced while the output inductor is freewheel-ing. An advantage of this technique over the previous isthat it does not require a separate filter inductor and sincethe voltage is derived from the well-regulated outputvoltage, it is also well controlled. One disadvantage is thatthis winding will require the same safety isolation that isrequired for the main transformer. Another disadvantageis that a much larger VCC filter capacitor is needed, sinceit does not generate a voltage as the output is first startingup, or during short-circuit conditions.

Figure 4b. Output Inductor Bias Supply

372312 F04bVCC

VOUT

VIN

CHOLD

RSTART +

1F

LOUT

ISO BARRIER

Programming the LTC3723-1/LTC3723-2 Oscillator

The high accuracy LTC3723-1/LTC3723-2 oscillator cir-cuit provides flexibility to program the switching fre-quency and slope compensation required for currentmode control (LTC3723-1). The oscillator circuit pro-duces a 2.35V peak-to-peak amplitude ramp waveform onCT. Typical maximum duty cycles of 49% are possible. Theoscillator is capable of operation up to 1MHz by thefollowing equation:

CT = 1/(14.8k FOSC)Note that this is the frequency seen on CT. The outputdrivers switch at 1/2 of this frequency. Also note thathigher switching frequency and added driver dead-timevia DPRG will reduce the maximum duty cycle.

The LTC3723-1/LTC3723-2 can be synchronized to anexternal frequency source such as another PWM chip. In

Single-Ended Operation

In addition to push-pull and full-bridge topologies, single-ended topologies such as the forward and flyback con-verter can benefit from the many advanced features of theLTC3723. In Figure 6, the LTC3723 is used with theLTC4440, 100V high side driver to implement a two-transistor forward converter. DRVB is used which limitsthe converters maximum duty cycle to 50% (less pro-grammable driver dead time).

LTC3723

CTfOSC < fEXT < 1.25 fOSC

fSW = fOSC/2 fOSC

68pF

CT

372312 F05

390 BAT54210A

2.56V CT

EXTERNALFREQUENCY

SOURCE

Figure 5. Synchronization from External Source

Figure 6. Two-Transistor Forward Converter (Duty Cycle < 50%)

210A

2 2.56V CT

LTC3723

DRVB

CT GND

CT

IN

TO SYNCHRONOUSSECONDARY MOSFET

TS

LTC4440

372312 F06

GND

TG

SDRB

VIN

fSW

VIN

Figure 5, the leading edge of an external pulse is used toterminate the natural clock cycle. If the external frequencyis higher than the oscillator frequency, the internal oscil-

lator will synchronize with the external input frequency.

7/29/2019 372312f[1]

13/20

LTC3723-1/LTC3723-2

13

372312f

The 50% duty-cycle limit is overcome with the circuitshown in Figure 7. Operation is similar to external syn-chronization, except DRVA output is used to terminate its

own clock cycle early. Switching period is now equal to theoscillator period plus programmable driver dead time.Maximum on time is equal to oscillator period minusdriver dead time.

Although near 100% duty cycle operation may be ofbenefit with non-isolated converters, it is often desirableto limit the duty cycle of single-ended isolated converters.Instead of immediately ending the unused clocks output,Figure 8 uses a transistor to switch in additional timingcapacitor charge current. This allows one to preset the

maximum duty.

Voltage Mode with LTC3723-2

Figure 9 shows how basic connections differ between

current mode LTC3723-1 and voltage mode LTC3723-2.Oscillator may be used as the ramp input or the LTC3723-2 includes an internal 10mA ramp discharge useful whenimplementing voltage feedforward. Open loop control inwhich the duty cycle varies inversely proportional to inputvoltage is shown in Figure 10.

OPERATIOU

LTC3723-1

DRVA

CT

68pF

CT

372312 F07

DRVB

390 BAT54

fV C

ATDPRG

D fV C

ATDPRG

SWT

MAX SWT

+

1

2 56

210

2 56

210

.

.

Figure 7. LTC3723-1 > 50% Duty Cycle

LTC3723-1

DRVB

CT

CT

TO SYNCHRONOUSSECONDARY MOSFET

372312 F08

SDRBDRVA

VREF

VIN

VIN

50k

RMMBT2369

fV C

A A R

D fV C

ATDPRG

SW

T

MAX SWT

+

+ ( )

1

2 561

210

1

210 3

2 56

210

. /

.

Figure 8. LTC3723-1 One-Switch Forward or Flyback Converter(Maximum Duty Cycle 50% to 100%)

Figure 9. LTC3723-1 Current Mode and LTC3723-2 VoltageMode Connections

Figure 10. LTC3723-2 Open Loop Control (Duty Cycle isInversely Proportional to Input Voltage)

98 11

13

372312 F10

CT

TO INPUTVOLTAGE

LTC3723-2

RAMPCTFBCOMP

RDPRG

98 121

372312 F09

CT

TO INPUTVOLTAGE

LTC3723-2

RAMPCT DPRGVREF

RDPRG

128 19

CT RLEB

LTC3723-1

RLEBCT VREFDPRG

RDPRG

89 121

CT

LTC3723-2

CTRAMP DPRGVREF

7/29/2019 372312f[1]

14/20

LTC3723-1/LTC3723-2

14

372312f

OPERATIOU

The LTC3723-1 derives a compensating slope currentfrom the oscillator ramp waveform and sources thiscurrent out of CS. This function is disabled in theLTC3723-2. The desired level of slope compensation isselected with an external resistor connected between CSand the external current sense resistor, (Figure 11).

Current Sensing and Overcurrent Protection

Current sensing provides feedback for the current modecontrol loop and protection from overload conditions. TheLTC3723-1/LTC3723-2 are compatible with either resis-tive sensing or current transformer methods. Internallyconnected to the LTC3723-1/LTC3723-2 CS pin are two

comparators that provide pulse-by-pulse and overcurrentshutdown functions respectively, (Figure 12).

The pulse-by-pulse comparator has a 300mV nominalthreshold. If the 300mV threshold is exceeded, the PWMcycle is terminated. The overcurrent comparator is setapproximately 2x higher than the pulse-by-pulse level. Ifthe current signal exceeds this level, the PWM cycle isterminated, the soft-start capacitor is quickly dischargedand a soft-start cycle is initiated. If the overcurrent condi-tion persists, the LTC3723-1/LTC3723-2 halts PWM op-eration and waits for the soft-start capacitor to charge upto approximately 4V before a retry is allowed. The soft-start capacitor is charged by an internal 13A currentsource. If the fault condition has not cleared when soft-start reaches 4V, the soft-start pin is again discharged anda new cycle is initiated. This is referred to as hiccup modeoperation. In normal operation and under most abnormalconditions, the pulse-by-pulse comparator is fast enoughto prevent hiccup mode operation. In severe cases, how-ever, with high input voltage, very low RDS(ON) MOSFETsand a shorted output, or with saturating magnetics, theovercurrent comparator provides a means of protectingthe power converter.

Leading Edge Blanking

The LTC3723-1/LTC3723-2 provides programmable lead-

ing edge blanking to prevent nuisance tripping of thecurrent sense circuitry. Leading edge blanking relieves thefiltering requirements for the CS pin, greatly improving theresponse to real overcurrent conditions. It also allows theuse of a ground referenced current sense resistor ortransformer(s), further simplifying the design. With asingle 10k to 100k resistor from RLEB to GND, blankingtimes of approximately 40ns to 320ns are programmed. Ifnot required, connecting RLEB to VREF can disable leadingedge blanking. Keep in mind that the use of leading edgeblanking will slightly reduce the linear control range for the

pulse width modulator.Figure 12. Current Sense/Fault Circuitry Detail

+

+

OVERLOADCURRENT LIMIT

300mV

600mV

UVLOENABLE

UVLOENABLE

R

S Q

R

S Q

Q

QS

QPWMLOGIC

H = SHUTDOWNOUTPUTS

CS

RCS

+

+

CSS

SS

0.4V

4.1V

372312 F12

PULSE BY PULSECURRENT LIMIT

PWMLATCH

PWM

13A

Figure 11. Slope Compensation Circuitry

SWITCHCURRENT

CURRENT SENSEWAVEFORM

V(CT)

33kI =

CSCT

33kADDEDSLOPE

RSLOPE

RCS

372312 F11

LTC3723

7/29/2019 372312f[1]

15/20

LTC3723-1/LTC3723-2

15

372312f

OPERATIOU

High Current Drivers

The LTC3723-1/LTC3723-2 high current, high speed driv-

ers provide direct drive of external power N-channelMOSFET switches. The drivers swing from rail to rail. Dueto the high pulsed current nature of these drivers (1.5Asink, 1A source), care must be taken with the board layoutto obtain advertised performance. Bypass VCC with a 1Fminimum, low ESR, ESL ceramic capacitor. Connect thiscapacitor with minimal length PCB leads to both VCC andGND. A ground plane is highly recommended. The driveroutput pins (DRVA, DRVB) connect to the gates of theexternal MOSFET switches. The PCB traces making theseconnections should also be as short as possible to mini-

mize overshoot and undershoot of the drive signal.

Synchronous Rectification

The LTC3723-1/LTC3723-2 produces the precise timingsignals necessary to control secondary side synchronousrectifier MOSFETs on SDRA and SDRB. Synchronousrectifiers are used in place of Schottky or silicon diodes onthe secondary side to improve converter efficiency. AsMOSFET RDS(ON) levels continue to drop, significant effi-ciency improvements can be realized with synchronousrectification, provided that the MOSFET switch timing is

optimized. Synchronous rectification also provides bipo-lar output current capability, that is, the ability to sink aswell as source current.

Programming the Synchronous RectifierTurn-Off Delay

The LTC3723-1/LTC3723-2 controllers include a featureto program the turn-off edge of the secondary side syn-chronous rectifier MOSFETs relative to the beginning of a

new primary side power delivery pulse. This feature pro-vides optimized timing for the synchronous MOSFETswhich improves efficiency. At higher load currents itbecomes more advantageous to delay the turn-off of thesynchronous rectifiers until the beginning of the newpower pulse. This allows for secondary freewheelingcurrent to flow through the synchronous MOSFET channelinstead of its body diode.

The turn-off delay is programmed with a resistor fromSPRG to GND, (Figure 13). The nominal regulated voltageon SPRG is 2V. The external resistor programs a currentwhich flows out of SPRG. The delay can be adjusted fromapproximately 20ns to 200ns, with resistor values of 10k

to 200k. Do not leave SPRG floating. The amount of delaycan also be modulated based on an external currentsource that sinks current out of SPRG. Care must be takento limit the current out of SPRG to 350A or less.

+TURN-OFFSYNC OUT

372312 F13

+

V 2V

SPRG

RSPRG

Figure 13. Synchronous Delay Circuitry

7/29/2019 372312f[1]

16/20

LTC3723-1/LTC3723-2

16

372312f

L60.65

H

1F

VO

UT

VE

VF

V

OUT

V

OUT

8.5V

100

C43.3

F

50V

390pF

1F

100

2k

1/4W

Q1

D6

9.1V

C1,C2,C3

470

F

6.3V

3

Si7892DP 3

Si7892DP

3

1 8

4

9

11

VF

VF

5

372312

TA02

VO

UT

V

OUT

D1

470

1W

D2

100k

1k

T2

1(1.5mH):0.5

T1

9T(150

H):9T:7T:1T:1T

0.1

F

330pF

C6

2.2nF

250V

+

C568

F

20V

+

12

11871

09

2 4 5 631

22

360

L41mH

D4

D5

V

OUT

VO

UT 3

30

47

0.68

F

D7

1F,100VTDKC322

5X7R2A105M

C1-C3:SANYO6TPB

470M

C4:TDKC3225X7R1

H335M

C5:AVXTPSE686M0

20R0150

C6:MURATADE2E3KH222MB3B

D1,D2:DIODESINC.ES1A

D4,D5:BAS21

D6:MMBD5239B

D7:BAT54

L4:COILCRAFTDO1608C-105

L5:VISHAYIHLP-2525CZ-01

L6:PULSEPA1294.6

50

Q1:FZT690B

Q2:FMMT3904

R1,R2:IRCLRC-LR2512-01-R060-G

T1:EFD25TRANSPO

WERTTI8696

T2:PULSEPA0785

Q2

Si7450DP

S

i7450DP

801W1

00

pF

200

V

80

1W1

00pF

200V

470

R10.06

1.5W

R20.06

1.5W

L51

H

1F

100V

3

1F

100V

VIN

VIN

V

IN

3

4

2

6

10

6

5

1

8

1

9

14

13

7

12

16

8

3 11

515

6

5

1 2

VO

UT

10V

8.5V

787

100

220pF

4.99k

1/4W

270

2.49k

0.022

F

47nF

V

OUT

GND-F

V+ G

ND-S

COLL

REF

LT1431CS8

SYNC

PV

CC

CSF

+

LTC3901EGN

MOC207

LTC3723EGN-1

VR

EF

DPRG

SS

FB

GN

D

RL

EB

SPRG

CT

DRVB

SDRB

SDRA

COMP

VC

C

UVLOD

RVA

CS

820

150k

30k

5V

33k

10k

0.47

F

68nF

220pF

1F

100

1/4W

10V

66.5k

VIN

5V

383k

75k

124

.99k

CSF

14

8

4

10

13

MF

15

MF

6V

E4.99k

1/4W

CSE

+

54.99k

40.2k

CSE

GND

PGND

GND

PGND

7

TIMER

2

ME

3

16

1

ME

VC

C

1F

165W,36Vto72Vto3

.3Vat50AIsolatedPush-PullConverter

TYPICAL APPLICATIO SU

7/29/2019 372312f[1]

17/20

LTC3723-1/LTC3723-2

17

372312f


5

4

6A

A

10V

VIN

15

9 174k

1

0.47

F

1F

VR

EF

CT

220pF

10nF

T2

T1

EFD20

1.13k

21.5k

1.5k

8

13

Si7456DP

L41mH

68

F

20V

10

81

8

54

16

10k

33k

100

1/4W

66.5k

12

7

14

560

383k

30k

SYNC

TIMER

LTC3900ES8

6

7

1nF

0.47

F

372312

TA03

VO

UT

+

D14.3V

VO

UT

FG

GND

VC

C

5

909

26.1k

C

S+

C

S+

CS

+

FG

FG

CG

VO

UT

VO

UT

CS

1

2

CG3

4

Si7456DP

L1

4.7

H

5

2 3

10V

BAS21

BAS21

1 4

6

+

Si7450DP

1F

100V

2

VIN

VIN

V

IN

1.5nF

200V

1F

100V

47

F

16V

2

+

1.5nF

1

0F

2

5V

10k

0.1

F

0.1

F

220pF

6

2

2.2nF

250V

220pF

11

5

1 2

5 6

MOC207

1 2

4

VIN G

ND

3OC

COMP

OPTO

FB

LT4430ES61

.00k

0.03

1W

158K

1.78K

120pF

L2

15

H

30

85

EFFICIENCY(%)87

89

91

93

95

40

50

60

OUTPUTPOWER(W)

70

80

48V

IN

24

1/4W

12

1/2W

Si7456DP

V

OUT

Si7456DP

7 8

47

F

16V

2

+

220pF

220pF

L3

33

H

24

1/4W

12

1/4W

VR

EF

CG

CT

2.7k

2.7k

MMBD914

MMBD914

8.66k

MMBT2369

50k

1F,100VTDKC3225X7R

2A105M(1210)

10

F,25VTDKC4532X5R

1E106M

47

F,16VSANYO16TQC47M

D1:MMBZ5229B

L1:COILCRAFTDO1813P-561HC

L2:TDKSLF12575T-150M

4R7

L3:TDKSLF10145T-330M

1R6


T1:PULSEPA1040

T2:PULSEPA0785(1:0.5

T)

LTC3723EGN-1

DRVB

CS

COMP

SDRB

VC

C

UVLOD

RVA

DPRG

VR

EF

SPRG

GND

SS

FB

CT

RLEB

750

22nF

VR

EF

VR

EF

680pF

22nF

15nF

470pF

4.7nF

1k

LTC3723-136V

IN

to72V

IN

to12V/5Aand12V/1.6AForwardConverter

7/29/2019 372312f[1]

18/20

LTC3723-1/LTC3723-2

18

372312f


5

4

6A

B

12V

VIN

15

LTC3723EGN-1

DRVB

SDRB

SDRA

COMP

CS

VC

C

UVLO

9 150k

1

0.47

F

1F

DRVA

DPRG

VR

EF

SPRG

GND

SS

FB

CT

330pF

22nF

100k

D810V

68nF

270pF

T2

1(1.5mH):0.5

T1

4T:6T(65

HMIN):6T:2T:2T

243k

2.49k

9.53k

10k

750

1k

100

1/4W

8

13

3

Si7370DP

2

L41mH

C3

68

F

20V

VF

D2

3

2

81

9

54

16

10k

33k

200

1/4W

R10.03

1.5W

66.5k

RLEB 1

2

7

14

220pF

22nF

100

665

1k

866

6.19k

1/4W

1.5nF

464k3

0k

1/4W

SYNC

PV

CC

CSF

+

VF

LTC3901EGN

CSF

8

11

12

1

4

10

13

7

22nF

1F

4

.7F

372312

TA04

V

OUT

VO

UT

V

OUT

D710V

VO

UT

M

FMF2

GND

PGND

GND2PGND2

TIMER

VC

C

470pF

14

15

1k

866

42.2k

1k

100

6.19k

1/4W

CSE

+

VE

V

OUT

VO

UT

VF

VO

UT

12V/20

A

V

OUT

CSE

6

5

MEME2

2

3

16

Si7370DP

2

Si7852DP

Si7852DP

L5

0.56

H

11

2 4

1

2V

D5

D6

3 5 1 6

9 7

VE

+

0.1

F

Si7852DP

1

6 5

4

B

2

A

D3

LTC4440ES6

BOOST

INP

TG

TS

GNDV

CC

12V

3

0.1

F

Si7852DP

1

6 5

4

2

B

D4

LTC4440ES6

BOOS

T

INP

T

G

TS

GNDV

CC

12V

1F

100V

3

VIN

VI

N

V

IN

42VTO56V

1F

100V

C1,C2

47

F

16V

2

+

1F

1F

100V

1k

1/4W

1F,100VTDKC322

5X7R2A105M

C1,C2:SANYO16TQC47M

C3:AVXTPSE686M0

20R0150

C4:MURATAGHM30

45X7R222K-GC

D2:DIODESINC.ES1

B

D3-D6:BAS21

D7,D8:MMBZ5240B


L5:COILCRAFTDO1813P-561HC

L6:PULSEPA1294.1

32OR

PANASONICETQP1H

1R0BFA

R1,R2:IRCLRC2512-R03G

T1:PULSEPA0805.0

04

T2:PULSEPA0785

6

10I

SNS

I SNS

0.1

F

11

5

1 2

1

MOC207

C4

2.2nF

250V

0.1

F

3

6

5

8

GN

D-F

V+

GND-S

COLL

REF

L

T1431CS8

A

1.5k

22

4.7

4.7

R20.03

1.5W

VE

470pF

100V

L6

1.25

H

10

1W

6

93

EFFICIENCY(%)94

95

96

97

8

10

12

LOADCURRENT(A)

14

16

18

20

42V

IN

48V

IN

56V

IN

MM

BT3904

LTC3723-1240W

42V

IN

to56

VIN

to12V/20AIsolated1/4Brick(2.3"

1.45")

7/29/2019 372312f[1]

19/20

LTC3723-1/LTC3723-2

19

372312f

PACKAGE DESCRIPTIOU

GN Package16-Lead Plastic SSOP (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1641)

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

GN16 (SSOP) 0204

1 2 3 4 5 6 7 8

.229 .244

(5.817 6.198)

.150 .157**

(3.810 3.988)

16 15 14 13

.189 .196*(4.801 4.978)

12 11 10 9

.016 .050

(0.406 1.270)

.015 .004

(0.38 0.10) 45

0 8

TYP.007 .0098

(0.178 0.249)

.0532 .0688

(1.35 1.75)

.008 .012

(0.203 0.305)TYP

.004 .0098

(0.102 0.249)

.0250

(0.635)BSC

.009

(0.229)REF

.254 MIN

RECOMMENDED SOLDER PAD LAYOUT

.150 .165

.0250 BSC.0165 .0015

.045 .005

*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASHSHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEADFLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

INCHES(MILLIMETERS)

NOTE:1. CONTROLLING DIMENSION: INCHES

2. DIMENSIONS ARE IN

3. DRAWING NOT TO SCALE

5

46

A B

12VVIN

15

LTC3723EGN-1

DRVB SDRB SDRA

COMP

CSVCC

UVLO

9150k

1

0.47F

1F

DRVA

DPRG VREFSPRGGND SSFB CT

330pF

68nF270pF

T2

T129.46mm 25.4mm 10.2mm PLANAR

24.9k

813

3

HAT21692

L31mH

68F20V

VF

32

8

1 9

5

4

16

10k

33k

1001/4W

R10.015

1.5W

66.5k

RLEB

127 14

220pF

100

2.67k 2.67k

1.27k

4.53k

100pF

464k

30k1/4W

SYNC PVCC

CSF+

VF

LTC3901EGN

CSF

8

11 12

1

4 10 13 71F

4.7F

372312 TA05

VOUT

D110V

+VOUT

MF MF2

GND PGND GND2 PGND2 T IMER

VCC

470pF

14 15

1.27k

33.2k

1k

4.53k

CSE+

VEVOUT

+VOUT

+VOUT

VOUT

VF

+VOUT

VOUT

CSE6 5

ME ME2

2 3 16

HAT21692

L10.56H

112

4

12V BAS21

ES1B

ES1B

BAS21

3

5

1

6

9

7

VE

+

0.1FSi7370DP

1

6

5

4

B

2

A

BAS21

LTC4440ES6

BOOSTINP

TG

TSGND

VCC

12V

3

0.1FSi7370DP

Si7370DP Si7370DP

1

6

5

42

B

BAS21

LTC4440ES6

BOOSTINP

TG

TSGND

VCC

12V1F100V3

VIN

VIN

VIN

1F100V

22F25V3

1F, 100V TDK C3225X7R2A105M4.7F, 25V TDK C4532X7R1E475M22F, 25V TDK C4532X7R1E226MD1: MMBZ5240B

D2: MMBZ5242BL1: COILCRAFT DO1813P-561HCL2: PULSE PA0513.441L3: COILCRAFT DO1608C-105T1: PULSE PA0901.004 (4:4:4:4CT)T2: PULSE PA0785 (1:0.5T)

10

ISNS

ISNS

0.1F

4.7F25V2x

11

A

100

22

4.74.7

2.2nF250V

VE

1nF

100V 0.33F100V

L20.44H

101W

57

8

9OUTP

UTVOLTAGE(V)

10

11

12

13

10 15

LOAD CURRENT (A)

2520

42VIN

48VIN

53VIN

MMBT3904

D212V

MMBT3904

1.2k0.5W

591

92

93EFFICIENCY(%)

94

95

96

97

10 15

LOAD CURRENT (A)

2520

42VIN

48VIN

53VIN

5.11/4W


LTC3723-1 300W 42VIN to 56VIN to 12V/25A Isolated Bus Converter

7/29/2019 372312f[1]

20/20

LTC3723-1/LTC3723-2

372312f

RELATED PARTS

PART NUMBER DESCRIPTION COMMENTS

LT1952 Single Switch Synchronous Forward Controller High Efficiency, Adjustable Volt-Second Clamp, True PWM Soft-Start

LTC3705/LTC3706/ Isolated Power Supply DC/DC Converter Chipset Simple as Buck Circuit, No Opto-Coupler, Fast Transient Response,

LTC3725/LTC3726/ PolyPhase

Operation Capability, Scalable for Higher PowerLTC3722-1/LTC3722-2 Dual Mode Phase Modulated Full-Bridge Controllers ZVS Full-Bridge Controllers

LT3804 Secondary-Side Dual Output Controller with Opto Driver Regulates Two Secondary Outputs; Optocoupler Feedback Driver and

Second Output Synchronous Driver Controller

LTC3901 Secondary-Side Synchronous Driver for Push-Pull and Drives N-Channel Synchronous MOSFETs, Programmable Timeout,

Full Bridge Converters Reverse Current Limit

LT4430 Secondary-Side Optocoupler Driver Overshoot Control on Start-Up and Short-Circuit Recovery,

600mV Reference, ThinSOT Package

LTC4440 High Speed High Voltage High Side Gate Driver 80V Operation, 100V Tolerant, 1.5 Pull-Down, 2.4A Pull-Up

PolyPhase is a registered trademark of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation.

TYPICAL APPLICATIOU

LTC3723-1 100W, 36VIN to 72VIN to 3.3V/30A Isolated Forward Converter

1

VB

5

46

A

A

10VVIN

15LTC3723EGN-1

DRVB CS

COMP

SDRB

VCC

UVLO

9150k

1

0.47F

1F

DRVA

DPRG VREF

VREF

SPRGGND SS FBCT

CT

220pF68nF

T2

T123.4mm 20.1mm 9.4mm PLANAR

6.04k

27.4k

8 13

L31mH

68F20V

10 8

1 8

5

4

16

10k

33k

1501/4W

66.5k

RLEB

820

127 14

560

100pF

383k

30k

SYNC TIMERLTC3900ES8

6

7

1nF 0.47F25V

372312 TA06

VOUT

VOUT

VIN

VOUT

FG

GND

VCC

5

562

845

26.1kCS+

VB

VX

VX

VOUT

CS1 2

CG

3 4

L10.33H

10V BAS21

BAS21

3

5

2

4

1

6

+

Si7450DP

1F100V2

VIN

VIN

VIN

2.2nF630V

1F100V

6

2

220pF

2.2nF250V

11

5

1

26

MOC207

2

4

GND

3

OCOPTOFBLT4430ES6

VIN

1.00k151/4W

0.031W

120K

820

120pF

4.7nF

5

86

EFFICIENCY(%)

87

89

91

88

90

92

93

94

10 15 20LOAD CURRENT (A) 25 30

48VIN

Si7336ADP2

VOUT

VOUT

VOUT

Si7336ADP2

7

8

470F6.3V

+

L20.85H

VREFVREF

VREF

CT

10

11

B0540W

B0540W

8.66k

MMBT236950k

1F, 100V TDK C3225X7R2A105M (1210)100F, 6.3V TDK C3225X5R0J107M (1210)2.2nF, 630V TDK C3216JB2J222K470F, 6.3V SANYO 6TPD470MD1: MMBZ5240BL1: COILCRAFT DO1813P-331HCL2: PULSE PA1292.910L3: COILCRAFT DO1608C-105T1: PULSE PA810.007 (7:6:6:1:1:1T)T2: PULSE PA0184 (1:1T)

D110V

5

COMP

3304.7nF

47nF

470pF

1k

10nF

330

2.2nF

100F6.3V2

5.11/2W2.2nF

5.11/2W

Date post:	03-Apr-2018
Category:	Documents
Upload:	faithfullyfatih
View:	214 times
Download:	0 times

372312f[1]

Documents