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Journal of Electronics and Communication Engineering & Technology (JECET)ISSN 2347–4181 (Print), ISSN 2347 – 419X(Online), Volume 1, Issue 1, July-December(2013) 1 FULL-DUPLEX UART APPROACH OVER POWER LINE USING FAMPLC TECHNIQUE Alireza Nazem 1 , Mohd Rizal Arshad 2 1&2 (Underwater Robotics Research Group (URRG), School of Electrical and Electronic Engineering, Universiti Sains Malaysia, NibongTebal, Pulau Pinang, Malaysia) ABSTRACT FAMPLC is an approach to real time bidirectional Power Line Communication in remotely controlled applications combining the voltage’s frequency and the current’s amplitude modulations [1]. The square-wave frequency modulated AC Power in one end called “the server”, supplies the “receiver node” in another end using a bridge inverter. Data in this mode is carried by the pulse-width and the frequency values. Data transmission from the receiver node to the server is by use of an active resistor as a dummy load. A Thevenin Equivalent Converter (TEC) circuit is embedded in the server to derive the equivalent voltage from the current means. An UART port was successfully established over a dedicated power supply and a remote application as an extended I/O port in ROV application. The result of a full duplex transmission for the remote I/O is also presented. KEYWORDS: FAMPLC, UART over power-line, full-duplex transmission, Frequency and Amplitude combined Modulations 1. INTRODUCTION FAMPLC is a non-superimposing method in which the power-line is utilized as a communication platform using its parametric values such as Voltage, Current, frequency and duty cycle. A DC to AC inverter is used as the server module to transmit the data over the power line [2].Since the consumer draining current in the regulated DC line is not proportional to the unregulated incoming AC voltage, a full duplex communication may be established between the power supply and the consumer based on each specific layer.Despite the Frequency Modulated Power Supply (FMPS) used in this research to transmit data from the server module to the consumer node, current mode circuitthat is employedto transmit vice versa are described as the circuit whose input and output signals are currents rather than voltage signals [3].Fig. 1 illustrates the genericconcept of this technique for a UART communication. In 2009, Industrial Power Line Communication (IPLC) was presented [4]. This technique uses the power cables of the DC link as transmission medium and thus does not Journal of Electronics and Communication Engineering & Technology (JECET) ISSN 2347-4181 (Print) ISSN 2347-419X (Online) Volume 1, Issue 1, July-December (2013), pp. 01-09 © IAEME: http://www.iaeme.com/JECET.asp JECET © I A E M E
Transcript
Page 1: 40520130101001

Journal of Electronics and Communication Engineering & Technology (JECET)ISSN

2347–4181 (Print), ISSN 2347 – 419X(Online), Volume 1, Issue 1, July-December(2013)

1

FULL-DUPLEX UART APPROACH OVER POWER LINE USING

FAMPLC TECHNIQUE

Alireza Nazem1, Mohd Rizal Arshad

2

1&2(Underwater Robotics Research Group (URRG), School of Electrical and Electronic Engineering, Universiti Sains Malaysia, NibongTebal, Pulau Pinang, Malaysia)

ABSTRACT

FAMPLC is an approach to real time bidirectional Power Line Communication in remotely controlled applications combining the voltage’s frequency and the current’s amplitude modulations [1]. The square-wave frequency modulated AC Power in one end called “the server”, supplies the “receiver node” in another end using a bridge inverter. Data in this mode is carried by the pulse-width and the frequency values. Data transmission from the receiver node to the server is by use of an active resistor as a dummy load. A Thevenin Equivalent Converter (TEC) circuit is embedded in the server to derive the equivalent voltage from the current means. An UART port was successfully established over a dedicated power supply and a remote application as an extended I/O port in ROV application. The result of a full duplex transmission for the remote I/O is also presented. KEYWORDS: FAMPLC, UART over power-line, full-duplex transmission, Frequency and Amplitude combined Modulations

1. INTRODUCTION

FAMPLC is a non-superimposing method in which the power-line is utilized as a communication platform using its parametric values such as Voltage, Current, frequency and duty cycle. A DC to AC inverter is used as the server module to transmit the data over the power line [2].Since the consumer draining current in the regulated DC line is not proportional to the unregulated incoming AC voltage, a full duplex communication may be established between the power supply and the consumer based on each specific layer.Despite the Frequency Modulated Power Supply (FMPS) used in this research to transmit data from the server module to the consumer node, current mode circuitthat is employedto transmit vice versa are described as the circuit whose input and output signals are currents rather than voltage signals [3].Fig. 1 illustrates the genericconcept of this technique for a UART communication. In 2009, Industrial Power Line Communication (IPLC) was presented [4]. This technique uses the power cables of the DC link as transmission medium and thus does not

Journal of Electronics and Communication Engineering &

Technology (JECET)

ISSN 2347-4181 (Print)

ISSN 2347-419X (Online)

Volume 1, Issue 1, July-December (2013), pp. 01-09

© IAEME: http://www.iaeme.com/JECET.asp

JECET

© I A E M E

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Journal of Electronics and Communication Engineering & Technology (JECET)ISSN

2347–4181 (Print), ISSN 2347 – 419X

require any other cable. It was achieved by a coupling unit that couples the data onto the power cables, resulting in reduction of the cabling effort considerably. power line communication methods such as the Frequency Shift Keying (FSK) as modulation technique [5], the maximum copper length is limited to typically not longer than 500 meters. In medium voltage power system, multiprequired to compensate the signal drop for longer distances [6power line transmission over 1500 meters of copper cable was successfully achieved.

Fig. 1: The fundamental concept of FAMPLC communication

2. APPROACH AND METHODS 2.1 FM transmission approach

In FAM, a DC to low frequency (<transmitting data by changes in the Frequency and the duty cycle of the invertedThe linear characteristics of a multiply conductor cable in base frequencies allows longer distance data transmission [7]. The supplying sourcomponents for FM transmission over the supplying power.

Fig. 2: DC to frequency modulated AC inverter block

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2

require any other cable. It was achieved by a coupling unit that couples the data onto the power cables, resulting in reduction of the cabling effort considerably. In comparison to other power line communication methods such as the Frequency Shift Keying (FSK) as

], the maximum copper length is limited to typically not longer than 500 meters. In medium voltage power system, multiple repeaters with dedicated ID

nal drop for longer distances [6]. In this research, full duplex power line transmission over 1500 meters of copper cable was successfully achieved.

fundamental concept of FAMPLC communication.

APPROACH AND METHODS

FM transmission approach FAM, a DC to low frequency (<1 KHz) AC inverter embeds the means of

transmitting data by changes in the Frequency and the duty cycle of the inverted The linear characteristics of a multiply conductor cable in base frequencies allows longer

]. The supplying source is called, FAM server. Fig.components for FM transmission over the supplying power.

to frequency modulated AC inverter block.

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require any other cable. It was achieved by a coupling unit that couples the data onto the In comparison to other

power line communication methods such as the Frequency Shift Keying (FSK) as a robust ], the maximum copper length is limited to typically not longer than

peaters with dedicated IDs are ]. In this research, full duplex

power line transmission over 1500 meters of copper cable was successfully achieved.

) AC inverter embeds the means of AC power.

The linear characteristics of a multiply conductor cable in base frequencies allows longer ce is called, FAM server. Fig.2 shows the

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To extract the data means from the modulated AC power, a pulse-width reading process is performed using an embedded counter in the receiver’s circuitry. This is also done for the extraction of the data from the current means by the receiver node’s circuitry. The resolution of counts is dependent to the clock speed of the counter. In higher frequencies since the pulse-width interval is reduced, clock gating process may be applied in order of maintaining the accuracy [8]. 2.2 AM transmission approach

A dummy active resistance circuitry as shown in the fig. 3 is considered to overlay the data as a current layer besides existing consumers. The Mayer-Norton circuit by use of a bipolar or a uni-junction transistor is considered for this model. The Norton equivalent circuitry [9-10] provides a rail to rail signal conversion from the desired signal that is amplified and shifted over the zero crossing level.Since the value of the variant resistant may drop too low, the transistor is chosen from medium power family thus the bandwidth, and the pulse responds in common collector/drain configuration is considerably crucial.Notable that for an errorless AM transmission using the abovementioned dummy load, a regulatory circuit to stabilize the voltage for other consumers is required right after the active resistance in order to prevent from capacitive damping distortion to the sharp rising and falling pulses edges.

Fig.3: Active resistance as the dummy load. Notable that for an errorless AM transmission using the abovementioned dummy load, a regulatory circuit to stabilize the voltage for other consumers is required right after the active resistance in order to prevent from capacitive damping distortion to the sharp rising and falling pulses edges. A Thevenin Equivalent Converter (TEC) in the server circuitry as illustrated in fig.4 is employed to generate the substitutable voltage means of the draining current [11].

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Fig.4: The embedded

To overcome the pulse-width losses due to sharp rising and falling edges the TEC circuitry can be designed using either fast operational amplifiers or differential current sensing comparators [12]. 2.3 Two-Port Network analysis

In TL theory [13], a common way to fig. 5, is to use the transmission matrix, also known as the ABCD matrix.

Fig.5

),( 22 IV as functions of ),( 11 IV , can be expressed as in

backward transmission matrix.

2

2

I

V

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embedded TEC circuit in the server unit.

width losses due to sharp rising and falling edges the TEC circuitry can be designed using either fast operational amplifiers or differential current

analysis ], a common way to present a Two-Port Network (2PN

, is to use the transmission matrix, also known as the ABCD matrix.

.5: The concept of a 2PN model.

, can be expressed as in equation 1. bT in (1) is referred to the

1

1

1

1

1

1

1

2

2 1

I

VT

I

V

A

B

C

D

BCADI

V

D

B

C

Ab=

−==

(1)

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width losses due to sharp rising and falling edges the TEC circuitry can be designed using either fast operational amplifiers or differential current

Port Network (2PN) as shown in

) is referred to the

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2.4The Transfer Functions Given 2PN in Fig. 5, the ABCD parameters allow us to calculate the transfer

functions as in equation (2) and (3) [14-15-16]:

)/(/)( 2 SLSLLSS DZZCZBAZZVVfH +++== (2)

SSLSR ZDZZCZBfH /)()( ++= (3)

)( fHS and )( fH R

are the FM and AM transfer functions respectively. SZ is proportional to

the dynamic characteristics of the cable such as its umbilical form and/or its released length. Since both LZ and

SZ are independently variables, therefore, a sustainable data transmission

is obvious to be only proportional to BCD current dependent coefficients in AM mode from the receiver node to the server.

3. UART OVER POWER-LINE

According to fig. 2, the bridge driver is influenced by the processor’s control pin to

generate proportional switching sequences for a square-wave AC. This can be any kind of data such as ASCII codes for an asynchronous serial communication. Since FAMPLC has been initially introduced for bass frequencies, in order to achieve high baud rates, a compensation block has to be added to each layer of transmissions. The Total Harmonic Distortion (THD) [17] in higher frequencies depends on the dynamic characteristics of the transmission layer. The distortion analysis for transmission model shown in fig. 6(a) for an FM transmission can be expressed as in equation 4.

( )tsts

C eKseKsC

tV 21

2 211220

1)( +=

ω (4)

Where:

)1( 2001 −−−= sss ζωωζ

)1( 2

002 −+−= sss ζωωζ (5)

And:

L

CrLs

2=ζ

(6)

is called the exponential damping ratio for the server’s transmission line. 1K and 2K are

achievable from two equations of the initial conditions of )0(Ci and its time base derivative.

Fig. 6(b) demonstrates the consequent effect to the sharp rise and fall edges of the power pulses.

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Journal of Electronics and Communication Engineering & Technology (JECET)ISSN

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Fig. 6: a) The transmission model for UART

On the other hand, the AM distortion the expression 7.

Si

The first and second terms in (transmission.

nRi ′ And AMi are the system draining current and the dummy load current

respectively. AMi is used to carry the data means over AM. Fig.

test signal in 1000 meters of copper cable.

Understanding the edge distortions leads to an overcoming compensation thus, an errorless transmission. Fig. 8 demonstrates a real time full duplex transmission concept in an ROV application.

nd Communication Engineering & Technology (JECET)ISSN

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(a)

(b)

transmission model for UART b) The consequent pulse edge distortion

On the other hand, the AM distortion analysis for current mode transmission results in

AMRvLv iidt

tdiCr

dt

tidLCn

+++= ′

)(

2

)(

2 2

2

(7)

The first and second terms in (7) present the distortion interval of the AM are the system draining current and the dummy load current

y the data means over AM. Fig. 7 shows the TEC output of a

0 meters of copper cable. SV is the amplified voltage drop across

Understanding the edge distortions leads to an overcoming compensation thus, an errorless 8 demonstrates a real time full duplex transmission concept in an ROV

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The consequent pulse edge distortion

analysis for current mode transmission results in

(7)

distortion interval of the AM are the system draining current and the dummy load current

7 shows the TEC output of a

the amplified voltage drop across SR .

Understanding the edge distortions leads to an overcoming compensation thus, an errorless 8 demonstrates a real time full duplex transmission concept in an ROV

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Journal of Electronics and Communication Engineering & Technology (JECET)ISSN

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Fig. 7: The TEC output illustrating the equivalent voltage means of the total current distortions, system current consumption and the active resistance overlaid current.

Fig. 8: The result of a real time full duplex t

4. CALIBRATION

A calibration sequence may be needed to overcome the consequential errors due to

the cabling distortion. This is done using a specific pulsetransmission and depends on the importance of commands. For

”with the frequency “f” and the duty cycle sequential processor as the reference

enables the CPU for a calibration process to determine the width loss.

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The TEC output illustrating the equivalent voltage means of the total current distortions, system current consumption and the active resistance overlaid current.

The result of a real time full duplex transmission over the power line.

A calibration sequence may be needed to overcome the consequential errors due to the cabling distortion. This is done using a specific pulse-width once or in ahead of every

depends on the importance of commands. For example, pulse

and the duty cycle “D” is defined in boot up sequence of each reference. Comparing the received pulses with wP by

the CPU for a calibration process to determine the width loss.

nd Communication Engineering & Technology (JECET)ISSN

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The TEC output illustrating the equivalent voltage means of the total current distortions, system current consumption and the active resistance overlaid current.

ransmission over the power line.

A calibration sequence may be needed to overcome the consequential errors due to width once or in ahead of every

pulse-width “ wP

in boot up sequence of each by each party

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5. CONCLUSION

Understanding the generic concept of the novel technique of FAMPLC theory yields

to establish a real time full duplex UART communication over a dedicated power line for control and monitoring of a remote application.It thus eliminate the need of fiber-optic materials and transducers that require serious maintenance and high cost in applications such as Remotely Operated vehicle (ROV).Table 1demonstrates some economical comparison between the herewith discussed technique using a copper cable and the conventional optical method known as a hybrid cable (Copper & fiber-optic).

Table1. Economical comparison of the fibre optic and copper cables

Cable

(100 meters) Hybrid Copper

Cost (USD) >700 <400 Winch radius (cm) >40 <30

Weight (Kg) >30 <20

REFERENCES

[1] A. Nazem, M. R. Arshad, Composite video transmission as current overlay using

powerline concept of the FAMPLC, Proc. IEEE Symposium on Industrial Electronics and Applications, Langkawi, 2011, 279-283

[2] G.Ramachandran, T.MuthuManickam, B.SuganyaAbiramavalli, T.Sheela, ArunKumarMadhuvappan andL.Vasanth, Study and implementation of green power in campus environment, International Journal of Electronics and Communication Engineering and Technology, Vol. 3, Issue 1, 2012, 325-331

[3] R. K.Tiwari, S. Kumar andG. R. Mishra,A study on techniques of improvements in current mirrors using Wilson scheme, International Journal of Electronics and Communication Engineering and Technology, Vol. 3, Issue 2, 2012, 56-62

[4] Alexander V., Stefan S., Dongsheng Y. andKarl-Heinz W., Industrial powerline communication for machine tools and robotics,German academic society for production engineering, Vol. 2, 2010, 295-305.

[5] Rakesh C. P., Noise measurement in low-voltage powerline for modem design and Serial data acquisition,Proc. Int. Conf. on Information, Computing and Telecommunications, Dhaka, 2007, 113-6.

[6] Duckhwa H., Younghun L. andYoungdeuk M., A study on the composite power line communication network,international journal of communication and networking, Vol. 56, 2009, 547-548.

[7] M. Hasheminezhad, M. Vakilian, T.R. Blackburn and B.T. Phung, Direct introduction of semicon layers in xlpe cable model,Proc. International Conf. on Power System Technology, Chongqing, 2006, 1-7.

[8] K. M.Quadry, S. A.Sattar and K. S.Rajan, Design of 16 bit low power processorusing clock gating technique,International Journal of Electronics and Communication Engineering and Technology, Volume 3, Issue 3, 2012, 333-340

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[9] Tianyu An, Research on illed-conditioned equations in tracking thevenin equivalent parameters with local measurements, Proc.IEEE Conference on Power System Technology, Beijing, 2006, 1-4.

[10] Reza C. andOmid H., Differential current conveyor based current comparator, International Journal of Electronics Communications AEÜ, 2011, 949-953.

[11] A. Nazem, 2008. Free Level Threshold Zone (FLTZ) logic for mixed analog – digital closed loop circuitry, Master thesis, school of Electronic and Electrical Engineering, Universiti Sains Malaysia, 2008.

[12] D. N. Kapadia and P. P. Gandhi, Design and simulation of high speed CMOS differential current sensing comparator in 0.35µm and 0.25µm technologies, International Journal of Electronics and Communication Engineering and Technology, Volume 3, Issue 3, 2012, 147-152

[13] Stefano G, andThomas B., A novel approach to the modelling of the indoor power line channel-part ii: transfer function and its properties,IEEE Transaction on Power delivery, Vol. 20, No 3, 2005, 1869-1878.

[14] Petr M., Jiří M., Martin K. and Miloš O., Power line cable transfer function for modelling of power line communication system, Journal of Electrical Engineering, Vol. 62-2, 2011, 104-108.

[15] Richard R. S. and Mohammed S. G., Introduction to Electronic circuit design, int. ed. Pearson Ed. (New Jersey: Prentice Hall, 2003) 15-17.

[16] Summerson S. R., Equivalent Circuits and Transfer Functions, Rice University, department of Electrical engineering, Technical report, 2009.

[17] Y. Liu, H. Hong, and A. Q. Huang, Real-time calculation of switching angles minimizing THD for multilevel inverters with step modulation,IEEE Transaction on Industrial Electronics, VOL. 56, NO. 2, 2009, 285-293.