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458 IEEE TRANSACTIONS ON RELIABILITY, VOL. 66, NO. 2, JUNE 2017 R 2 -TSV: A Repairable and Reliable TSV Set Structure Reutilizing Redundancies Jaeseok Park, Minho Cheong, and Sungho Kang, Senior Member, IEEE Abstract—Recently, three-dimensional integrated circuit (3-D IC) design has attracted much attention, and the reliability of these systems has become increasingly important. In this paper, a new repairable and reliable through-silicon via (TSV) set structure is proposed. This proposed TSV set structure can be applied to the previous TSV repair structures which require TSV redundancies, and detects a defect or error reutilizing residual TSV redundancies for high reliability of 3-D ICs. Both online test and soft error de- tection/analysis are supported by the proposed approach. Further- more, a redundancy-sharing structure is introduced to guarantee a balanced detection rate among TSV sets and a reasonable full de- tection rate. The experimental results prove that the new approach guarantees high redundancy utilization efficiency and reliability of TSV. Also, they show that defect or error detection is achieved by the proposed TSV set structure. Index Terms—3-D IC, compactor, through-silicon via (TSV), TSV redundancy, TSV redundancy reutilization. ACRONYMS AND ABBREVIATIONS IC Integrated circuit. 3D Three dimensional. 2D Two dimensional. TSV Through-silicon via. MISR Multiple-input shift register. 1D One dimensional. MUX Multiplexer. R 2 -TSV Repairable and reliable TSV. SOC Single-output compactors. IP Intellectual property. NOTATIONS CI max Maximum number of compactor inputs. m Number of compactor outputs. s Number of signal TSVs in a TSV set. r Number of redundant TSVs in a TSV set. R Comparison result between compactor outputs. en Enable signal. E T OR function output of all R values. Manuscript received August 18, 2016; revised November 30, 2016; accepted February 9, 2017. Date of publication March 28, 2017; date of current version May 31, 2017. This work was supported in part by the Ministry of Trade, Industry & Energy (10052875) and in part by the Korea Semiconductor Research Consortium support program for the development of the future semiconductor device. (Corresponding author: Sungho Kang.) Associate Editor: M. Zuo. The authors are with the Computer System and Reliable SOC Labo- ratory, Department of Electrical and Electronic Engineering, Yonsei Uni- versity, Seoul 120-749, South Korea (e-mail: [email protected]; [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TR.2017.2681103 E U Serial data output of all R values. p Number of TSV test patterns. n Number of TSV sets. s x Number of XOR stages. N SOC Number of single-output compactors. C T Total defect or error coverage. I. INTRODUCTION I N THE modern integrated circuit (IC) industry, three- dimensional (3-D) IC design has become an important area of circuit design as the demand for higher performance and den- sity of ICs increases. The through-silicon via (TSV) is one of the main components of the 3-D IC structure, and it is a vertical electrical link between two layers penetrating through the silicon substrate of a layer [1]. To monitor the quality of components of 3-D ICs including TSVs, all 3-D ICs should pass proper tests; a 3-D IC test is commonly composed of two processes: prebond and postbond tests [2]–[8]. The prebond test is executed on each layer when all layer implementations are complete. On the other hand, the postbond test is executed whenever the layers proved in the prebond test are stacked. TSVs should also pass these two test steps. Through these TSV test processes, faulty TSVs are found if any defects exist on the TSVs. The TSV repair process is required to raise yield because even one faulty TSV can cause chip malfunction. In the TSV repair process, the faulty TSVs are interchanged by extra TSVs inserted in TSV sets, which are called TSV redundancies, as in the memory repair procedure. Lots of TSV repair techniques have been researched recently [9]–[15]. Commonly, a TSV set contains a fixed number of signal TSVs and TSV redundancies which deliver functional signals, through switches or fuses, from the one layer to the other layer, and the matches between TSVs and functional signals are determined according to the test results that inform the addresses of faulty TSVs. When the TSV repair processes are completed, some TSV redundancies may not be consumed in the TSV repair, and then these residual TSV redundancies remain with no function of signal delivery. As the complexity of ICs rises, such as in 3-D ICs, mal- functions and system failures from overheating and signal interference, happen more often in operation [16]. Therefore, to minimize the loss from these phenomena, the significance of reliability research is emphasized remarkably, not only for components in 2D ICs but also for TSVs between stacked layers in 3-D ICs. Even in dies passing proper tests, some problems such as soft errors and defects from aging may be observed. Therefore, soft error treatment schemes have been proposed and 0018-9529 © 2017 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications standards/publications/rights/index.html for more information.
Transcript

458 IEEE TRANSACTIONS ON RELIABILITY, VOL. 66, NO. 2, JUNE 2017

R2-TSV: A Repairable and Reliable TSV SetStructure Reutilizing Redundancies

Jaeseok Park, Minho Cheong, and Sungho Kang, Senior Member, IEEE

Abstract—Recently, three-dimensional integrated circuit (3-DIC) design has attracted much attention, and the reliability of thesesystems has become increasingly important. In this paper, a newrepairable and reliable through-silicon via (TSV) set structure isproposed. This proposed TSV set structure can be applied to theprevious TSV repair structures which require TSV redundancies,and detects a defect or error reutilizing residual TSV redundanciesfor high reliability of 3-D ICs. Both online test and soft error de-tection/analysis are supported by the proposed approach. Further-more, a redundancy-sharing structure is introduced to guaranteea balanced detection rate among TSV sets and a reasonable full de-tection rate. The experimental results prove that the new approachguarantees high redundancy utilization efficiency and reliability ofTSV. Also, they show that defect or error detection is achieved bythe proposed TSV set structure.

Index Terms—3-D IC, compactor, through-silicon via (TSV),TSV redundancy, TSV redundancy reutilization.

ACRONYMS AND ABBREVIATIONS

IC Integrated circuit.3–D Three dimensional.2–D Two dimensional.TSV Through-silicon via.MISR Multiple-input shift register.1–D One dimensional.MUX Multiplexer.R2-TSV Repairable and reliable TSV.SOC Single-output compactors.IP Intellectual property.

NOTATIONS

CImax Maximum number of compactor inputs.m Number of compactor outputs.s Number of signal TSVs in a TSV set.r Number of redundant TSVs in a TSV set.R Comparison result between compactor outputs.en Enable signal.ET OR function output of all R values.

Manuscript received August 18, 2016; revised November 30, 2016; acceptedFebruary 9, 2017. Date of publication March 28, 2017; date of current versionMay 31, 2017. This work was supported in part by the Ministry of Trade,Industry & Energy (10052875) and in part by the Korea Semiconductor ResearchConsortium support program for the development of the future semiconductordevice. (Corresponding author: Sungho Kang.) Associate Editor: M. Zuo.

The authors are with the Computer System and Reliable SOC Labo-ratory, Department of Electrical and Electronic Engineering, Yonsei Uni-versity, Seoul 120-749, South Korea (e-mail: [email protected];[email protected]; [email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TR.2017.2681103

EU Serial data output of all R values.p Number of TSV test patterns.n Number of TSV sets.sx Number of XOR stages.NSOC Number of single-output compactors.CT Total defect or error coverage.

I. INTRODUCTION

IN THE modern integrated circuit (IC) industry, three-dimensional (3-D) IC design has become an important area

of circuit design as the demand for higher performance and den-sity of ICs increases. The through-silicon via (TSV) is one ofthe main components of the 3-D IC structure, and it is a verticalelectrical link between two layers penetrating through the siliconsubstrate of a layer [1]. To monitor the quality of components of3-D ICs including TSVs, all 3-D ICs should pass proper tests; a3-D IC test is commonly composed of two processes: prebondand postbond tests [2]–[8]. The prebond test is executed on eachlayer when all layer implementations are complete. On the otherhand, the postbond test is executed whenever the layers provedin the prebond test are stacked. TSVs should also pass these twotest steps.

Through these TSV test processes, faulty TSVs are foundif any defects exist on the TSVs. The TSV repair process isrequired to raise yield because even one faulty TSV can causechip malfunction. In the TSV repair process, the faulty TSVsare interchanged by extra TSVs inserted in TSV sets, which arecalled TSV redundancies, as in the memory repair procedure.Lots of TSV repair techniques have been researched recently[9]–[15]. Commonly, a TSV set contains a fixed number ofsignal TSVs and TSV redundancies which deliver functionalsignals, through switches or fuses, from the one layer to the otherlayer, and the matches between TSVs and functional signals aredetermined according to the test results that inform the addressesof faulty TSVs. When the TSV repair processes are completed,some TSV redundancies may not be consumed in the TSVrepair, and then these residual TSV redundancies remain withno function of signal delivery.

As the complexity of ICs rises, such as in 3-D ICs, mal-functions and system failures from overheating and signalinterference, happen more often in operation [16]. Therefore,to minimize the loss from these phenomena, the significanceof reliability research is emphasized remarkably, not only forcomponents in 2D ICs but also for TSVs between stacked layersin 3-D ICs. Even in dies passing proper tests, some problemssuch as soft errors and defects from aging may be observed.Therefore, soft error treatment schemes have been proposed and

0018-9529 © 2017 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.See http://www.ieee.org/publications standards/publications/rights/index.html for more information.

PARK et al.: R2-TSV: A REPAIRABLE AND RELIABLE TSV SET STRUCTURE REUTILIZING REDUNDANCIES 459

improved to enhance the reliability of 2-D ICs. Commonly, thesesoft error treatment schemes request additional connections totransmit check bits. But, only TSVs can be the additional con-nections to apply soft error detection techniques to TSVs in3-D ICs because there is no other signal connection betweenthe layers. Thus, the circuits for TSV reliability should secureadditional TSVs.

Response compactors are usually used to save output pinswhich drive the test results from scan-outs [17]–[21]. The teststimulus compression techniques that are applied for efficientinjection of test stimulus into scan chains must guarantee fullrecovery after decompression because the values in scan chainsshould be exactly identical to test pattern before compres-sion. However, in the response compaction techniques, it canbe irreversible since the test results compressed by responsecompaction do not require full recovery. As a result, responsecompaction reduces the number of compactor outputs. The datacollected through the compactor is compared to the referencedata, and then the defects are detected from the mismatch be-tween the compacted data and the reference data. The responsecompaction techniques are commonly divided into two cate-gories: the space compaction and the time compaction. Thecompactors of space compaction techniques are combinationallogical circuits composed of XOR gates, while time compactiontechniques apply multiple-input shift registers as compactors.

This paper proposes a new TSV set structure which is reliableas well as repairable. It can repair faulty TSVs by using TSVredundancies as in the previous repairable TSV sets, and it canrecognize the occurrence of aging defects and soft errors by thereutilization of residuary TSV redundancies. These residuaryTSVs are utilized as additional signal routes for detecting defectsor errors on TSVs. Section II reviews the previous TSV repairstructures and test result compaction schemes, and Section IIIproposes a reliability-advanced TSV set structure. Section IVevaluates the efficiency of the proposed TSV set and provesthat the proposed TSV set performs defect or error detection.Finally, Section V summarizes this paper.

II. PREVIOUS WORKS

A. TSV Repair Structure

To repair faulty TSVs, the circuit designers construct TSVsets including TSV redundancies and a routing logic, as shownin Fig. 1(a) [11], [13]–[15]. Many repair structures have beenintroduced, and they have differences in the switch/fuse box.The yield manager and 3-D IC designer determine the ratiobetween the signal TSVs and redundant TSV by consideringthe 3-D IC specification and manufacturing process. For exam-ple, in the low-quality TSV implementation process, the TSVdefect rate is relatively high, so high-performing TSV repairsystem is required. To raise repair performance, fewer sig-nal TSVs per one redundant TSV are arranged in a TSV set.The TSV repair schemes assume that TSVs are arranged in plu-ral TSV blocks, and all TSV blocks have no delay problem forTSV repair structure implementation in this TSV arrangement.

There are two categories for the TSV repair structure: 1-D and2-D TSV repair. In the 1-D repair structure, two typical TSVrepair structures are proposed: signal switching [11] and signalshifting [13], [14], as shown in Fig. 1(b). Only the TSVs which

Fig. 1. Repairable TSV set structure. (a) Overall structure. (b) Signal-switching/shifting structure (1-D TSV repair) [11], [13], [14]. (c) Router-basedstructure (2-D TSV repair) [15].

include defects are interchanged by the specific extra TSVsin the signal-switching structure. Thus, the good TSVs have nochange of routing in this repair structure. However, in the signal-shifting structure, links of TSVs including faulty TSVs are re-arranged by serial shifting. The signal shifting should reroutemuch more connections compared to the signal switching, butreduces timing imbalance problem from rerouting connections.In the 2-D repair structure, as shown in Fig. 1(c), the faultyTSVs are replaced by using routers that are composed of three3-to-1 multiplexers (MUXes), and the router can change connec-tions between signals and TSVs in two directions [15]. Fromthese characteristics, the 2-D repair schemes are superior to1-D repair schemes in the repair of clustered faults, but requirea much higher hardware cost. In all repair concepts, residualTSV redundancies exist if any TSV redundancies are not occu-pied in the repair step. Practically, almost all TSV redundanciesare not used because the TSV defect rate is commonly quitelow. In [14], Hsieh and Hwang report that the TSV defect ratevalue in practical 3-D IC implementation environment exist be-tween 10–4 and 10–5. However, TSV redundancies are requiredin cost-efficiency terms. In the case of no TSV redundancy, the3-D IC should be discarded even though only one TSV has adefect. Even if the defect rate of one TSV is very low, the de-

460 IEEE TRANSACTIONS ON RELIABILITY, VOL. 66, NO. 2, JUNE 2017

Fig. 2. Compactors. (a) Example of SOCs. (b) Example of multiple-outputcompactors.

fect occurrence probability on at least one TSV in a 3-D IC isnot ignorable. In other words, removing repair system can takeimmediate cost saving, but it calls eventually huge loss from theyield drop of 3-D IC integration. Therefore, redundant TSVsare mandatory even if the TSV defect rate is quite low. After theTSV repair process, these residual TSV redundancies descendto unnecessary metal lines in the IC.

B. Compaction

Compaction schemes are applied to reduce the channel widthfor data observation. Fig. 2(a) shows a structure example ofsingle-output compactor (SOC). In the compaction theory, thecompactor matrix represents the connection among compactorinputs and outputs. The number of rows in the compactor shouldbe equal to that of compactor inputs, while columns matchcompactor outputs. Therefore, each row or each column in thecompactor matrix signifies an input or an output of the com-pactor. And, each value stands for whether the correspondinginput and output are directly connected or not (“connected”: 1,“unconnected”: 0). The compactor shown in Fig. 2(a) is com-posed of eight inputs and one outputs, and so the compactormatrix of this compactor should contain eight rows and onlyone column. All values in the matrix should be 1 s because allinputs affect the output in this compactor. This compactor is ableto detect odd-numbered defects or errors with no diagnosis.

On the other hand, the multiple-output compactors supportdefect or error diagnosis. To prove that a multiple-output com-

pactor ensures defect or error diagnosis, the corresponding com-pactor matrix must satisfy the following conditions.

Condition 1: Each row contains at least one 1.Condition 2: All rows are distinct.Condition 3: Each row includes odd-numbered 1 s.A row filled with only 0s which does not meet Condition 1

stands for that the corresponding compactor input has no in-fluence on any compactor outputs, and it also means that thedefects or errors through this input are undetectable with thiscompactor. If some rows violate Condition 2, the defects orerrors through the corresponding inputs are impossible to beclassified. Furthermore, the defects or errors are undetectablewhen the defects or errors are propagated simultaneously toeven-numbered compactor inputs. The compactor matrix con-taining some rows with even-numbered 1 s against Condition 3cannot guarantee defect or error detection when defects or er-rors are propagated to the plural compactor inputs over three.Fig. 2(b) describes a multiple-output compactor satisfying allconditions. The compactors under all conditions guarantee de-fect or error detection if defects or errors are propagated simulta-neously to two- or odd-numbered inputs. In [19], the maximumnumber of compactor inputs (CImax) with m compactor outputsis defined as

CImax = 2m−1 . (1)

C. Motivation

The need for reliability enhancements in 3-D ICs has in-creased, and some defect or error detection circuits are requiredto satisfy that need. For this detection circuit, additional connec-tion lines are required for transmitting comparison data from alayer to another layer. Incidentally, the TSV defect rate is quitelow, and many TSV redundancies are abandoned. This fact iscalled the inefficiency in TSV redundancy utilization [22].

This paper proposes a repairable and reliable TSV set (R2-TSV) structure that supports all previous TSV repair processes.R2-TSV reduces the inefficiency of TSV redundancies by re-utilizing residual TSV redundancies, and it raises the reliabilityof TSV sets by comparing the compacted data of inputs andoutputs.

III. PROPOSED TSV SET STRUCTURE

R2-TSV proposes a TSV set structure that supports TSVrepair and can detect defects or errors. This paper pro-poses the following two concepts, which are indicated inSections III-A and III-B. The concept proposed in Section III-Auses SOCs to compact data, whereas the other concept adoptsa multiple-output compactor. The main purpose of R2-TSV isthe defect/error detection during the operation of 3-D IC prod-ucts, and defects from aging or soft errors which cause systemmalfunction can be detected if they affect TSV values.

A. R2-TSV at the Set Level

For easy application to previous repair TSV sets, R2-TSVcan be applied to TSV sets individually. Fig. 3(a) shows anoverall TSV set structure of set-level R2-TSV; this TSV set isthe jth set of s TSV sets. A TSV set includes s signal TSVsand r TSV redundancies, so the maximum number of available

PARK et al.: R2-TSV: A REPAIRABLE AND RELIABLE TSV SET STRUCTURE REUTILIZING REDUNDANCIES 461

Fig. 3. Proposed TSV set structure. (a) TSV set structure. (b) Result collection.

SOCs is r. The comparison result (R) is obtained by comparingthe compacted input data with the compacted output data. Thecomparison results are 0s in the case of no defect or error, but 1 scan be observed at defect or error occurrences. For this compar-ison, a connection line between two layers is required becausethe compacted data of the one layer should be transmitted to theother layer. A residual TSV redundancy is adopted as that con-nection line if any TSV redundancies are unused in the repairprocess. The switch/fuse boxes that are composed of transistorsor MUXes determine the connections between inputs/outputsand TSVs for supporting TSV repair; they also assign the routeof the compactor output. All comparisons are executed if thenumber of residual TSV redundancies is m or more. However,some comparisons cannot be available if fewer than m TSVredundancies are left after the repair process. For that case, anenable signal for the final XOR function, en, is designed. If thereare any invalid comparisons, the corresponding enable signalsare set to 0 to hold the related comparison results at 0.

The results of comparison (Rs) of s TSV sets are collected,as shown in Fig. 3(b). An error or defect occurrence is detectedby analyzing ET , which is an OR function output of all R valuesfrom all TSV sets. ET sends 1 whenever at least one bit ofcomparison results from all TSV sets contains 1. After observing1 on ET , the TSV sets where defects or errors are involved canbe diagnosed by serially shifting out the results in a registerthrough EU , if the analysis is necessary.

Fig. 4 presents two examples of set-level R2-TSV. Fig. 4(a)describes an example with a TSV set structure that contains

Fig. 4. Examples of set-level R2-TSV. (a) One compactor, two redundancies.(b) Three compactors, three redundancies.

six signal TSVs and two TSV redundancies. In this example,one SOC with six inputs is inserted into both layers to compactthe TSV inputs and outputs, and the compacted 1-bit-data ofthe inputs is compared with that of the outputs. This simpleexample can detect the odd-numbered defects or errors becausea SOC is applied. Therefore, only one residual TSV redundancyis required to achieve the comparison.

The set-level R2-TSV structure can be extended when im-proved defect or error coverage is requested. The compactors asmany as residual TSV redundancies can be available and addi-tional XOR modules increase the defect/error detection coverage.Fig. 4(b) describes another example composed of six TSVs and

462 IEEE TRANSACTIONS ON RELIABILITY, VOL. 66, NO. 2, JUNE 2017

Fig. 5. Redundancy-sharing structure.

three TSV redundancies with three SOCs. To guarantee cov-erage increment, all SOCs should cover different input/outputcombinations. The first compactor, which has the highest pri-ority, should be connected to all TSV inputs or outputs. Thisrequirement guarantees the detection of odd-numbered defectsor errors even if only one comparison is available. Then, the de-tection of half of the even-numbered defects or errors is coveredwith an additional compactor that covers three inputs or outputs(second XOR module) if two TSV redundancies are available.In the ideal case, a third compactor can cover more than halfof the remaining undetectable cases when all comparisons areaccomplished. This concept is proved in Section IV.

B. Redundancy-Sharing R2-TSV

There are some limits in the R2-TSV structure that was in-troduced in Section III-A. First, full comparison circuit imple-mentation can fail because some TSV sets can have no residualTSV redundancy. Thus, an imbalance in secure reliability canoccur. Second, SOCs can guarantee limited defect or error cov-erage. If multiple-output compactors are applied, high and stablecoverage will be obtained. However, the number of TSV redun-dancies in a TSV set is not enough to build comparison circuitswith multiple-output compactors.

To overcome these limits, R2-TSV presents an enhanced TSVset structure that shares the redundancies of multiple TSV sets.Fig. 5 shows the overall TSV set structure of redundancy-sharingR2-TSV. Multiple-output compactors are located in both layers,and the switch/fuse box assigns connections between compactorand residual TSV redundancies, not of a TSV set but of multi-ple TSV sets. This structure can use much more residual TSVredundancies for a compactor.

Some examples of redundancy-sharing R2-TSV are shown inFig. 6. In the example of Fig. 6(a), with 128 signal TSVs and32 TSV redundancies, a 1-D repair technique is applied, and aTSV set is composed of four signal TSVs and one redundantTSV. From (1), 128 signals can be covered by an eight-output

Fig. 6. Examples of redundancy-sharing R2-TSV. (a) 1-D repair (128 STSVs,32 RTSVs). (b) 2-D repair (128 STSVs, 32 RTSVs). (c) 2-D repair (128 STSVs,64 RTSVs).

compactor. Thus, each compactor output can be assigned to oneof the four TSV redundancies. Full comparison will also failif the four TSV redundancies are all occupied in the TSV re-pair step. However, the occurrence of full-comparison failure isextremely low in the redundancy-sharing structure, as will bediscussed in Section IV. Fig. 6(b) and (c) describes the exam-ples of redundancy-sharing R2-TSV with a 2-D repair scheme.Two TSV sets with 2-D repair structures (8 × 8) share TSVredundancies in Fig. 6(b), and eight TSV sets (4 × 4) with anidentical number of signal TSVs exist in a group of Fig. 6(c).With the second 2-D repair structure, there are 64 redundantTSVs in an R2-TSV group, so each compactor output can beassigned to one of the eight TSV redundancies. This enhancedTSV set guarantees the detection of not only an odd numberbut also of two defects or errors, because the multiple-outputcompactors are implemented in it.

PARK et al.: R2-TSV: A REPAIRABLE AND RELIABLE TSV SET STRUCTURE REUTILIZING REDUNDANCIES 463

Fig. 7. Online test flow with R2-TSV.

C. Implementation and Application

To build a repair system, all TSVs are divided into sets whichcontain the fixed number of signal TSVs and redundant TSVs,as shown in Fig. 1(a). The application of R2-TSV is based onthis assumption, and the proposed scheme is applied to all TSVsets. Therefore, regardless of the total number of TSVs in thecircuits, intellectual properties (IPs), or processors, R2-TSV canbe easily implemented.

On the contrary, the more the R2-TSV required, the moreTSVs are constructed in a chip. In the case of huge number ofTSVs in a 3-D IC, the adoption of reliability guarantee tech-niques of TSV is strongly recommended because malfunctionthreat from TSVs becomes larger. R2-TSV is a viable solutionwith no additional TSV implementation for this problem.

R2-TSV can be applied to any repair structures which con-tain TSV redundancies. TSV test techniques which are involvedin wafer-level tests are very dependent on the 3-D IC integra-tion process. But, this proposed TSV set structure is utilizedfor both online test and soft error detection after manufacturing.Therefore, this proposed scheme is independent of the integra-tion methods.

R2-TSV can improve the reliability of TSV sets through softerror detection and online test. At first, R2-TSV can conductsimple and fast online test by the comparison between com-pactor outputs. As shown in Fig. 7, an online test with R2-TSVis executed through the following three steps.

Step 1: Monitoring ET

ET is observed constantly in the test time, and the occur-rence of defects or errors in whole TSV sets can be recognized.Thus, the online test with p test patterns requests p observationsthrough ET for only the fault-existence check.

Step 2: Finding faulty TSV setsFor faulty TSV set diagnosis, all bits of R values are nec-

essary to be checked. These bits are stored in a serial flip-

TABLE IEXAMPLES OF EXTENDED R2-TSV

flop chain which has an output EU , as shown in Fig 3(b).Assume that n TSV sets which contain compactors with sx

outputs are constructed in the target 3-D IC. Then, n·sx clocksare required for shift-out of R values. This step is executed onlyafter 1 value is collected on ET in Step 1.

Step 3: Detail diagnosis (optional)A detail TSV diagnosis can be fulfilled to find faulty TSVs

by utilizing test circuits that are built in for TSV test. This stepis not necessary if detail fault location is not requested.

Some sporadic malfunctions may be generated even thoughthe target ICs include no defect. This phenomenon usually re-sults from soft errors which occur by external causes. This mal-function from soft errors is impossible to be blocked with normaltests because this malfunction occurs intermittently. To detectand block this problem, the relevant signals should be alwaysmonitored in system operation. R2-TSV is able to detect softerrors of TSVs because signals connected to TSVs can be ob-served all the time by checking simple data from R2-TSV. Theinvolved tasks stop and restart to block malfunctions wheneverthe occurrences of soft errors are detected. To reduce the rangeof involved tasks, faulty TSV set diagnosis can be performedjust like Step 2 of online test flow. The analysis of R provides theinformation that indicates which TSV sets generated soft errors;then, the parts or IPs related with those TSV sets can be found.From this analysis, fewer tasks should restart, so unnecessarytask executions can be avoided.

IV. EXPERIMENTAL RESULTS

Set-level R2-TSV can raise the defect or error coverage andutilization ratio of unused TSV redundancies by using moreSOCs, as shown in Fig. 4(b). Table I shows the defect or errorcoverage in the set-level R2-TSV example including six TSVsand three TSV redundancies, as shown in Fig. 4(b). The defector error detection coverage is more improved as more unusedTSV redundancies are available. Thirty-two cases of occurrenceof defect or error can be recognized with only one fully cov-ered SOC because the only odd-numbered defects or errors arepossible to be detected. In addition, 16 and 8 additional defector error cases are covered, respectively, if one and two outputswhich are partially covered are available. Thus, R2-TSV ensuresalmost 90% detection coverage when three residual TSV redun-dancies are available in the example. If NSOC SOC are used fora TSV set that includes s TSVs, the total defect or error coverage(CT ) is defined as

CT =2s

(2NS O C − 1

)

2NS O C (2s − 1). (2)

The detection coverages according to the number of defects orerrors vary in different characteristics of the partial compactor

464 IEEE TRANSACTIONS ON RELIABILITY, VOL. 66, NO. 2, JUNE 2017

TABLE IICOMPARISON ACCORDING TO THE NUMBER OF SECOND XOR

TREE INPUTS IN THE CASE OF A SIX-TSV SET

TABLE IIIDEFECT COVERAGE ACCORDING TO THE NUMBER OF TSVS

IN THE CASE OF TWO RESIDUAL TSV REDUNDANCIES

when two residual TSV redundancies are available. Table IIshows the coverage difference when the number of inputs ofpartial compactors is two, three, and five in the case of a TSVset that includes six TSVs. The result of a four-input compactoris the same as that of a two-input compactor. The compactorsreceive only mismatched values simultaneously in the case of sixdefects or errors occurrence because the mismatched values aretransmitted to all the signals. Therefore, the compactors whichhave odd-numbered inputs receive odd-numbered mismatchedvalues, and they detect the six defect or error occurrence. Witha full XOR tree and a second XOR tree, different second XOR

trees result in different detectable cases, but the total numberof detectable cases is constant when the number of signals ina TSV set is fixed and also identical. Therefore, the overalldefect or error coverage is fixed at 76.2%, as shown in Table I.The compactor with three inputs will be the most useful if theprobability is higher that fewer defects or errors occur. However,the compactor with five inputs can be the best one if defects orerrors are usually generated in an assembled group.

Table III shows the defect or error coverage results with vari-ous numbers of TSVs in a TSV set when there are two remainingTSV redundancies. The compactors that can catch fewer defectsor errors are chosen. The overall coverage of all cases is similar,approximately 50%. In addition, the defect or error coveragesaccording to the number of defects or errors are steady near50%.

Area cost comparison is presented in Table IV. To verifyhardware cost for the proposed scheme, the SAED 32/28 nm

TABLE IVHARDWARE COST COMPARISON (CELLS)

TABLE VCOMPARISON BETWEEN SET-LEVEL AND R-SHARING R2-TSV

EDK, which is an open educational design kit, is employed.The number of signal TSVs is assumed to be 128, 256, and512. For the redundancy-sharing R2-TSV, all signal TSVs areincluded in a group. Additionally, it is assumed that a TSVset composed of four signal TSVs and one redundant TSV, asshown as Fig. 6(a). The 1-D repair structure is small comparedto the 2-D repair structure because 2-D repair requires three3-to-1 MUXes for the signal TSVs. HW1add stands for theadditional hardware cost of the basic R2-TSV, and HW2addmeans that of redundancy-sharing R2-TSV. HW2add is muchgreater than HW1add because the redundancy-sharing R2-TSVincludes multiple-output compactors that are much larger thanthe SOCs.

As shown in Table V, a simulation was executed to comparethe redundancy-sharing R2-TSV with the set-level R2-TSV. Inthis simulation, a TSV set is composed of four signal TSVs andone redundant TSV, and a redundancy-sharing R2-TSV groupincludes 128 signal TSVs and 32 redundant TSVs, as shown inFig. 6(a). The TSV defect rate is assumed to be 0.001 in this sim-ulation. The redundancy-sharing R2-TSV uses multiple-outputcompactors, so it detects all two defects or errors additionally.Commonly, the defect rate and error probability for TSVs islow, and so the occurrence of four or more defects or errorsis extremely rare. For a full detection, all redundancies shouldbe available for the basic R2-TSV, but only eight redundanciesare required for redundancy-sharing R2-TSV. Thus, there is alarge difference in full detection probability. In fact, the proba-bility value for redundancy-sharing R2-TSV is close to 100%.To clarify this point, the full detection failure probabilities arecalculated in Table VI. Defect rate of the TSVs was varied from0.0001 to 0.03 within the practical TSV defect rate range men-tioned in [6].

Table VI shows how small the full detection failure prob-ability is. In the identical condition of simulation related toTable V, the full detection failure probability depends strongly

PARK et al.: R2-TSV: A REPAIRABLE AND RELIABLE TSV SET STRUCTURE REUTILIZING REDUNDANCIES 465

TABLE VIPROPORTION ANALYSIS OF FULL DETECTION FAILURE IN R-SHARING R2-TSV

TABLE VIIPROPORTION ANALYSIS OF FULL DETECTION FAILURE IN MASS TSVS

on the IC process quality. Full detection probability is degener-ated as the TSV defect rate becomes worse. However, even inthe worst case, the failure probability is still very low.

Table VII shows that the R-sharing R2-TSV set can be appliedpractically to products even if the products contain huge numberof TSVs. The TSV defect rate is varied from 0.0001 to 0.01 forevaluation in various condition of 3-D IC process quality. Inthe same manner with Table VI, the full detection failure rateis estimated, and a group of R-sharing R2-TSV set includes128 signal TSVs and 32 redundancies, as shown in Fig. 6(a).In the high-quality process, the failure rate is ignorable evenwith 2560 signal TSVs. On the other hand, low-quality processcauses much higher failure rate, but this rate values are still notenough to bring big concerns.

The additional hardware cost can bring reliability degrada-tion. It is known that this degradation increases in linear pro-portion to physical hardware overhead [23]. Table VIII showsphysical hardware cost estimation of three cases of TSV setstructures. For this hardware cost analysis, three 3-D IC de-signs, CKT_A, CKT_B, and CKT_C are employed, and alldesigns contain hundreds of TSVs. At first, the repair structurerequires about 1% hardware overhead compared with the de-sign with only signal TSVs. This overhead includes additionalarea for redundant TSVs. R-sharing R2-TSV set needs extrahardware for building reliability enhancement circuits, and the

TABLE VIIIHARDWARE COST ANALYSIS IN SAMPLE CIRCUITS

TABLE IXYIELD ANALYSIS

increment rate of hardware area is estimated as shown in thelast column. In this experiment, the R-sharing R2-TSV requiresaround 2% more hardware area, and then the reliability degrada-tion is expected as much as the area increment. This cost is notan ignorable drawback from the proposed TSV set implemen-tation. However, the yield enhancement from the TSV repairsolution is enormous, as shown in Table IX. In this simulation,the TSV defect rate is set up as 0.001. This enhancement ismuch higher than the cost from additional hardware area, so theTSV repair structure is highly efficient in the view of cost. Inthe TSV set structures which support TSV repair, the R-sharingR2-TSV structure requires more hardware area by about 0.7%than the only repairable TSV set. But, the online test after ICmanufacturing is available in the R-sharing R2-TSV structure.Furthermore, the proposed scheme raises system reliability bysoft error detection. Therefore, the proposed scheme is cost ef-fective even though the additional hardware area is required.

V. CONCLUSION

In the 3-D IC manufacturing flow, the TSVs that containdefects are repaired by using TSV redundancies after faultyTSVs are analyzed in the TSV test. In the previous repairableTSV set, there is no other use for unused TSV redundancies ina TSV repair. These residual TSV redundancies can be utilizedwith a new TSV set. In this paper, a new TSV set structure,R2-TSV is proposed, which raises the reliability of 3-D ICs byreutilizing residual TSV redundancies. R2-TSV is still repairableby supporting any TSV repair structure, and it is reliable bysupporting online test and soft error detection.

At first, set-level R2-TSV is introduced, and it is applied toan each TSV set with a SOC. Moreover, the extended set-levelstructure is suggested to increase defect or error detection cov-erages. Finally, to maximize the efficiency of TSV redundancyutilization, the redundancy-sharing structure is proposed usingmultiple-output compactors. This TSV set structure guaranteesfull detection possibility over 99.9% in the practical TSV im-plementation environment.

466 IEEE TRANSACTIONS ON RELIABILITY, VOL. 66, NO. 2, JUNE 2017

TABLE XPROPORTION ANALYSIS OF FULL DETECTION FAILURE IN R-SHARING R2-TSV

As mentioned in Table X, R2-TSV including set-level andredundancy-sharing structures supports TSV repair for satisfy-ing yield, and utilizes unused TSV redundancies to improvereliability of TSV set. In addition, the reliability improvementresults from online test and soft error detection with R2-TSV,and, especially practical and stable reliability guarantee can beachieved in redundancy-sharing R2-TSV. In the proposed TSVset structure, test results are collected from two outputs of setstructure, ET and EU , and the data from the two outputs can beanalyzed in different priority according to time cost importance.However, an extra hardware area is requested for compactors andswitch or fuse boxes. R2-TSV is expected to be more promisingas the significance of system reliability rises.

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Jaeseok Park received the B.S. degree in electrical and electronic engineeringfrom Yonsei University, Seoul, South Korea, in 2008. He is currently workingtoward the combined Ph.D. degree in the Department of Electrical and ElectronicEngineering, Yonsei University.

His current research interests include design for testability, built-in self-test,reliability, test algorithms, through-silicon via test, through-silicon via repair,and very large scale integration design.

Minho Cheong received the B.S. degree in electrical and electronic engineeringfrom Yonsei University, Seoul, South Korea, in 2015. He is currently workingtoward the combined Ph.D. degree in the Department of Electrical and ElectronicEngineering, Yonsei University.

His current research interests include through-silicon via repair, reliability,and very large scale integration design.

Sungho Kang (M’89–SM’15) received the B.S. degree from Seoul NationalUniversity, Seoul, South Korea, and the M.S. and Ph.D. degrees in electricaland computer engineering from the University of Texas at Austin, Austin, TX,USA, in 1992.

He was a Research Scientist in the Schlumberger Laboratory for ComputerScience, Schlumberger Inc., Austin, and a Senior Staff Engineer with Semi-conductor Systems Design Technology, Motorola Inc., Austin. Since 1994, hehas been a Professor in the Department of Electrical and Electronic Engineer-ing, Yonsei University. His current research interests include very-large-scaleintegration/system-on-chip/3-D IC design and testing, design-for-testability,design-for-manufacturability, and fault tolerant computing.


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