5 PERFORMANCE OF THE DPFC BEFORE AND DURING SERIES ... · The performance of DPFC is improved by...

International Journal of Electrical Engineering and Technology (IJEET), ISSN 0976 – 6545(Print),

ISSN 0976 – 6553(Online) Volume 6, Issue 1, January (2015), pp. 49-62 © IAEME

49

PERFORMANCE OF THE DPFC BEFORE AND DURING

SERIES CONVERTER FAILURE

K. Venkata Nagaraju #1

Assistant Professor, Dept. of Electrical & Electronics Engineering,

Guntur Engineering College, YanFamadala, Guntur, A.P, India

B. Anji Babu #2

Assistant Professor, Dept.of Electrical & Electronics Engineering,

Narasaraopet Engineering College, Narasaraopet, Guntur, A.P, India

P. Prabhakara Sharma #3

Assistant Professor, Dept.of Electrical & Electronics Engineering,

Kallam Haranadhareddy Institute of Technology, Chowdavaram, Guntur, A.P, India

ABSTRACT

Distributed Power Flow Controller (DPFC) is one of the devices within the FACTS family.

DPFC is resulting from the UPFC. The DPFC having much control capability like UPFC, however at

much reduced cost and an improved reliability. The DPFC comprises the adjustment of the

transmission line parameters i.e. impedance of the line, the transmission angle, and the bus voltage.

The DPFC can be designed with multiple single phase series converters and one three phase shunt

converter. Before the series converter failure, the DPFC control the active power exchange between

the shunt and series converter that are through the transmission line at the 3rd harmonic frequency.

During the series converter failure, the DPFC continue to control the active and reactive power

exchange between the converters with the adapted control schemes. This paper presents performance

of the DPFC before and during the failure of single series converter. The failure of single series

converter can cause flow of negative and zero sequence currents at fundamental frequency. Adapted

control schemes are employed to each series converters, which can automatically suppress the

negative and zero sequence currents and keeps the DPFC system stable during the series converter

failure. The reliability of the DPFC system is further improved by the use of multiple single phase

series converters with the adapted control schemes.

INTERNATIONAL JOURNAL OF ELECTRICAL ENGINEERING &

TECHNOLOGY (IJEET)

ISSN 0976 – 6545(Print)

ISSN 0976 – 6553(Online)

Volume 6, Issue 1, January (2015), pp. 49-62

© IAEME: www.iaeme.com/IJEET.asp

Journal Impact Factor (2014): 6.8310 (Calculated by GISI)

www.jifactor.com

IJEET

© I A E M E



50

Index Terms: Power Flow Control, Flexible AC Transmission System, Current Control,

symmetrical component, Voltage Source Converter, Power-transmission control, Distributed Power

Flow Controller, Unified Power Flow Controller.

I. INTRODUCTION

Nowadays the power system becomes very complex due to the increasing load demand of the

electricity and the aging of the networks. There is a great desire for the power flow control in the

transmission lines with fast operation and reliability [1]. All the FACTS devices can be utilized for

the control of power flow in the transmission system. UPFC (Unified Power Flow Controller) is one

of the power flow controller in the FACTS family, which can control the transmission line

impedance, transmission angle and bus voltage[2].The UPFC having both the series and shunt

converter with a commonly coupled DC link is used for bidirectional power flow. The series

converter injecting the voltage into the transmission line causes the active and reactive power

injection or absorption between the series converter and transmission line. The devices used in UPFC

with high voltage and current rating are costly.

The Distributed Power Flow Controller (DPFC) is one of the device with in FACTS family,

which is derived from the UPFC. As compared with the UPFC, DPFC has the same controlling

capability to change all the parameters within the transmission system. In case of DPFC the

commonly connected DC link between series and shunt converter is eliminated and application of D-

FACTS[3] concept to series converter shown in Fig.(a).The active power exchange between the

converters is at 3rd

harmonic frequency. The D-FACTS concept not only reduces the ratings of the

devises but also improves the reliability of the system because of redundancy and reducing the cost

of high voltage isolation.

Fig.(a): DPFC configuration

The reliability of the DPFC is improved because of the redundancy of the series converters

before failure. If any one of the series converters fails, that will stop voltage injecting into the

transmission line and the other series converter units will continue the operation. The performance of

DPFC is improved by considering better control scheme during the series converter failure. The

control schemes adapted for dpfc corresponding simulation results before and after the failure of any

one series converter unit are also presented.

II. DPFC PRINCIPLE

The DPFC is derived from the UPFC by considering two approaches as follows. First,

eliminating commonly connected dc link of UPFC, second distributing series converter with D-

FACTS concept to series converter, which consists of multiple units that are connected in series with

the transmission lines as shown in Fig.(b).



51

Fig. (b): Flow chart from UPFC to DPFC.

The distributed series converter can inject a voltage with controllable magnitude and phase

angle over 3600. The shunt converter injects the harmonic currents to the grid and provides active

power required for the series converter units. In case of UPFC the active power exchange takes place

between the series and shunt converter through common dc link freely. while maintaining the same

control capability as that of UPFC the dc link between the converters is eliminated.

Fig.(c): Active power exchange between DPFC converters.

Within the DPFC, transmission line is acting as a common connection to exchange the active

power between the ac terminals of series and shunt converter, as shown in Fig.(c). According to the

Fourier analysis, a nonsinusoidal voltage and current can be expressed as sum of sinusoidal functions

with different amplitudes in different frequencies. The active power is defined as the mean value of

the product of voltage and current. Since the integrals of all the cross product of terms with different

frequencies are zero, the active power can be expressed by:

� = ∑ ��∞�� cos ∅� (1)

where Vi and Ii are the voltage, current at the i th harmonic frequency and Φi is the angle between

voltage and current. The active power at different frequencies is isolated from each other and the

voltage or current at one frequency does not influence the active power at other frequencies. The

independency of the active power at different frequencies gives the opportunity that a converter

without power source can generate active power at one frequency and absorbs other frequencies.

The shunt converter can absorb active power from the grid at fundamental frequency and

injects currents into the grid at harmonic frequency. Similarly the series converter injects the

voltages into the grid at fundamental frequency and absorbs the active power from the grid at

harmonic frequency.

The 3rd

harmonic is selected to exchange the active power between the converters through

transmission line because it is a zero sequence harmonic that can easily blocked by the use of Υ-∆

transformers, which are used for change the voltage levels. The high pass filters are used to allow the

harmonic currents and blocks the fundamental currents.



52

The concept of D-FACTS is to use multiple numbers of controllers with low rating instead of

one large rated controller. This will improve the reliability and reduce the cost of high voltage

isolation between phases.

III. DPFC BEHAVIOR BEFORE SERIES CONVERTER FAILURE

In this section the steady state behavior of the DPFC before series converter failure is

analyzed and the controlling capability of the DPFC is expressed in terms of both the transmission

network and DPFC parameters. This section starts with simplification of the DPFC and then

analyzed of the circuit at the fundamental and 3rd

harmonic frequency.

Fig. (d): DPFC simplified representation.

To simplify the DPFC, the shunt and multiple series converters are replaced by voltage

sources at different frequencies in series with the line impedance. It is represented by two series

connected controllable ac voltage sources at fundamental and third harmonic frequency. The

simplified representation of the DPFC is shown in Fig.(d).

The DPFC is placed in a two-bus system with the sending end and the receiving end voltages

as Vs and Vr respectively. The transmission line is replaced by an inductance L with the line current I.

All the series converters of the DPFC are injected at the fundamental frequency voltage Vse,1 and at

the third harmonic frequency voltage Vse,3. The shunt converter is fed to the sending bus with the

inductor Lsh. and generate the voltages Vsh,1 and Vsh,3 . The current injected by the shunt converter into

the sending is Ish. The active and reactive power flow at the receiving end is Pr and Qr.

For an easier analysis, based on the superposition theorem, the simplified representation of

the DPFC can be further simplified by being split into fundamental frequency circuit and third

harmonic frequency circuit, as shown in Fig.(e).

Fig. (e): DPFC equivalent circuit. (a) Fundamental frequency. (b) Thirdharmonic frequency



53

A. Fundamental Frequency Circuit

In this case the DPFC circuit is analyzed at fundamental frequency. The control capability of

the DPFC is examined and the relationship between control range and the exchanged active power is

found. The power flow control capability of the DPFC can be illustrated by the active power Pr and

reactive power Qr at the receiving end as shown in Fig.6. The behavior of the DPFC is similar to that

of UPFC, the active and reactive power flows are expressed as follows:

Where Pr0 ,Qr0 are the active, reactive power flow, and θ is the transmission angle of the

uncompensated system. The locus of the power flow without the DPFC compensation f (Pr0,Qr0 ) is a

circle with the radius of |V |2/|X1| around the center in the PQ-plane. Each point of this circle gives

the Pr0 and Qr0 values of the uncompensated system at the transmission angle θ. The control range of

Pr and Qr is obtained from a complete rotation of the voltage Vse,1 with its maximum magnitude. Fig.

(f).Shows the control ranges of the DPFC with the transmission angle θ.

Fig. (f): DPFC active and reactive power control range with the transmission angle θ

The active power required by the series converter as follows:

Where Φr0 is the power angle at the receiving end of the uncompensated system. The maximum

active power is obtained with the following equation:

Where crS ,

is the control range of the DPFC, which is given by

crcrcr jQPS ,,, max +=

Accordingly, the control range of the DPFC is proportional to the maximum of the active

power exchange. Fig. (g). Illustrate the maximum active power requirement of the series converters.

2

1

1,22

0 )()(

=−+−X

VVQQPP

se

rorrr

)sin()Re( 002

1*

11,1, rrrr

r

sese SSV

XIVP Φ−Φ==

crr

r

se SSV

XP ,02

1

max,1, =

(2)

(3)

(4)

(5)



54

B. Third harmonic Frequency Circuit:

The third harmonic component within the DPFC system is used to generate active and

reactive power between the series and shunt converters. The observed active and reactive power at

3rd

harmonic frequency can be expressed as:

Fig. (g): Maximum active power requirement of the series converters.

��,� = ��,��,��′ sin �� (6) ��,� = ��,��′ ��,�� cos �� − ��,��(7)

and ��,�� = ��,�� cos ��

Substituting the value of ��,�� in equation (6) gives

��,� = ��,�� ′ cos θ� sin �� (8)

The maximum voltage of the series converters at the third harmonic frequency should fulfill

the following condition:

��,�,"#$� ≤ ��,�,"#$�(9)

C. Controllers for DPFC:

To control the multiple converters, DPFC consists of different types of controllers: they are

central controller, shunt controller and series controller, as shown in Fig.(h).



55

1) Central controller: At the fundamental frequency, it generates the voltage reference signal

for the series converter and current reference signal for shunt converter.

Fig. (h): DPFC control block diagram.

2) Shunt controller: The main function of this controller is to inject harmonic current into the

line to provide active power for the series converters. The fundamental frequency control aim

is to inject reactive power to grid and maintains the voltage across dc capacitor constant.

Fig. (i): Block diagram of the shunt converter control

3) Series controller: Each series converter has its own series controller to maintain the capacitor

dc voltage of its own converter by using the third-harmonic frequency components and to

generate series voltage at the fundamental frequency that is prescribed by the central control.

The 3rd

harmonic current flowing through the line is selected as the rotation of reference

frame for the single-phase park transformation, because it is easy to be captured by the phase

locked loop (PLL) in the series converter. The frequency of the ripple depends on the

frequency of the current that flows through the converter.

Fig.(j): Block diagram of the series converter control



56

IV. DPFC BEHAVIOR DURING SERIES CONVERTER FAILURE

A series converter failure is a fault that occurs within the series converter. When the

transformer has isolation failure, the switch is short circuited; the converter short circuits the

network. The short circuit for the series converters is not a problem because it will not interrupt the

power flow in the transmission line. However, the series converters have an open circuit large

impedance, which will be inserted into the transmission line, thereby influencing the total network.

To prevent an open circuit from being created, a bypass circuit is provided for each series converter.

The bypass circuit parallels the output terminals of the series converter. If the series converter has an

open circuit, the bypass circuit will be connected and short circuit the series converter with respect to

the transmission line.

At this condition the voltage injected by all the series converters turn into unbalance between

the phases. The unbalanced voltages can cause flow of unsymmetrical currents in the line, thereby

decreasing power quality of the network. The number of series converter units per phase is m and the

total voltage injected by all the series converters is Vse . The voltage injected by failed converter in

phase a is given by:

'�� = () − *) '��,#'��,+'��,, -(10)

where k is the number of failed converter in phase a. This unbalanced series voltage can be

represented by using sequence analysis as:

'�� = 0'��1'��2'��3 4(11)

Therefore, the unbalanced line current at the fundamental frequency caused by the series

converter failure is:

05615625634 = 01 761⁄ 0 00 1 762⁄ 00 0 1 763⁄ 4 0'� − '9 + '��1'��2'��3 4(12)

The line current consists of both the negative and zero sequence components during the

single series converter unit failure. Their magnitudes depend on the negative and zero sequence line

impedance and the number of failed converters. The series converter will influence the current at the

third harmonic frequency. The active power between the phases is dissimilar because the failed

series converter does not require active power which results a change of third harmonic current. To

eliminate the 3rd

harmonic current outflow and balance the unsymmetrical current at the fundamental

frequency, a supplementary controller is needed.

A. Control scheme to improve the performance

The basic principle of the supplementary control is to allow the remained converters in the

line with the fault converters inject more voltages to maintain the voltage balance between phases at

the fundamental frequency. Because the series converters are centralize controlled, this

supplementary control is inside the central controller. There are two requirements of the

supplementary control:



57

• The controller should be able to differentiate the phase with the faulty converter and gives

voltage reference signals for other converters in the faulty phase.

• The reference signals for the converters in various phases should be independent to enable the

series converters in one phase to generate different voltage than the remaining phases.

One approach to compensate for converter failure is to let series converters report their status

of operation back to the central control. The central control generates reference signals to the number

of lively converters for each phase. However, there are two foremost drawbacks to this method. First,

this method extremely relies on the communication between the series converters and the central

controller. Any false report will lead to an erroneous compensation. Second, the failed series

converter is not pure short circuit and due to the single-turn transformer, there will be a small

inductance inserted, and this inductance cannot be compensated by this method.

The proposed control scheme is based on the fact that, the failure of a one series converter

will lead to unsymmetrical current at the fundamental frequency. By controlling both the negative

and zero sequence current to zero, the failure of the series converter is automatically compensated.

For this purpose, two current control loops are added to the existing DPFC controller to control zero

and negative sequence currents to zero. These two supplementary controllers are situated in the

central controller to operate all the converters. The control scheme of the central control with these

supplementary controllers is shown in Fig. (k).

Fig. (k): Control scheme for unbalance compensation

The sequence analyzer processes the three-phase line current. The purpose of the positive

sequence current is used for power flow control. If a series converter fails, both the current

controllers force the negative and zero sequence currents to become zero. The voltages created by the

two controllers are added with the positive voltage to make the reference signals for the series

converters in different phases.

B. Controller design

A well-liked method for current control - synchronous PI control is suitable for the zero and

negative sequence controller because of the simplicity for implementation [4]. In steady state the ac

voltages and currents are constant and these are transforming into rotating reference frame. The

conventional Park transformation is used for the negative components and single-phase Park

Transformation [5],[6],[7] is used for zero sequence currents. The simplified structure of zero and

negative sequence network with the DPFC can be represented as shown in Fig.(l).

The unbalanced zero and negative sequence voltage injected by DPFC series converters

represented with dq –transformation as:



58

'��,<,9�=3,2 = >63,25?,<3,2 + @63,2 <�A,BC,D<E − F@63,25?,<3,2 − '��,<3,2

'��,G,9�=3,2 = >63,25?,G3,2 + @63,2 H5?,G3,2HI − F@63,25?,G3,2 − '��,G3,2

Fig.(l): Simplified zero and negative sequence network with the DPFC

The transfer function from voltage to current for both d-q components can be found as:

J(K) = �LMC,D1�NMC,D

The current control parameter is calculated by internal model control method (IMC)[8],[9].

The control scheme of the unbalanced current control scheme is illustrated in Fig.(m). The function

F(s) is the controller function and can be calculated by IMC method as:

O<3,2(K) = P<3,2@63,2 + P<3,2(>63,2 + ><3,2)/K OG3,2(K) = PG3,2@63,2 + PG3,2(>63,2 + >G3,2)/K

Where αd, αq are the band width for d and q components control respectively.

Fig:(m): Unbalanced current control scheme

IV. SIMULINK MODELING AND RESULTS OF DPFC

The simulation has been done to verify the principle and control of the DPFC before and

during the series converter failure as shown in Fig.(n). The DPFC is tested between two buses. The

principle of the DPFC is verified at steady state and step response. Fig.(p). shows all the series

(14)

(15)

(13)



59

converters inject the voltages into the lines and Fig.(o). Shows line currents at the fundamental

frequency that are observed in steady state.

Fig. (n): Simulation model of the DPFC with single series converter failure

Fig. (o): Line current at the fundamental frequency

Fig. (p): Voltages injected by all series converters.

From Fig.(q).to Fig.(s). Represents the harmonic current injected by the shunt converter at

harmonic frequency, series converter voltage and active and reactive power injected by the series

converter at the fundamental frequency are observed in step response.

Fig.(q): Step response of the DPFC: line current



60

Fig.(r): Step response of the DPFC: series converter voltage

Fig. (s): Step response of the DPFC: active and reactive power injected by the series converter at the

fundamental frequency

All the series converters are generated 0.012pu voltage at the fundamental frequency. At time

(t) =1s, one of the series converter is short circuited. The system performance with and without the

supplementary controller is presented. Fig.20. shows the three-phase current at the delta side of the

transformer at the fundamental frequency. One series converter has a fault in phase a at this

condition, the control signals required for phase a should be two times larger than that of the control

signals under pre-fault condition. The magnitude of the series converter reference voltage and

voltage injected by all series converters are shown in Fig. (u).and Fig. (v).

Fig. (t): Three-phase current at the delta side of transformer



61

Fig.(u): The magnitude of the series converter reference voltage

Fig. (v): The magnitude of the voltage injected by all series converters

V. CONCLUSION

This paper analyzed the performance of the DPFC before and during a failure of a single

series converter unit. Series converters have over-voltage protection at the secondary side of the

single-turn transformer. Therefore the failed series converter appears short-circuit to the transmission

line and the voltage injection is unbalanced between phases. Because of this unbalance, the power

network becomes asymmetric thereby resulting unsymmetrical current at the fundamental frequency.

Also, the third harmonic current that used to be zero sequence contains positive and negative

components thereby leaking to rest of networks. A supplementary control scheme is proposed to add

at the DPFC central control to improve the DPFC performance during series converter failure. Its

principle is to monitor the zero and negative sequence components of the line current and control

them to be zero. The control scheme has been simulated in MATLAB, and it is proved that the

asymmetric caused by the series converter failure can be totally compensated.

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and S. G. Ian, “A distributed static series compensator system for realizing active power flow

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[4] M. Milosevic, G. Andersson, and S. Grabic, “Decoupling current control and maximum

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International Journal of Electrical Engineering and Technology (IJEET), ISSN 0976

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Power Electronics Specialists

2004, pp. 214–220 Vol.1.

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[11] Satyendra Kumar, Dr.Upendra Prasad and Dr.Arbind Kumar Singh, “Employing Facts

Devices (UPFC) For Transient Stability Improvement” International Journal of Electrical

Engineering & Technology (IJEET), Volume 4, Issue 3, 2013, pp. 188

0976-6545, ISSN Online: 0976

AUTHOR’S DETAIL

K.Venkata Nagaraju

Engineering from QIS Colleg

in the year 2011 and M.Tech with Power Systems Engineering from

College of Engineering, Guntur, Andhra Pradesh, India in 201

working as an Assistant Professor in

Engineering, Guntur

B.Anji babu has obtaned B.Tech degree in

from QIS College of engineer

2011 and Post Graduation M.Tech

J.C. College of Engineering, Guntur

as Assistant Professor in Narasarao

Electronics Engineering, Guntur, since

Prabhakara Sharma.Pidatala

and Electronics Engineering from ANU Numbur,

of Technology in High Voltage Engineering from University College of

Engineering, JNTU

includes Power systems,

currently working as an Assistant Professor in Electri

Engineering Department in Kallam Haranadhareddy

Chowdavaram, Andhra Pradesh, India.

al Engineering and Technology (IJEET), ISSN 0976

6553(Online) Volume 6, Issue 1, January (2015), pp. 49-62 © IAEME

62

J. Salaet, S. Alepuz, A. Gilabert, and J. Bordonau, “Comparison between two methods of dq

on for single phase converters control. Application to a 3-level boost rectifier,” in

Power Electronics Specialists Conference, 2004. PESC 04. 2004 IEEE 35th Annual

“A robust single-phase pll system with stable and fast tracking,”

Applications, IEEE Transactions on, vol. 44, no. 2, pp. 624–633, 2008.

Szczesny, and M. Dame, “A grid simulator with control of single

-q rotating frame,” in Power Electronics Specialists Conference,

IEEE 33rd

Annual, vol. 3, 2002, pp. 1431–1436 vol.3.

Namho, J. Jinhwan, and N. Kwanghee, “A fast dynamic dc-link power-balancing scheme

inverter system,” Industrial Electronics, IEEE Transactions on

R. Ottersten, “On control of back-to-back converters and sensorless induction machine

drives,” Phd Thesis, Chalmers University of Technology, 2003. Compensator, IEEE Trans,

Applications. Volume 25, No.2, 1989, PP:356-65.

K.Pounraj, Dr.V.Rajasekaran and S.Selvaperumal, “Fuzzy Co-Ordination of UPFC for


Technology (IJEET), Volume 3, Issue 1, 2012, pp. 226 - 234, ISSN Print: 0976

Satyendra Kumar, Dr.Upendra Prasad and Dr.Arbind Kumar Singh, “Employing Facts


Engineering & Technology (IJEET), Volume 4, Issue 3, 2013, pp. 188 -

6545, ISSN Online: 0976-6553.

.Venkata Nagaraju has obtaned B.Tech degree in Electrical & Electronics

Engineering from QIS College of engineering and technology, Ongole, A.P,

and M.Tech with Power Systems Engineering from

College of Engineering, Guntur, Andhra Pradesh, India in 201

Assistant Professor in Department of Electrical & Electronics

, Guntur Engineering College, Guntur, since 2013.

has obtaned B.Tech degree in Electrical & Electronics Engineering

ege of engineering and technology, Ongole, A.P, India in the year

Post Graduation M.Tech in Power systems Engineering from

J.C. College of Engineering, Guntur in the year of 2013. He is currently working

as Assistant Professor in Narasaraopet Engineering College, Dept. of Electrical &

Engineering, Guntur, since 2013.

Prabhakara Sharma.Pidatala obtained his Bachelor of Technology in Electrical

and Electronics Engineering from ANU Numbur, India. He completed his Master

logy in High Voltage Engineering from University College of

Engineering, JNTU-Kakinada, Andhra Pradesh, India. His area of interest

includes Power systems, Renewable Energy Sources, FACTS Devices. He is

currently working as an Assistant Professor in Electrical and Electronics

Engineering Department in Kallam Haranadhareddy Institute of

Andhra Pradesh, India.

al Engineering and Technology (IJEET), ISSN 0976 – 6545(Print),

between two methods of dq

level boost rectifier,” in

onference, 2004. PESC 04. 2004 IEEE 35th Annual, vol. 1,

tracking,” Industry

with control of single-

Power Electronics Specialists Conference,

balancing scheme

Industrial Electronics, IEEE Transactions on, vol. 48,

ers and sensorless induction machine

Compensator, IEEE Trans,

Ordination of UPFC for


234, ISSN Print: 0976-6545, ISSN

Satyendra Kumar, Dr.Upendra Prasad and Dr.Arbind Kumar Singh, “Employing Facts


199, ISSN Print:

Electrical & Electronics

Ongole, A.P, India

and M.Tech with Power Systems Engineering from R.V.R & J.C.

College of Engineering, Guntur, Andhra Pradesh, India in 2013.He is currently

Department of Electrical & Electronics

Electrical & Electronics Engineering

ing and technology, Ongole, A.P, India in the year

in Power systems Engineering from R.V.R &

He is currently working

pet Engineering College, Dept. of Electrical &

obtained his Bachelor of Technology in Electrical

India. He completed his Master

logy in High Voltage Engineering from University College of

Kakinada, Andhra Pradesh, India. His area of interest

Renewable Energy Sources, FACTS Devices. He is

cal and Electronics

Institute of Technology,

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