531 Sample Lecture

D.K. Schroder, Semiconductor Device Theory - 1

MOS Capacitors

-VG1 VG2 VG3p-Type

-VG1

Accumulation

Layer

VG2

Depletion

Region

VG3

Inversion

Layer

s

s s


Energy Band Diagram

When metal, oxide, and

semiconductor are

brought together, we get

the band diagram below

This band diagram is very

important; it will be used

over and over to discuss

MOS devices

Energy:

Voltage or Potential: E

nerg

yV

olt

ag

e

EC

EV

EF

Ei

EV

EC

Electron Affinity

Work Function M

M O Sx

For SiO2: 9 eV

For Si: 1.1 eV

p-Type

GateOxide


Energy and Potential Band Diagrams

To discuss MOS devices we need to understand band diagrams

Band diagrams are at the heart of MOS devices; difficult to

understand

Consider the energy band diagram as a potential band diagram

The substrate is grounded and a positive gate voltage VG is

applied to the gate

Part of VG is dropped across the oxide, Vox, and part across the

semiconductor, known as the surface potential, s

En

erg

y

EC

EV

EF

Ei

x

Vo

ltag

e, P

ote

nti

al

VG

F

x

Vox

s

(Surface potential)

VG=V

ox+

s


Potential Band Diagram

Potentials

Semiconductor potential (intrinsic energy level): , taken as the reference potential = 0

Surface potential (intrinsic energy level at the surface): s

Fermi potential:

Oxide potential: Vox Gate voltage: VG VG = Vox + s

V,

VG

F

0 W x

Vox

s

tox

The Fermi level is flat, because there is no current

(assume the oxide is a perfect insulator)

i

AF

n

N

q

kTln


Band Diagrams

As the gate voltage is changed, the surface condition

changes from accumulation through depletion to

inversion

-VG1 VG2 VG3p-Type

-VG1

Accumulation

Layer

VG2

Depletion

Region

VG3

Inversion

Layer

s

s s


MOS-C Equations

The electron/hole densities are

Poissons equation is

where

Poissons equation can be written as

kTq

i

kTq

iFF ennenp /)(/)( ;

i

ADUUUU

os

i

os

AD

n

NNee

K

qn

K

NNnpq

dx

dFF

)()( )(

FFFF UUUUUUDi

eeeeLdx

Ud )(22

2

2

1

kTqUkTqUkTqU ssFF /,/,/

FF U

i

A

i

U

i

D

ii

osDi e

n

N

n

pe

n

N

n

n

nq

kTKL ;;

2 2


More Equations

Using the identity

gives

After integration

The electric field is then

FFFF UUUUUUDi

eeeeLdx

Ud )(22

2

2

1

Di

Fsss

L

UUF

q

kTU

dx

dU

q

kT ),(

2

2

2

2

1

dx

dU

dU

d

dx

Ud

)()(1 )(2

2

FFFFFF UUUUUUUU

Di

eeeeUeeLdx

dU

U

UUUUUU

Di

dxdU

dUeeeeLdx

dUd FFFF

0

)(

2

/

0

21


The F Function

The F function, F(U,UF), is proportional to the electric field

F(Us,UF) is proportional to the surface electric field

)1()1(),( sUU

s

UU

Fs UeeUeeUUFsFsF

102

103

104

105

-0.2 0 0.2 0.4 0.6 0.8 1

F (

Us, U

F)

s (V)

Acc

um

ula

tio

n

Depletion

Inv

ers

ion

The F function

is the normalized

electric field


Charge

The surface can be accumulated, depleted, or inverted, depending on the surface potential

Di

Fsosssoss

L

UUF

q

kTKUKQ

),(

1010

1011

1012

1013

-0.2 0 0.2 0.4 0.6 0.8 1

|Qs|/

q (

cm

-2)

s (V)

Accumulation

Depletion

Inversion

2F

0

5 1011

1 1012

-0.5 0 0.5 1 1.5

|Qs|/

q (

cm

-2)

VG (V)

Accumulation

Depletion

Inversion

VT (S = 2F)

2/~ seQs

ssQ ~

2/~ seQs


Surface Potential/Gate Voltage

The gate voltage can be changed over a wide range;

it is ultimately limited by oxide breakdown

The surface potential can only be varied over a range

approximately equal to the band gap potential EG /q

s (Accumulation)

s (Inversion)

s (Flatband)

EG/q

-0.3

-0.1

0.1

0.3

0.5

0.7

0.9

1.1

-4 -3 -2 -1 0 1 2 3 4Su

rface P

ote

nti

al

(V)

Gate Voltage (V)

2F

Inversion

DepletionAccumulation

Flatband

VT

EG

/q

Di

Fs

ox

osssFBG

ox

s

ox

GoxoxsFBG

L

UUF

q

kT

C

KUVV

C

Q

C

QVVVV

),(;;


Capacitance

Capacitance is mea-

sured by applying a dc

voltage to bias the

device and an ac voltage

to measure the

capacitance

The time varying ac

voltage changes the

charge on the gate and

also the charge in the

semiconductor

What charge in the

inverted semiconductor

responds? Holes or

electrons?

C and Q are most commonly

in units of F/cm2 and C/cm2!

VG

vG ~

p

Cox Cs

QG

Qn Qb

Q

x

Minority

electrons

Majority

holes

C = dQ/dV


Which Carriers Respond?

Deep Depletion

Initially: no inversion

layer; to form inversion

layer, ehp need to be

thermally generated

t

VG

p -Type

+ + +

- --

NA

Initially: inversion layer;

inversion electrons are

not able to follow the

applied voltage. Majority

holes can follow.

VG

p -Type

~

vg

f 0.01-1 MHz

++++++

High Frequency

Initially: inversion layer;

inversion electrons are

able to follow the applied

voltage vg by thermal

generation

VG

p -Type

~

vg

f


MOS Capacitor

Capacitance consists of

Cox: oxide capacitance

Cp: accumulation capacitance

Cb: bulk (space-charge region) capacitance

Cn: inversion capacitance

Cit: interface trap capacitance

Cox

Cp

Cb

Cn

Cit

p


MOS Capacitor

The capacitance is

G

G

dV

dQC

itnbp

s

its

ox

dQdQdQdQ

d

dQdQ

dVC

1

itnbpox CCCCC

C

11

1

sox

its

G

its

G

G

ddV

dQdQ

dV

dQdQ

dV

dQC

The charge is

)( itnbpitsG QQQQQQQ

This gives


MOS Capacitance

Accumulation

Cp >> Cox

Depletion

Cb Cox Cit

Inversion low frequency

Cn >> Cox

Inversion high frequency

Cb Cox

Cox

Accumulation

Cox

Cp

Cb

Cn

Cit

Cox

Inversion - lf

Cox

Cp

Cb

Cn

Cit

Cox

Cp

Cb

Cn

Cit

Cb

Cox

Inversion - hf

Cox

Cp

Cb

Cn

Cit

Cox

Cb

Cit

Depletion


Low-Frequency Capacitance

The capacitance from these equations is the low-frequency capacitance, because the assumption is that the electrons in the inversion layer are able to follow the ac gate voltage

),(

)]1()1([

2

Fs

UUUU

Di

osss

UUF

eeee

L

KUC

sFsF

soxox

sox

ox

oxs

oxs

CCC

C

CC

C

CC

CCC

/1

1

/1

0

0.2

0.4

0.6

0.8

1

-4 -2 0 2 4

C/C

ox

VG (V)

s = 2Fs = F

Flatband

Accumul'nStrong

Inversion

Depletion

Weak Invers.

s

s

s

ss

dU

dQ

kT

q

d

dQC


High-Frequency Capacitance

At high-frequencies, the inversion layer electrons are unable to follow the ac gate voltage

The slowly varying dc voltage allows an inversion layer to form

),(

)1/()1(1

2

,

FS

UUUU

Di

osShfS

UUF

eeee

L

KUC

SFSF

S F

S

U

F

UUU

FSS

U

dUUUF

Ueee

UUFUe

0

3),(2

11

),(/1

0

0.2

0.4

0.6

0.8

1

-4 -2 0 2 4

C/C

ox

VG (V)

lf

hf


Deep-Depletion Capacitance

In deep-depletion, the gate voltage is applied so rapidly that the inversion layer charge, Qn, has not yet formed, i.e., Qn = 0

The device will return to equilibrium due to thermal electron-hole pair generation

For high-quality devices, this can take minutes to hours

o

oxiFBG

oxdd

V

CQVV

CC

)/(21

0

0.2

0.4

0.6

0.8

1

-4 -2 0 2 4

C/C

ox

VG (V)

lf

ddhf

Such devices are

used in charge-

coupled devices


Gate Depletion

Poly-Si gates are doped to 1019 1020 cm-3

For positive gate voltages, the gate depletes slightly

Adds additional series capacitance, CG

Leads to overall capacitance reduction in inversion

0

0.2

0.4

0.6

0.8

1

-4 -2 0 2 4

C/C

ox

VG (V)

1020

3x1019

ND = 1019 cm-3

SoxGox

ox

CCCC

CC

//1


Non Ideal MOS Work Function

Work function difference, MS

qSM

M S

)(

MSFBV

i

AGFFFB

n

N

q

kT

q

EsubstrgateV ln

2)()(

F

S

M

E

V,

VG=V

FBE

C

EV

EF

VG= 0


SiO2 and SiO2/Si Interface

Si, Si/SiO2 interface, SiO2 bulk, and oxide defect structure

Si

D

B

Hydrogen

A

C

A: Si-Si Bond

(Oxygen Vacancy)

B: Dangling Bond

C: Si-H Bond

D: Si-OH Bond

Oxygen

Dangling Bond

This looks

really messy!


Oxide Charges/Interface Traps

Charge Type Location Cause Effect on Devices

(1) Interface SiO2/Si Dangling Junction Leakage Current

Dit(cm-2 eV-1) Trapped Interface Bonds Noise, Threshold Voltage

Nit, Qit Charge Shift, Subthreshold Slope

(2) Fixed Close to Si+ (?)

Nf, Qf Charge SiO2/Si Threshold Voltage Shift

(cm-2, C/cm2) Interface

(3) Oxide In SiO2 Trapped

Not, Qot Trapped Electrons Threshold Voltage Shift

Charge & Holes

(4) Mobile In SiO2 Na, K, Li

Nm, Qm Charge Threshold Voltage Shift

x x x x + + + +

+ +

(1) (2)

(3)(4) SiO2

Si


Non Ideal MOS Oxide Charge

Oxide charges, Qox, Qf The flatband voltage due to oxide charge density rox

(C/cm3) is

For a charge sheet Qox (C/cm2) at distance x1 in the oxide

For charge sheet Qf at x = tox

ox

ox

ox

t

ox

oxox

FBC

Q

t

xdxxx

t

x

CV

ox

1

0

1)()(1

r

oxox t

ox

oxox

t

ox

oox

FB dxxt

x

Cdxxx

KV

00

)(1

)(1

rr

ox

fFB

C

QV


Non Ideal MOS Interface States

Interface state charge, Qit

Interface state charge depends on surface potential

Hence VFB also depends on s

Acceptors

Donors

0

0+

ox

sitFB

C

QV

)(

EC

Ei

EFEV-

0

0


Non Ideal MOS

The flatband voltage due to all effects is

Oxide charges and interface state charges are quite low today and the oxide capacitance is high

Can neglect VFB components due to these charges

VFB mainly due to work function difference

ox

sit

t

ox

oxoxox

fMSFB

C

Qdxx

t

x

CC

QV

ox )()(

1

0

r

i

AGF

GMSFB

n

N

q

kT

q

E

q

EV ln

22


Displacement / Electric Field

Consider two solids, one with

dielectric constant K1 and one

with dielectric constant K2

They meet at a plane

The plane has a sheet charge

density of Q C/cm2

The perpendicular flux

density D is continuous

across the interface

For an oxide/semiconductor

interface with Q = 0

QDD )( 21

):( 1

111

fieldelectricnormal

KD o

+

+

+

+

+

+

+

D

Q

K1 K2

QKK oo 2211

2211:0 oo KKQFor ssoxoxKK


Electric Field

The electric field in the semiconductor is

The electric field in the oxide is

At the oxide-semiconductor interface

With Kox = 3.9, Ks = 11.7, s = ox/3

)()(;;0

xWK

qNxdx

K

qNd

K

qN

dx

d

os

Ax

Wos

A

os

A

oxCxdx

d

10 )(;

ox

s

oxsssoxox

K

KKK

s

0 W x

oxs = ox/3


Review Questions

What is the surface condition, i.e., p-type, n-type, etc, for s = F ?

Why is the surface potential excursion limited to approximately the band gap potential?

When an MOS-C is biased into depletion or inversion, can one measure the voltage drop across the semiconductor, s?

What is the Fermi level behavior in the oxide?

Why can s not be much higher than 2F? Why are inversion electrons unable to follow the high-

frequency applied signal?

Why does the high-frequency capacitance saturate for positive gate voltages?

Does the deep-depletion C/Cox VG curve apply for high or low frequencies?

Gate depletion adds to the oxide capacitance. What can be done to eliminate this effect?

By how much does VFB change from an n+ to a p+ gate?

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531 Sample Lecture

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