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6 Working With Time Interrupts Counters and Timers

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    Working with time: interrupts,

    counters and timers

    Chapter Six

    Dr. Gheith Abandah 1

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    Outline

    Interrupts

    Interrupt Structures

    Interrupt Demonstration Program

    Dealing with Multiple Interrupt Sources

    Context Saving

    Counters and Timers

    Watchdog Timer

    Sleep Mode

    Dr. Gheith Abandah 2

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    General Interrupt Structure

    Dr. Gheith Abandah 3

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    The 16F84A Interrupt Sources

    Dr. Gheith Abandah 4

    1. External interrupt. It shares a pin with Port B,

    bit 0. It is edge triggered.

    2. Timer 0 overflow. It occurs when the timers

    8-bit counter overflows.

    3. Port B interrupt on change. This interrupts

    when a change is detected on any of the

    higher 4 bits of Port B.

    4. EEPROM write complete.

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    The 16F84A Interrupt Structure

    Dr. Gheith Abandah 5

    INTCON:

    SFR 0Bh

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    PIC Response to an Interrupt

    Dr. Gheith Abandah 6

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    Interrupt Demonstration 1 Page 1

    #include p16f84A.inc

    ;

    ;Port A all output

    ;Port B: Bit 0 = Interrupt input;

    org 00 ;Reset start

    goto start

    org 04 ;Int Service Routine start

    goto Int_Routine

    Dr. Gheith Abandah 7

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    Interrupt Demonstration 1 Page 3

    wait

    movlw 0a ;set up initial port output values

    movwf porta

    movlw 15

    movwf portagoto wait

    ;

    org 0080

    Int_Routine ;Int Service Routine continues heremovlw 00

    movwf porta

    bcf intcon,intf ;clear INTF - Important

    retfie

    end Dr. Gheith Abandah 9

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    Multiple Interrupts Identifying

    the Sourceinterrupt

    btfsc intcon,0 ;test RBIF

    goto portb_int ;Port B Change routine

    btfsc intcon,1 ;test INTF

    goto ext_int ;external interrupt routinebtfsc intcon,2 ;test T0IF

    goto timer_int ;timer overflow routine

    btfsc eecon1,4 ;test EEPROM write complete flag

    goto eeprom_int ;EEPROM write complete routine

    Dr. Gheith Abandah 10

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    Bad Effects of Interrupt Service

    Routines

    movf plo,0

    addwf qlo,0 ;What happens on an interrupt here?

    movwf rlo

    btfsc status,0

    Int_Routine

    bcf status,0 ;clear the Carry flagmovlw 0ff ;change W reg value

    bcf intcon,intf

    retfie

    end

    Dr. Gheith Abandah 11

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    Solution: Context Saving

    PUSH movwf w_temp ;Copy W to W_TEMP register

    swapf status,0 ;Swap status into W

    movwf status_temp ;Save status

    ...

    Actual ISR goes here...

    POP swapf status_temp,0 ;Swap nibbles into W

    movwf status ;Move W into STATUS register

    swapf w_temp,1 ;Swap nibbles in W_TEMPswapf w_temp,0 ;Swap nibbles in W_TEMP into W

    Clear interrupt flag(s) here

    retfie

    Dr. Gheith Abandah 12

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    Critical Regions

    In critical regions, we cannot allow the

    intrusion of an interrupt.

    Critical regions generally include all time-

    sensitive activity and any calculation where

    the ISR makes use of the result.

    Disable, or mask, the interrupts for their

    duration, by manipulating the enable bits in

    the INTCON register.

    Dr. Gheith Abandah 13

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    Counters and Timers

    A digital counter is

    usually made of flip

    flops and counts up or

    down. When the triggering

    event is a constant

    frequency clock, we get

    a timer.

    Dr. Gheith Abandah 14

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    Timer Applications

    (a) Measure the time

    between two events

    (b) Measure the time

    between two pulses(c) Measure a pulse

    duration

    Use polling or interrupts

    Dr. Gheith Abandah 15

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    PIC 16F84A Timer 0 Module

    Dr. Gheith Abandah 16

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    PIC 16F84A Timer 0 Module

    Dr. Gheith Abandah 17

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    Option Register

    T0CS: Clock source select T0SE: Source edge select

    PSA: Prescaler assignment bit

    PS2:PS0: Prescaler rate select

    Dr. Gheith Abandah 18

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    Counter Demonstration Page 1

    ;

    ;Demos Timer 0 as counter, using ping-pong hardware

    ;

    ;Clock freq 800kHz approx (RC osc.)

    ;Port A 4 right paddle (ip) Counter input.; 2 "out of play" led (op)

    ;Port B 7-0 "play" leds (all op)

    ;

    list p=16F84A#include p16f84A.inc

    ;

    Dr. Gheith Abandah 19

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    Counter Demonstration Page 2

    ;

    org 00

    ; Initialise

    bsf status,rp0 ;select memory bank 1

    movlw B'00011000'movwf trisa ;set port A to above pattern

    movlw 00

    movwf trisb ;all port B bits output

    movlw B'00101000' ;set up T00 for external input,; +ve edge, and no prescale

    movwf TMR0

    bcf status,rp0 ;select bank 0

    ;

    Dr. Gheith Abandah 20

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    Counter Demonstration Page 3

    ;

    movlw 04 ;switch on a led to show power is on

    movwf porta

    loop movf TMR0,0 ;Continuously display T0 on Port B

    movwf portbgoto loop

    end

    Dr. Gheith Abandah 21

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    Hardware-Generated Delays

    In software-generated delays, the CPU is tied

    up during the delay time.

    Can use Timer 0 for delays.

    The timer overflow interrupt is used to inform

    the CPU when the delay time is up.

    Example:

    Clock = 800 KHz Fosc/4 = 200 KHz T = 5 s

    Preselect = 8 for 125 count 125 x 8 x 5 s = 5.00 ms

    Need to set T0 at 256-125 = 131 to get overflow after 5 ms

    Dr. Gheith Abandah 22

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    HW Delay Demonstration Page 1

    ...

    ;Initialise

    org 0010

    start bsf status,5 ;select memory bank 1

    movlw B'00011000'movwf trisa ;set port A to above pattern

    movlw 00

    movwf trisb ;all port B bits output

    movlw B'00000010' ;set up T0 for internal input,; prescale by 8

    movwf option_reg

    bcf status,5 ;select bank 0

    ...

    Dr. Gheith Abandah 23

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    HW Delay Demonstration Page 2

    ...

    ;introduces delay of 5ms approx

    delay5

    movlw D'131' ;preload T0, so that 125 cycles,

    ; each of 40us, occur to overflowmovwf TMR0

    del1 btfss intcon,2 ;test for Timer Overflow flag

    goto del1 ;loop if not set

    bcf intcon,2 ;clear Timer Overflow flagreturn

    Dr. Gheith Abandah 24

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    The Watchdog Timer

    A big danger with any computer-based system

    is that the software fails in some way and that

    the system locks up or becomes unresponsive.

    The WDT continually counts up. If it ever

    overflows, it forces the microcontroller into

    reset.

    If the instruction clrwdt is not executed every

    (18 ms * prescaler rate), overflow occurs.

    Dr. Gheith Abandah 25

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    Sleep Mode

    When the sleep instruction is executed, the

    PIC halts execution and enters power saving

    mode.

    It awakes at:

    External reset (MCLR)

    WDT wake-up

    Occurrence of an enabled interrupt

    Dr. Gheith Abandah 26

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    Summary Interrupts and counter/timers are important

    hardware features of almost all microcontrollers.

    They both carry a number of important hardware

    and software concepts, which must be understood.

    The basic techniques of using interrupts and

    counter/timers have been introduced in this

    chapter. There is considerably increased

    sophistication in their use in more advancedapplications.

    Dr. Gheith Abandah 27


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