6002 L4 Oei12 Gaps Abstraccion Digital

7/28/2019 6002 L4 Oei12 Gaps Abstraccion Digital

1/30

00

0

0

011

111

00

00

0

000

0

00

0

0

1

11

11

1111

11

1

1

0

1

1

0

00

0

0

0

0

6.002xCIRCUITS ANDELECTRONICS

The Digital Abstraction

Reading: Chapter 5 of A&L


2/30

Reviewl Discretize matter by observing lumped matte

l Analysis tool kitKVL/KCL, composition, node, superposition, Thvenin, N

Lumped Circuit Abstract


3/30

In this Sequence

Interestingly, we will see shortly that thetools learned in the previous three

lectures are sufficient to analyze simpledigital circuits

Discretize value Digital abstraction


4/30

Analog signal processing

But first, why digital?

and might represent the

outputs of two sensors, for e.g.1V 2V Shorthand

(from node

+

+

+

-

V1

V2

V0

R1

R2

In the past

+

+

V1

R1

R2

V2


5/30

Analog signal processing

Why digital?

The above is an adder ci

+

+

V1

V2

V0

R1

R2


6/30

Noise Problem with Analog

Noise hampers our ability to distinguishbetween small differences in value

e.g. between 3.1V and 3.2V.

t

t

+

+

V1

V2

V0


7/30

Idea: Value Discretization(or lumped values)

Restrict values to be one of two

like two digits 0 and 1


8/30

Why is this discretization useful?


9/30

Digital System

sender receiver

0 01

0V

2.5V

5

V HIGH

LOW

t

VS

0 01

0V

2.5V

5V

t

VR


10/30

Digital System

sender receiver

With noiseVS V

R

0 01

0V

2.5V

5V

VS

t

0.2V

t

0 01

2.5V

VR

0V

5V

V


11/30

Digital System

Better noise immunity Lots of noise margin

For 1: noise margin 5V to 2.5V = 2.5V

For 0: noise margin 0V to 2.5V = 2.5V

2.5V

Vs

0


12/30

The Big Picture

The world

The EECS playground (lump matter)

Linearcircuits

Digital land(lump value)


13/30

Digital System Sender-Receiver C

sender receiverVS VR

noiseVN

l h h ld d l


14/30

Voltage Thresholds and Logic Valu

sender receiver

0V

5V

But, but, but What about 2.5V?


15/30

Hmmm Idea! Create no mans landor forbidden region

sender receiver

0V

5V

Does this


16/30

forbiddenregion

VH

VL

3V

2

V

No Mans Land or Forbidden Region

sender receiver

0V

5V

1 1

0

0

1:V3VH

0:V2VL

Whnoi

Whsen

1:

H ld th S d t T h St d d


17/30

sender receiver

Hold the Sender to Tougher Standard

5V

0V

N i M i


18/30

1 noise margin:

0 noise margin:

TVtha st

dfocaot

sender receiver

5V

0V

11

00

V0H

V0L

VIH

VIL

Noise Margins

Noise margins

N i I it


19/30

Digital sfollow st

disciplinto the dsystem minput thrthen the

guaranteoutputs valid outthreshol

receiver

t

5VV0H

V0L

0V

VIH

VIL

0 1 0 1

sender 0 1 0 1

t

5VV

0H

V0L

0V

V

IHV

IL

Noise Immunity


20/30

Processing Digital Signals

Recall, we have only two values

1,0 Map naturally to logic: T, F

What is 1011?Check Chapter 5.6 of A&L

Can also represent numbers

P i Di it l Si l


21/30

Processing Digital SignalsBoolean Logic

If X is true and Y is true

Then Z is true, else Z is false.

P i Di it l Si l


22/30

Processing Digital Signals


23/30

Z = X

What is the Output Of This GaX

t

Y

t

Z

t

XY


24/30

Combinational Gate Abstraction

Digital logic designers do nothave to care about what is

inside a gate.

n Adheres to static discipline

n Outputs are a function ofinputs alone.

XY

Logic Gates X Y


25/30

Logic Gates

AND gateZXY

X Y0 00 1 01 1

A th G t E l


26/30

Another Gate ExampleIf (A is true) OR (B is true)

then C is true

else C is false

Digital Circuits


27/30

Implement: output = A + B C

Digital Circuits

Representing Numbers


28/30

Numbers larger than 1 can be represented usimultiple binary digits and coding, much like us

multiple decimal digits to represent numbersgreater than 9.

The binary number 101 has decimal value:

Representing Numbers

A Two Bit Adder Circuit


29/30

A Two-Bit Adder Circuit


30/30

X

Y

Z =

Z

Y

X

Date post:	03-Apr-2018
Category:	Documents
Upload:	macan111
View:	220 times
Download:	0 times

6002 L4 Oei12 Gaps Abstraccion Digital

Documents