ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
DNP
Switcher
Page 12
Page 9
AudioAC97
Optional
10/100/1000 PHYRJ45 Magnetics
IICEEPROM
GeneratorGlock
Virtex 5
Page 9
Headers forSystem Mon
Page 12
Page 6
PS2 Keybaord &Mouse
Page 12
SystemACE
Page 7
USB Host& Peripheral
ZBT SRAM
Linear Flash
USER Clock
2 lineCharacter LCD
Page 12
UART
Page 12
GPIO
Page 10
DVI
Conn Page 16Codec Page 15
Page 13
64 Bit DDR2 SODIMM
Platform Flash
U4
TDOTDI TDI
PC4
TDITSTTDITDI
2.5V@3A max
2.5V@3A max
PWRJack
Linear
Switcher
Linear
Switcher
[email protected] max
TDI TDO
TDO
CFGTDOTDO
Expansion
J21
FPGA
U1U2U3
CPLDPlatform Flash
J1
TDO
CFGTDITSTTDO
JTAG Chain
Page 9Diff SMA Clocks
Expansion HeaderPage 11
SATA, SFP and SGMII
IIC
SPI FLASHPage 8
Platform FLASH
Video In
Codec Page 17
Page 8
Switcher3.3V@10A max
1.8V@10A max
1.0V@16A max
[email protected] max
[email protected] maxLinear - MGT AVTT TX
Linear - MGT AVCC
Linear MGT PLL
Linear - MGT AVTT RX
1.2V@3A max
1.2V@3A max
Linear - VCCAUX
5.0V@10A max
DebugMictor, TraceSofTouch
System ACE CF
Page 22-24
Page 20
Page 20
Page 21
J5
U5
Page 15
Page 18
Page 11
Page 25-26
R63
Page 19
PC4
CPLD - XC95144XL
Power Supply
SCHEM, ROHS COMPLIANT
0381241
GTPs
5V
ML505/6/7 Block Diagram
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
Page 2-6
LXT / SXT / FXT
A1-22-2008_14:51
27102
BP
VCC3V3
VCC3V3
VCC3V3 VCC3V3
VCC2V5
VCC3V3
VCCO2_4VCCO1_4
IO_L9N_CC_GC_4IO_L9P_CC_GC_4IO_L8N_CC_GC_4IO_L8P_CC_GC_4IO_L7N_GC_VRP_4IO_L7P_GC_VRN_4
IO_L6N_GC_4IO_L6P_GC_4IO_L5N_GC_4IO_L5P_GC_4
IO_L4N_GC_VREF_4IO_L4P_GC_4
IO_L3P_GC_D9_4
IO_L2P_GC_D11_4
IO_L1P_GC_D13_4
IO_L0P_GC_D15_4
IO_L1N_GC_D12_4
IO_L0N_GC_D14_4
IO_L2N_GC_D10_4
IO_L3N_GC_D8_4
FF1136BANK 4
GNDA_FPGA
VCC3V3
VCCO2_3VCCO1_3
IO_L9N_GC_3IO_L9P_GC_3IO_L8N_GC_3IO_L8P_GC_3IO_L7N_GC_3IO_L7P_GC_3IO_L6N_GC_3IO_L6P_GC_3IO_L5N_GC_3IO_L5P_GC_3
IO_L4N_GC_VREF_3IO_L4P_GC_3IO_L3N_GC_3IO_L3P_GC_3
IO_L2N_GC_VRP_3IO_L2P_GC_VRN_3IO_L1N_CC_GC_3IO_L1P_CC_GC_3IO_L0N_CC_GC_3IO_L0P_CC_GC_3
FF1136BANK 3
VCCO2_1VCCO1_1
IO_L9P_CC_A1_D17_1
IO_L8P_CC_A3_D19_1
IO_L7P_A5_D21_1
IO_L6P_A7_D23_1
IO_L5P_A9_D25_1
IO_L4P_A11_D27_1
IO_L3P_A13_D29_1
IO_L2P_A15_D31_1
IO_L1P_A17_1
IO_L0P_A19_1IO_L0N_A18_1
IO_L1N_A16_1
IO_L2N_A14_D30_1
IO_L3N_A12_D28_1
IO_L4N_VREF_A10_D26_1
IO_L5N_A8_D24_1
IO_L6N_A6_D22_1
IO_L7N_A4_D20_1
IO_L8N_CC_A2_D18_1
IO_L9N_CC_A0_D16_1
FF1136BANK 1
IO_L9N_D0_FS0_2IO_L9P_D1_FS1_2IO_L8N_D2_FS2_2
IO_L8P_D3_2IO_L7N_D4_2IO_L7P_D5_2IO_L6N_D6_2IO_L6P_D7_2
IO_L5N_CSO_B_2IO_L5P_FWE_B_2
IO_L4N_VREF_FOE_B_MOSI_2IO_L4P_FCS_B_2IO_L3N_A20_2IO_L3P_A21_2IO_L2N_A22_2IO_L2P_A23_2
IO_L1N_CC_A24_2IO_L1P_CC_A25_2IO_L0N_CC_RS0_2IO_L0P_CC_RS1_2
VCCO2_2VCCO1_2
BANK 2FF1136
VCCO2_0VCCO1_0
TMS_0M1_0M2_0
AVSS_0AVDD_0
TDO_0
M0_0TCK_0
RSVD2_0RSVD1_0RDWR_B_0CS_B_0
INIT_B_0CCLK_0DONE_0D_IN_0
HSWAPEN_0PROGRAM_B_0
VBATT_0VN_0VP_0DXN_0DXP_0
VREFN_0VREFP_0
D_OUT_BUSY_0TDI_0
FF1136BANK 0
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
Unused RP1Resistors
3.3V VCC0
3.3V VCC0
3.3V VCC0 2.5V VCC0
3.3V VCC0
Config, FLASH, SRAM,GPIO, CLKs
Banks 0,1,2,3,4
FPGA Banks 0,1,2,3,4,SCHEM, ROHS COMPLIANT
0381241
Config, FLASH, SRAM, GPIO, CLKs
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
A
02
1-22-2008_14:51
272 BP
GPIO_LED_4
RESERVED2RESERVED1
AD23AA22
AC14AC22AD22
T17T18
AD14
AD21AB15AC23AB23N23N22N14N15M15P15M23M22L23V17U18W17W18
U17V18
AD15AC15
U1
SG-BGA-6046
1
2 J80
21
RP1
4.7K
5%
68
5%
4.7K
RP1
AUDIO_SYNC
AUDIO_BIT_CLK
CLK_33MHZ_FPGA
CLK_27MHZ_FPGA
USER_CLK
1 2
R16
0 1/16W
5%
FPGA_TDO
FPGA_DONE
1
2R2
332
1% 1
2R1
DNP
1%
AD19AE19AE17AF16AD20AE21AE16AF15AF21AF20AF14AE14AE23AE22AG12AF13AG23AF23AE12AE13
AH21AM19
U1
SG-BGA-6046
K12
H23
H12
K22
K14
H22
J15
K21
L16
L20L21
L15
J22
K16
G22
L14
K23
J12
G23
K13
D13G14
U1
SG-BGA-6046
D23E20
H20H19H13J14J21J20H15H14K19L19J17J16J19K18G16G15L18K17H18H17
U1
SG-BGA-6046
2
1 C20.01UF
16VX7R
2
1 C10.01UF
16VX7R
1
2
R5 DNP
1%
1
2
R3
1%
1.21K
15
5%
4.7K
RP1
610
5%
4.7K
RP1
96
RP1
4.7K
5%
76
RP1
4.7K
5%4
1R
P1
4.7K
5%
13
5%
4.7K
RP1
FPGA_VREFPFPGA_AVDD
FPGA_DIFF_CLK_OUT_NFPGA_DIFF_CLK_OUT_PSMA_DIFF_CLK_IN_N
PHY_TXC_GTXCLK
FPGA_CS0_B
FPGA_INIT_B
FPGA_SERIAL1_RX
FPGA_SERIAL1_TX
AG14AL12
AG17AH18AE18AF18AG16AH17AF19AG18AG15AH15AG20AG21
AH14
AH20
AH12
AG22
AG13
AH22
AH19
AH13
U1
SG-BGA-6046
2
1 1%
DNP
R7
1
2
R9 DNP
1%
1
2
R6
4.75K
1%
2
1 1%
4.75K
R8
2
1 1%
4.75K
R4
SRAM_FLASH_D14
SRAM_CLK
PHY_TXCLK
PHY_RXCLK
GPIO_LED_1
GPIO_LED_0
FLASH_AUDIO_RESET_B
AUDIO_SDATA_IN
AUDIO_SDATA_OUT
SRAM_FLASH_D8SRAM_FLASH_D9SRAM_FLASH_D10SRAM_FLASH_D11SRAM_FLASH_D12SRAM_FLASH_D13
SRAM_FLASH_D15
GPIO_LED_2
CLK_FPGA_NCLK_FPGA_P
PHY_MDCPHY_INT
PHY_MDIOPHY_RESET
SMA_DIFF_CLK_IN_PFPGA_CS_B
FPGA_M0FPGA_M2FPGA_M1
FPGA_HSWAPEN
FPGA_RDWR_B
FPGA_EXP_TCK
FPGA_DIN
FPGA_EXP_TMS
FLASH_CE_BFLASH_OE_B
SRAM_FLASH_D2SRAM_FLASH_D1SRAM_FLASH_D0
SRAM_FLASH_A21
SRAM_FLASH_WE_B
CFG_ADDR_OUT0CFG_ADDR_OUT1
SRAM_FLASH_A20
FPGA_V_NFPGA_V_PFPGA_DX_NFPGA_DX_P
SRAM_FLASH_A0
SRAM_FLASH_A19
FPGA_PROG_BFPGA_VBATT
FPGA_DOUT_BUSYFPGA_TDI
SRAM_FLASH_A10SRAM_FLASH_A11SRAM_FLASH_A12SRAM_FLASH_A13
SRAM_FLASH_A17SRAM_FLASH_A18
SRAM_FLASH_A9SRAM_FLASH_A8SRAM_FLASH_A7
SRAM_FLASH_A5
SRAM_FLASH_A14SRAM_FLASH_A15
SRAM_FLASH_A6
SRAM_FLASH_A16
SRAM_FLASH_A4
SRAM_FLASH_A1SRAM_FLASH_A2
SRAM_FLASH_D7SRAM_FLASH_D6SRAM_FLASH_D5SRAM_FLASH_D4SRAM_FLASH_D3
SRAM_FLASH_A3
NC
NC
GPIO_LED_SGPIO_LED_NGPIO_LED_EGPIO_LED_W
LCD_FPGA_RS
CLKBUF_Q1_NCLKBUF_Q1_P
FPGA_CCLK-R
VGA_IN_DATA_CLK
2
1 C3
120PF50VNPO
FPGA_CLK-C
1
2
R17
140
1%
FPGA_CCLK
1
2
R104.75K1%
VCC1V8
VTTVREF
VCC1V8
VTTVREF
VCC1V8
VCC1V8
VCC1V8
VCC1V8
IO_L19N_17
VCCO2_17VCCO1_17
IO_L19P_17IO_L18N_17IO_L18P_17IO_L17N_17IO_L17P_17IO_L16N_17IO_L16P_17IO_L15N_17IO_L15P_17
IO_L14N_VREF_17IO_L14P_17IO_L13N_17IO_L13P_17
IO_L12N_VRP_17IO_L12P_VRN_17IO_L11N_CC_17IO_L11P_CC_17IO_L10N_CC_17IO_L10P_CC_17IO_L9N_CC_17IO_L9P_CC_17IO_L8N_CC_17IO_L8P_CC_17
IO_L7N_17IO_L7P_17IO_L6N_17IO_L6P_17IO_L5N_17IO_L5P_17
IO_L4N_VREF_17IO_L4P_17IO_L3N_17IO_L3P_17IO_L2N_17IO_L2P_17IO_L1N_17IO_L1P_17IO_L0N_17IO_L0P_17
VCCO3_17FF1136BANK 17
IO_L19N_19
VCCO2_19VCCO1_19
IO_L19P_19IO_L18N_19IO_L18P_19IO_L17N_19IO_L17P_19IO_L16N_19IO_L16P_19IO_L15N_19IO_L15P_19
IO_L14N_VREF_19IO_L14P_19IO_L13N_19IO_L13P_19
IO_L12N_VRP_19IO_L12P_VRN_19IO_L11N_CC_19IO_L11P_CC_19IO_L10N_CC_19IO_L10P_CC_19IO_L9N_CC_19IO_L9P_CC_19IO_L8N_CC_19IO_L8P_CC_19
IO_L7N_19IO_L7P_19IO_L6N_19IO_L6P_19IO_L5N_19IO_L5P_19
IO_L4N_VREF_19IO_L4P_19IO_L3N_19IO_L3P_19IO_L2N_19IO_L2P_19IO_L1N_19IO_L1P_19IO_L0N_19IO_L0P_19
VCCO3_19FF1136BANK 19
VTTVREF
VCC1V8
VCCO2_15VCCO1_15
IO_L19P_15IO_L18N_15IO_L18P_15IO_L17N_15IO_L17P_15IO_L16N_15IO_L16P_15IO_L15N_15IO_L15P_15
IO_L14N_VREF_15IO_L14P_15IO_L13N_15IO_L13P_15
IO_L12N_VRP_15IO_L12P_VRN_15IO_L11N_CC_15IO_L11P_CC_15IO_L10N_CC_15IO_L10P_CC_15IO_L9N_CC_15IO_L9P_CC_15IO_L8N_CC_15IO_L8P_CC_15
IO_L7N_15IO_L7P_15IO_L6N_15IO_L6P_15IO_L5N_15IO_L5P_15
IO_L4N_VREF_15IO_L4P_15IO_L3N_15IO_L3P_15IO_L2N_15IO_L2P_15IO_L1N_15IO_L1P_15IO_L0N_15IO_L0P_15
VCCO3_15
IO_L19N_15
FF1136BANK 15
IO_L19N_21
VCCO2_21VCCO1_21
IO_L19P_21IO_L18N_21IO_L18P_21IO_L17N_21IO_L17P_21IO_L16N_21IO_L16P_21IO_L15N_21IO_L15P_21
IO_L14N_VREF_21IO_L14P_21IO_L13N_21IO_L13P_21
IO_L12N_VRP_21IO_L12P_VRN_21IO_L11N_CC_21IO_L11P_CC_21IO_L10N_CC_21IO_L10P_CC_21IO_L9N_CC_21IO_L9P_CC_21IO_L8N_CC_21IO_L8P_CC_21
IO_L7N_21IO_L7P_21IO_L6N_21IO_L6P_21IO_L5N_21IO_L5P_21
IO_L4N_VREF_21IO_L4P_21IO_L3N_21IO_L3P_21IO_L2N_21IO_L2P_21IO_L1N_21IO_L1P_21IO_L0N_21IO_L0P_21
VCCO3_21FF1136BANK 21
VCC3V3
VCCO3_12VCCO2_12VCCO1_12
IO_L19N_12IO_L19P_12IO_L18N_12IO_L18P_12IO_L17N_12IO_L17P_12IO_L16N_12IO_L16P_12IO_L15N_12IO_L15P_12
IO_L14N_VREF_12IO_L14P_12IO_L13N_12IO_L13P_12
IO_L12N_VRP_12IO_L12P_VRN_12IO_L11N_CC_12IO_L11P_CC_12IO_L10N_CC_12IO_L10P_CC_12IO_L9N_CC_12IO_L9P_CC_12IO_L8N_CC_12IO_L8P_CC_12
IO_L7N_12IO_L7P_12IO_L6N_12IO_L6P_12IO_L5N_12IO_L5P_12
IO_L4N_VREF_12IO_L4P_12IO_L3N_12IO_L3P_12IO_L2N_12IO_L2P_12IO_L1N_12IO_L1P_12IO_L0N_12IO_L0P_12
BANK 12FF1136
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241
SCHEM, ROHS COMPLIANT
3.3V VCC0
Banks 14,16,18,21DDR2, PS2, GPIO
FPGA Bank 14, 16, 18, 21,DDR2, PS2, GPIO
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
A
27
1-22-2008_14:51
302
BP
DDR2_D63
DDR2_DQS6_N
M9T7N6
E7E6U10T9G7G6T11T10F6F5P10R11G5H5P9R9J7H7U7T8R8R7J5J6T6R6K6K7P6P7L5L4P5N5L6M7N7N8M5M6
U1
SG-BGA-6046
CPU_TDOCPU_TCKCPU_TMS
SYSACE_MPA05SYSACE_MPCESYSACE_MPOE_USB_RD_BSYSACE_MPA01_USB_A0SYSACE_MPIRQSYSACE_MPA06SYSACE_MPA02_USB_A1SYSACE_MPA03SYSACE_USB_D10SYSACE_USB_D9SYSACE_USB_D6SYSACE_USB_D7SYSACE_USB_D14SYSACE_USB_D11SYSACE_MPA04SYSACE_USB_D13SYSACE_USB_D15SYSACE_USB_D12SYSACE_USB_D4SYSACE_USB_D8SYSACE_USB_D1SYSACE_USB_D5SYSACE_USB_D3SYSACE_USB_D2SYSACE_MPWE_USB_WR_BSYSACE_USB_D0SYSACE_MPBRDYSYSACE_MPA00USB_RESET_BUSB_CS_BUSB_INTBUS_ERROR_1BUS_ERROR_2LCD_FPGA_DB7LCD_FPGA_DB6LCD_FPGA_DB5LCD_FPGA_DB4
AE24
AM29AJ28
AD24AD25AD26AC24AC25AE26AE27AF26AF25AG26AG27AG25AF24AH25AJ25AJ26AH27AK27AK28AJ29AK29AJ27AK26AF28AE28AH28AG28AA28AB28AD27AC28AB26AB25AA24Y24AC27AB27AA26AA25
AL32
SG-BGA-6046
U1
L32M29
U25T26U26R27R26U28U27T29T28T30U30R31T31R29R28N30M31P30P31L31K31P29N29M30L30J31J30G31H30K29L29E31F31J29H29F30G30F29E29
P33
T25
U1
SG-BGA-6046
1
2
R23
3
49.9
1%
1
2
1%49
.9R23
2
T24
E30J28
R24N25P25P24N24P27P26N28M28K26K27L28K28M27N27E27E26F28E28G28H28H27G27F26F25H24H25G26G25J26J27M26M25J25J24L26L25L24K24
H31
SG-BGA-6046
U1
AG30
AH31AE30
AH29AH30AJ30AF30AF29AK31AJ31AD29AE29AG31AF31AC29AD30AE31AD31AA30AA29AC30AB30AA31AB31Y29Y28V29W29Y31W31V27V28W30V30W27Y27W25V25W26Y26V24W24
AD33
SG-BGA-6046
U1
1
2
1%49
.9R23
1
1
2
R23
0
49.9
1%
1
2
1%49
.9R22
9
1
2
R22
8
49.9
1%
DDR2_SCL
DDR2_DQS0_PDDR2_DQS0_N
FPGA_ROTARY_INCBFPGA_ROTARY_PUSHFPGA_ROTARY_INCA
DDR2_DM3
DDR2_D4DDR2_D0DDR2_D5
DDR2_D6DDR2_D7
DDR2_D2DDR2_D24DDR2_D3
DDR2_D28DDR2_D25
DDR2_DQS4_NDDR2_DQS4_P
DDR2_DQS3_PDDR2_DQS3_N
DDR2_D29
DDR2_D26DDR2_D30
DDR2_D27DDR2_D31
DDR2_D23
DDR2_D12
DDR2_DQS1_PDDR2_DQS1_N
DDR2_DQS2_NDDR2_DQS2_P
DDR2_DM1
DDR2_DM2
PCIE_PRSNT_B_FPGA
SFP_TX_DISABLE_FPGA
GPIO_LED_5GPIO_LED_6GPIO_LED_7
GPIO_DIP_SW7GPIO_DIP_SW6
GPIO_DIP_SW8
GPIO_DIP_SW5GPIO_DIP_SW4
FPGA_VRP_B21FPGA_VRN_B21
GPIO_DIP_SW2
GPIO_DIP_SW3
DDR2_D9
DDR2_CLK0_NDDR2_CLK0_P
DDR2_D37DDR2_D33
DDR2_D46
DDR2_DQS5_P
DDR2_D49DDR2_D53
DDR2_DQS6_PDDR2_DQS7_NDDR2_DQS7_P
DDR2_CLK1_PDDR2_CLK1_N
DDR2_DM6
DDR2_DM7DDR2_D61DDR2_D57DDR2_D60
DDR2_D56DDR2_D55
DDR2_D54DDR2_D51
DDR2_D58DDR2_D59DDR2_D62
DDR2_D50
DDR2_DQS5_N
DDR2_DM5DDR2_D41
DDR2_D44DDR2_D40DDR2_D45
DDR2_D42
DDR2_D43DDR2_D47DDR2_D48
DDR2_D52
DDR2_DM4
DDR2_D35DDR2_D39DDR2_D34DDR2_D38
DDR2_D32
DDR2_D36
DDR2_D14DDR2_D11DDR2_D15
DDR2_D10
DDR2_D18DDR2_D22DDR2_D19
DDR2_D16DDR2_D20DDR2_D17DDR2_D21
DDR2_D13DDR2_D8
FPGA_VRN_B17FPGA_VRP_B17
FPGA_VRP_B19FPGA_VRN_B19
GPIO_DIP_SW1KEYBOARD_CLKMOUSE_DATAMOUSE_CLKIIC_SCL_SFPIIC_SDA_SFPIIC_SCL_VIDEOIIC_SDA_VIDEODDR2_CKE0FAN_ALERT_BDDR2_CKE1DDR2_BA2DDR2_A12DDR2_A11DDR2_A9DVI_GPIO1DDR2_A8DDR2_A7DDR2_A6DDR2_A5DDR2_A4DDR2_A3DDR2_A2DDR2_A1DDR2_A0DDR2_A10DDR2_BA1DDR2_BA0DDR2_RAS_BDDR2_WE_BDDR2_CS0_BDDR2_CAS_BDDR2_ODT0DDR2_CS1_BDDR2_A13DDR2_ODT1PIEZO_SPEAKERDDR2_SDA
KEYBOARD_DATA
DDR2_D1DDR2_DM0
GPIO_LED_3
VCCO2_20VCCO1_20
IO_L19P_20IO_L18N_20IO_L18P_20IO_L17N_20IO_L17P_20IO_L16N_20IO_L16P_20IO_L15N_20IO_L15P_20
IO_L14N_VREF_20IO_L14P_20IO_L13N_20IO_L13P_20
IO_L12N_VRP_20IO_L12P_VRN_20IO_L11N_CC_20IO_L11P_CC_20IO_L10N_CC_20IO_L10P_CC_20IO_L9N_CC_20IO_L9P_CC_20IO_L8N_CC_20IO_L8P_CC_20
IO_L7N_20IO_L7P_20IO_L6N_20IO_L6P_20IO_L5N_20IO_L5P_20
IO_L4N_VREF_20IO_L4P_20IO_L3N_20IO_L3P_20IO_L2N_20IO_L2P_20IO_L1N_20IO_L1P_20IO_L0N_20IO_L0P_20
VCCO3_20
IO_L19N_20
FF1136BANK 20
VCC3V3 VCC3V3
VCC3V3
VCC3V3
VCC3V3VCCO_EXP
VCCO_EXP
VCCO_EXP
VCCO_EXP
VCCO3_18VCCO2_18VCCO1_18
IO_L19N_18IO_L19P_18IO_L18N_18IO_L18P_18IO_L17N_18IO_L17P_18IO_L16N_18IO_L16P_18IO_L15N_18IO_L15P_18
IO_L14N_VREF_18IO_L14P_18IO_L13N_18IO_L13P_18
IO_L12N_VRP_18IO_L12P_VRN_18IO_L11N_CC_18IO_L11P_CC_18IO_L10N_CC_18IO_L10P_CC_18IO_L9N_CC_18IO_L9P_CC_18IO_L8N_CC_18IO_L8P_CC_18
IO_L7N_18IO_L7P_18IO_L6N_18IO_L6P_18IO_L5N_18IO_L5P_18
IO_L4N_VREF_18IO_L4P_18IO_L3N_18IO_L3P_18IO_L2N_18IO_L2P_18IO_L1N_18IO_L1P_18IO_L0N_18IO_L0P_18
FF1136BANK 18
IO_L19N_22
VCCO2_22VCCO1_22
IO_L19P_22IO_L18N_22IO_L18P_22IO_L17N_22IO_L17P_22IO_L16N_22IO_L16P_22IO_L15N_22IO_L15P_22
IO_L14N_VREF_22IO_L14P_22IO_L13N_22IO_L13P_22
IO_L12N_VRP_22IO_L12P_VRN_22IO_L11N_CC_22IO_L11P_CC_22IO_L10N_CC_22IO_L10P_CC_22IO_L9N_CC_22IO_L9P_CC_22IO_L8N_CC_22IO_L8P_CC_22
IO_L7N_22IO_L7P_22IO_L6N_22IO_L6P_22IO_L5N_22IO_L5P_22
IO_L4N_VREF_22IO_L4P_22IO_L3N_22IO_L3P_22IO_L2N_22IO_L2P_22IO_L1N_22IO_L1P_22IO_L0N_22IO_L0P_22
VCCO3_22FF1136BANK 22
VCCO3_13VCCO2_13VCCO1_13
IO_L19N_13IO_L19P_13IO_L18N_13IO_L18P_13IO_L17N_13IO_L17P_13IO_L16N_13IO_L16P_13IO_L15N_13IO_L15P_13
IO_L14N_VREF_13IO_L14P_13IO_L13N_13IO_L13P_13
IO_L12N_VRP_13IO_L12P_VRN_13IO_L11N_CC_13IO_L11P_CC_13IO_L10N_CC_13IO_L10P_CC_13
IO_L9N_CC_SM0N_13IO_L9P_CC_SM0P_13IO_L8N_CC_SM1N_13IO_L8P_CC_SM1P_13
IO_L7N_SM2N_13IO_L7P_SM2P_13IO_L6N_SM3N_13IO_L6P_SM3P_13IO_L5N_SM4N_13IO_L5P_SM4P_13IO_L4N_VREF_13
IO_L4P_13IO_L3N_SM5N_13IO_L3P_SM5P_13IO_L2N_SM6N_13IO_L2P_SM6P_13IO_L1N_SM7N_13IO_L1P_SM7P_13IO_L0N_SM8N_13IO_L0P_SM8P_13
FF1136BANK 13
VCCO3_11VCCO2_11VCCO1_11
IO_L19N_SM9N_11IO_L19P_SM9P_11IO_L18N_SM10N_11IO_L18P_SM10P_11IO_L17N_SM11N_11IO_L17P_SM11P_11IO_L16N_SM12N_11IO_L16P_SM12P_11IO_L15N_SM13N_11IO_L15P_SM13P_11IO_L14N_VREF_11
IO_L14P_11IO_L13N_11IO_L13P_11
IO_L12N_VRP_11IO_L12P_VRN_11
IO_L11N_CC_SM14N_11IO_L11P_CC_SM14P_11IO_L10N_CC_SM15N_11IO_L10P_CC_SM15P_11
IO_L9N_CC_11IO_L9P_CC_11IO_L8N_CC_11IO_L8P_CC_11
IO_L7N_11IO_L7P_11IO_L6N_11IO_L6P_11IO_L5N_11IO_L5P_11
IO_L4N_VREF_11IO_L4P_11IO_L3N_11IO_L3P_11IO_L2N_11IO_L2P_11IO_L1N_11IO_L1P_11IO_L0N_11IO_L0P_11
BANK 11FF1136
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241
SCHEM, ROHS COMPLIANT
(CC)(CC)
(CC)
(CC)
(CC)(CC)
(CC)(CC)
3.3V VCC0
3.3V VCC0EXP VCC0
EXP VCC0
Banks 11,12,13Sys ACE, XGI,PHY, LCD
Sys ACE, XGI, PHY, LCDBanks 11,12,13,
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
A1-22-2008_14:51
27402
BP
HDR2_50_SM_5_NHDR2_52_SM_5_P
HDR1_42
HDR2_46_SM_12_NHDR2_48_SM_12_P
FPGA_VRP_B13FPGA_VRN_B13
FPGA_VRN_B22
FPGA_VRP_B20FPGA_VRN_B20
FPGA_VRN_B11
B32A33B33C33C32D32C34D34G32H32F33E34E32E33G33F34J32H33H34J34L34K34K33K32N33M33L33M32P34N34P32N32T33R34R33R32U33T34U32U31
T27R30V31
SG-BGA-6046
U1
AA32AB29W28
AP32AN32AN33AN34AM32AM33AL33AL34AK32AJ32AH32AG32AK33AK34AH33AG33AE32AD32AJ34AH34AE34AF34AE33AF33AB33AC33AB32AC32AD34AC34W32Y32Y34AA34AA33Y33V34W34V33V32
U1
VALUE
AH11
AN14AP14AB10AA10AN13AM13AA8AA9AP12AN12AC8AB8AM12AM11AC10AC9AL11AL10AE8AD9AD10AD11AK11AJ11AF8AE9AK8AK9AF9AF10AJ9AJ10AF11AE11AH9AH10AG8AH8AG10
AF7AJ8
AG11
VALUE
U1AC4AC5AB6AB7AA5AB5AC7AD7Y8Y9AD4AD5AA6Y7AD6AE6W6Y6AE7AF6AG5AF5W7V7AH5AG6Y11W11AH7AG7W10W9AJ7AJ6V8U8AK7AK6V10V9
AC6W8AB9
VALUE
U1
2
1 1%49
.9R20
1
2
1%49
.9R22
FPGA_SERIAL2_RXFPGA_SERIAL2_TX
FPGA_CPU_RESET_B
2
1
R23
49.9
1%
2
1
R21
49.9
1%
FPGA_VRP_B11
2
1 1%49
.9R26
2
1
R27
49.9
1%
GPIO_LED_C
SRAM_CLK
SRAM_D27SRAM_D28SRAM_D29SRAM_D30SRAM_D31
SRAM_D23SRAM_D22SRAM_D21SRAM_D20SRAM_D19SRAM_D18
SRAM_D25
SRAM_D17
SRAM_D24
SRAM_D16
SRAM_CS_B
SRAM_DQP3SRAM_DQP2SRAM_DQP1SRAM_DQP0
SRAM_ADV_LD_B
SRAM_BW0SRAM_BW3SRAM_BW2
SRAM_D26
FLASH_CLKFLASH_ADV_BFLASH_WAIT
SRAM_MODESRAM_OE_B
SRAM_BW1
IIC_SCL_MAINIIC_SDA_MAIN
2
1 1%49
.9R24
2
1
R25
49.9
1%
TRC_CLK
DVI_D11DVI_D10DVI_D9DVI_D8DVI_D7DVI_D6DVI_D5DVI_D4DVI_D3DVI_D2DVI_D1DVI_D0
DVI_XCLK_PDVI_XCLK_N
PHY_TXD7
FPGA_VRP_B22
PHY_TXERPHY_TXCTL_TXENPHY_TXD0PHY_TXD1PHY_TXD2PHY_TXD3PHY_TXD4PHY_TXD5PHY_TXD6
TRC_TS4TRC_TS5TRC_TS6
TRC_TS3
TRC_TS2ETRC_TS1ETRC_TS2OTRC_TS1O
DVI_DE
DVI_VDVI_H
LCD_FPGA_RWLCD_FPGA_E
CPU_TRSTDVI_RESET_B
GPIO_SW_CGPIO_SW_W
VGA_IN_BLUE7
VGA_IN_BLUE0VGA_IN_BLUE1VGA_IN_BLUE2VGA_IN_BLUE3VGA_IN_BLUE4VGA_IN_BLUE5VGA_IN_BLUE6
VGA_IN_GREEN0VGA_IN_GREEN1VGA_IN_GREEN2VGA_IN_GREEN3VGA_IN_GREEN4VGA_IN_GREEN5VGA_IN_GREEN6VGA_IN_GREEN7
SPI_CE_B
GPIO_SW_EGPIO_SW_NGPIO_SW_S
PC4_HALT_BCPLD_IO_1
G13
H11
E9E8F9F8F10G10G8H8D11D10K11J11D12C12H10H9A13B12J10J9K8K9B13C13L10L11G11G12M8L8F11E11M10L9E12E13N10N9F13
J8E10
VALUE
U1
VGA_IN_SOGOUTVGA_IN_HSOUTVGA_IN_VSOUTVGA_IN_ODD_EVEN_B
VGA_IN_CLAMPVGA_IN_COAST
VGA_IN_RED0VGA_IN_RED1VGA_IN_RED2VGA_IN_RED3VGA_IN_RED4VGA_IN_RED5VGA_IN_RED6VGA_IN_RED7
HDR1_60HDR1_62HDR1_64
HDR1_56
HDR2_40_SM_6_PHDR2_38_SM_6_N
HDR2_44_SM_14_PHDR2_42_SM_14_N
HDR2_14_DIFF_1_N
HDR2_18_DIFF_2_N
HDR2_22_SM_10_NHDR2_24_SM_10_P
HDR2_20_DIFF_2_P
HDR2_16_DIFF_1_PHDR2_10_DIFF_0_NHDR2_12_DIFF_0_P
HDR2_28_SM_11_PHDR2_26_SM_11_N
PHY_RXD5PHY_RXD4PHY_RXD3
PHY_COLPHY_RXD0
PHY_RXD2PHY_RXD1
PHY_RXD6
PHY_RXD7PHY_CRSPHY_RXCTL_RXDVPHY_RXER
HDR1_4HDR1_8
HDR1_10HDR1_12
HDR1_2HDR1_6
HDR1_14
HDR1_16HDR2_4_SM_8_PHDR2_2_SM_8_NHDR2_8_SM_7_PHDR2_6_SM_7_N
HDR1_18HDR1_20HDR1_22HDR1_24
HDR2_32_DIFF_3_PHDR2_30_DIFF_3_NHDR2_36_SM_15_PHDR2_34_SM_15_N
HDR1_58
HDR1_38HDR1_28
HDR1_48HDR1_50HDR1_52HDR1_54
HDR2_64_SM_9_PHDR2_62_SM_9_N
HDR2_54_SM_13_NHDR2_56_SM_13_P
HDR1_44HDR1_46HDR1_40
HDR1_36
HDR1_26HDR1_30HDR1_32HDR1_34
HDR2_60_SM_4_PHDR2_58_SM_4_N
VCC3V3
VCC3V3 VCC3V3
IO_L19N_23
VCCO2_23VCCO1_23
IO_L19P_23IO_L18N_23IO_L18P_23IO_L17N_23IO_L17P_23IO_L16N_23IO_L16P_23IO_L15N_23IO_L15P_23
IO_L14N_VREF_23IO_L14P_23IO_L13N_23IO_L13P_23
IO_L12N_VRP_23IO_L12P_VRN_23IO_L11N_CC_23IO_L11P_CC_23IO_L10N_CC_23IO_L10P_CC_23IO_L9N_CC_23IO_L9P_CC_23IO_L8N_CC_23IO_L8P_CC_23
IO_L7N_23IO_L7P_23IO_L6N_23IO_L6P_23IO_L5N_23IO_L5P_23
IO_L4N_VREF_23IO_L4P_23IO_L3N_23IO_L3P_23IO_L2N_23IO_L2P_23IO_L1N_23IO_L1P_23IO_L0N_23IO_L0P_23
VCCO3_23FF1136BANK 23
VCCO3_25VCCO2_25VCCO1_25
IO_L19N_25IO_L19P_25IO_L18N_25IO_L18P_25IO_L17N_25IO_L17P_25IO_L16N_25IO_L16P_25IO_L15N_25IO_L15P_25
IO_L14N_VREF_25IO_L14P_25IO_L13N_25IO_L13P_25
IO_L12N_VRP_25IO_L12P_VRN_25IO_L11N_CC_25IO_L11P_CC_25IO_L10N_CC_25IO_L10P_CC_25IO_L9N_CC_25IO_L9P_CC_25IO_L8N_CC_25IO_L8P_CC_25
IO_L7N_25IO_L7P_25IO_L6N_25IO_L6P_25IO_L5N_25IO_L5P_25
IO_L4N_VREF_25IO_L4P_25IO_L3N_25IO_L3P_25IO_L2N_25IO_L2P_25IO_L1N_25IO_L1P_25IO_L0N_25IO_L0P_25
FF1136BANK 25
VCCO3_5
VCCO1_5
IO_L19N_5IO_L19P_5IO_L18N_5IO_L18P_5IO_L17N_5IO_L17P_5IO_L16N_5IO_L16P_5IO_L15N_5IO_L15P_5
IO_L14N_VREF_5IO_L14P_5IO_L13N_5IO_L13P_5
IO_L12N_VRP_5IO_L12P_VRN_5IO_L11N_CC_5IO_L11P_CC_5IO_L10N_CC_5IO_L10P_CC_5IO_L9N_CC_5IO_L9P_CC_5IO_L8N_CC_5IO_L8P_CC_5
IO_L7N_5IO_L7P_5IO_L6N_5IO_L6P_5IO_L5N_5IO_L5P_5
IO_L4N_VREF_5IO_L4P_5IO_L3N_5IO_L3P_5IO_L2N_5IO_L2P_5IO_L1N_5IO_L1P_5IO_L0N_5IO_L0P_5
VCCO2_5
BANK 5FF1136
VCCO3_6
VCCO1_6
IO_L19N_6IO_L19P_6IO_L18N_6IO_L18P_6IO_L17N_6IO_L17P_6IO_L16N_6IO_L16P_6IO_L15N_6IO_L15P_6
IO_L14N_VREF_6IO_L14P_6IO_L13N_6IO_L13P_6
IO_L12N_VRP_6IO_L12P_VRN_6IO_L11N_CC_6IO_L11P_CC_6IO_L10N_CC_6IO_L10P_CC_6IO_L9N_CC_6IO_L9P_CC_6IO_L8N_CC_6IO_L8P_CC_6
IO_L7N_6IO_L7P_6IO_L6N_6IO_L6P_6IO_L5N_6IO_L5P_6
IO_L4N_VREF_6IO_L4P_6IO_L3N_6IO_L3P_6IO_L2N_6IO_L2P_6IO_L1N_6IO_L1P_6IO_L0N_6IO_L0P_6
VCCO2_6 FF1136BANK 6
VCC3V3
VCC3V3
VCC3V3
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241
SCHEM, ROHS COMPLIANT
SRAM, FLASH, GPIOVGA, IIC, PHY
Banks 15, 17
Unused banks on the LX50T and SX50T
VGA, IIC, PHY, SRAM, GPIOBanks 11,12,13,
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
A
BP5 27
1-22-2008_14:51
02
2
1
R38
49.9
1%
SUPRCLK1_M0
SUPRCLK1_M1
SUPRCLK1_N2
SUPRCLK1_SEL1
SUPRCLK1_M2SUPRCLK1_SEL0
SUPRCLK1_N1SUPRCLK1_N0
MICTOR_16
MICTOR_23
MICTOR_25
MICTOR_27MICTOR_29
MICTOR_31
MICTOR_18
MICTOR_20MICTOR_22
MICTOR_33
MICTOR_37MICTOR_35
NC
NCNC
AH24AJ24AK12AJ12AH23AJ22AL13AK13AK24AL23AJ14AK14AK23AK22AL15AL14AJ21AJ20AJ16AJ15AK16AL16AL21AK21AK17AJ17AL19AL20AK18AL18AJ19AK19AM15AM16AP16AP17AN15AP15AM17AN17
AK15AN16AJ18
U1
SG-BGA-6046
B16B15A15A14B17A16C14C15E19F19C17D17E21D20D16D15G20F20D14E14E17E16F21G21E18D19D21D22F18G18E22F23G17F16D24E23F14F15F24E24
C16F17B19
U1
SG-BGA-6046
AL29AL30AM31AL31AN30AM30AP30AP31AM27AL28AP29AN29AP27AN27AN28AM28AN25AM25AM26AL26AP26AP25AL25AL24AN24AP24AM21AM20AN23AM23AN20AP20AN22AM22AN18AM18AP22AP21AN19AP19
AL22AK25AN26
U1
SG-BGA-6046
B30
C26G24
A30D30D31D29C30A31B31D27C28A28A29C27D26B28C29C25B25A26B27A25B26D25C24A24A23A20A19B23C23A18B18B22C22C18C19A21B21B20C20
F27
U1
SG-BGA-6046
NCNC
NC
NCNC
NC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
NCNC
1
2
1%49
.9R36
1
2
R35
49.9
1%
FPGA_VRN_B5FPGA_VRP_B5
2
1 1%49
.9R37
FPGA_VRN_B23FPGA_VRP_B23
MICTOR_5
VCCAUX
GNDA_FPGA
VCC5
VCCINT
VCC5
GNDA_FPGA
GNDA_FPGA
TEMP
GND
VIN VOUT
TRIM
VCCAUX
VCCINT
GNDA_FPGA
VCCAUX
VCCAUX12VCCAUX11VCCAUX10VCCAUX9VCCAUX8VCCAUX7
VCCAUX6VCCAUX5VCCAUX4VCCAUX3VCCAUX2VCCAUX1
FF1136VCCAUX
GND219
GND218
GND217
GND216
GND215
GND214
GND213
GND212
GND211
GND210
GND209
GND208
GND207
GND206
GND205
GND204
GND203
GND202
GND201
GND200
GND199
GND198
GND197
GND196
GND195
GND194
GND193
GND192
GND191
GND190
GND189
GND188
GND187
GND186
GND185
GND184
GND183
GND182
GND181
GND180
GND179
GND178
GND177
GND176
GND175
GND174
GND173
GND172
GND171
GND170
GND169
GND168
GND167
GND166
GND165
GND164
GND163
GND162
GND161
GND160
GND159
GND158
GND157
GND156
GND155
GND154
GND153
GND152
GND151
GND150
GND149
GND148
GND147
GND146
GND145
GND144
GND143
GND142
GND141
GND140
GND139
GND138
GND137
GND136
GND135
GND134
GND133
GND132
GND131
GND130
GND129
GND128
GND127
GND126
GND125
GND124
GND123
GND122
GND121
GND120
GND119
GND118
GND117
GND116
GND115
GND114
GND113
GND112
GND111
GND110
GND109
GND108
GND107
GND106
GND105
GND104
GND103
GND102
GND101
GND100
GND99
GND98
GND97
GND96
GND95
GND94
GND93
GND92
GND91
GND90
GND89
GND88
GND87
GND86
GND85
GND84
GND83
GND81
GND80
GND79
GND78
GND77
GND76
GND75
GND74
GND73
GND72
GND71
GND70
GND69
GND68
GND67
GND66
GND65
GND64
GND63
GND62
GND61
GND60
GND59
GND58
GND57
GND56
GND55
GND54
GND53
GND52
GND51
GND50
GND49
GND48
GND47
GND46
GND45
GND44
GND43
GND42
GND41
GND40
GND39
GND38
GND37
GND36
GND35
GND34
GND33
GND32
GND31
GND30
GND29
GND28
GND27
GND26
GND25
GND24
GND23
GND22
GND21
GND20
GND19
GND18
GND17
GND16
GND15
GND14
GND13
GND12
GND11
GND10
GND9
GND8
GND7
GND6
GND5
GND4
GND3
GND2
GND1
GND82
GND
FF1136
VCCINT54VCCINT53VCCINT52VCCINT51VCCINT50VCCINT49VCCINT48VCCINT47VCCINT46VCCINT45VCCINT44VCCINT43VCCINT42VCCINT41VCCINT40VCCINT39VCCINT38VCCINT37VCCINT36VCCINT35VCCINT34VCCINT33VCCINT32VCCINT31VCCINT30VCCINT29
VCCINT27VCCINT26VCCINT25VCCINT24VCCINT23VCCINT22VCCINT21VCCINT20VCCINT19VCCINT18VCCINT17VCCINT16VCCINT15VCCINT14VCCINT13VCCINT12VCCINT11VCCINT10VCCINT9VCCINT8VCCINT7VCCINT6VCCINT5VCCINT4VCCINT3VCCINT2VCCINT1 VCCINT28
FF1136VCCINT
NC1NC2NC3NC4NC5NC6NC7NC8NC9NC20 NC19
NC18NC17NC16NC15NC14NC13NC12NC11NC10
NCFF1136
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241
SCHEM, ROHS COMPLIANT
Silkscreen:1-2: VCC 2.5V2-3: FPGA VREFP
RechargeableBattery
(Approx 3.1V)
FPGA AVDD Select
Power and Misc FPGA BanksVCCINT, VCCAUX, NCs, GNDBattery and System Moniter
System Monitor Header
VCCINT, VCCAUX, GND, Sys MonFPGA Misc,
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
A
6 27
1-22-2008_14:51
02
BP
21
1%100
R30HDR_V_P
ADR_VREFP
A1A4A5
A10A34E1F1L1M1
AK1 AP34AP10AP5AP4AP1AJ1AD1AC1V1U1
U1
SG-BGA-6046
NC
1
2
B1
1
2
3
J17
1
20.1UF
10VX5R
C14
1
2X5R10V
0.1UFC12
Y21Y19Y17Y15Y13W22W20W16W14W12V21V19V15V13U22U20U16U14U12T21T19T15T13R22R20R18
R14R12P21P19P17P13N20N18N16N12M19M17M13
AD17AD13AC20AC18AC16AB21AB19AB17AB13AA20AA18AA16AA14AA12 R16
U1
SG-BGA-6046
ADR_VREFP
NC
FPGA_VBATT
Y5Y30
Y25
Y22
Y20
Y2Y18
Y16
Y14
Y12
Y10
W5W4W33
W23
W21
W19
W15
W13
V6V26
V22
V20
V16
V14
V12
U9U6U34
U29
U23
U21
U19
U15
U13
U11
T5T4T32
T22
T20
T16
T14
T12
R5R25
R23
R21
R2R19
R17
R15
R13
R10
P8P28
P22
P20
P2P18
P16
P14
P12
N4N31
N26
N21
N19
N17
N13
N11
M4M34
M24
M20
M18
M16
M14
M12
L7L27
L22
L17
L13
K5K4K30
K25
K20
K15
K10
J33
J23
J2J18
J13
H6H26
H21
H2H16
G9G4G34
G29
G19
F7F32
F22
F12E5
E25
E15D9D6
D33
D28
D18
C31
C21C2
C11B8B7
B34
B29
B24B2
B14
B11B1
AP33
AP28
AP23
AP18
AP13
AP11
AN7
AN31
AN21
AN2
AN11
AN1
AM34
AM24
AM2
AM14
AL9
AL6
AL27
AL17
AK4
AK30
AK20
AK10
AJ5
AJ33
AJ23
AJ13
AH6
AH4
AH26
AH16
AG9
AG34
AG29
AG24
AG2
AG19
AF32
AF27
AF22
AF2
AF17
AF12
AE5
AE4
AE25
AE20
AE15
AE10
AD8
AD28
AD18
AD16
AD12
AC31
AC26
AC21
AC19
AC17
AC13
AC11
AB4
AB34
AB24
AB22
AB20
AB18
AB16
AB14
AB12
AA7
AA27
AA23
AA21
AA2
AA19
AA17
AA15
AA13
AA11
A32
A27
A22
A17
A12
A11
AN8
U1
SG-BGA-6046
Y23V23V11U24T23P23
P11M21M11L12AC12AB11
U1
SG-BGA-6046
1 2
FB3
HZ0805E601R-10
ADR_VREFP FPGA_VREFP
FPGA_AVDD
FPGA_AVDD
NCNC 1
2
3 4
5
U9ADR03_SC70
2
1
3D1BAS40-04
40V200MA
97
1 235 6
4
810
J9
1
2X5R10V1UFC13
21
HZ0805E601R-10
FB2
1 2
FB1
HZ0805E601R-10
FPGA_AVDD_FB
1
2
R321.54K1%
1
2
R334.75K1%
2
1 C111UF10VX5R
FPGA_DX_NFPGA_DX_P
NCNCNC
NC
NCNCNC
NCNCNCNC
NCNC
NCNCNC
NC
NCNC
1
2
C10
0.01UF16VX7R
1 2
R31
100 1%
FPGA_V_PFPGA_V_N
HDR_V_N
SMB_DX_PSMB_DX_N
VCC3V3
VCC3V3
VCC3V3
VCC3V3
VCC3V3
VCC3V3VCC3V3
VCC3V3
VCC3V3
VCC3V3
P2
P1
P3
P4
Pushbutton
PARTS=1LEVEL=STD
NC20NC19NC18NC17NC16
NC21NC22NC23NC24NC25
NC11NC12NC13NC14NC15
NC6NC7NC8NC9NC10
NC5NC4NC3NC2
CFD08CFD02CFD09
MPIRQMPCEMPA06MPA05MPA04MPD15MPD14MPD13MPD12MPD11MPD10MPD09MPD08MPD07MPD06MPD05MPD04MPD03MPD02MPD01MPD00MPA03MPA02MPA01MPA00MPWEMPOE
CFGINIT
CFGPROG
CFGADDR0
CFGADDR1
CFGADDR2
CLK
STATLED
ERRLED
TSTTMS
CFA07
CFA05
CFWAITCFA02
91_GND
100_GND
75_GND
83_GND
64_GND
54_GND
46_GND
120_GND
136_GND
129_GND
144_GND
9_GND
18_GND
26_GND
CFCD2CFD10
CFCD1CFD03CFD11CFD04CFD12CFD05CFD13CFD06CFD14CFD07CFD15CFCE1CFCE2CFA10
CFD01
CFA00
CFOECFA09CFA08CFWE
CFA06
CFA03
CFREGCFA01
CFD00
CFA04
CFGRSVD
111_GND
CFGMODEPIN
35_GND
VCCL_126
110_GND
112_GND
TSTTDO
TSTTCK
TSTTDI
CFGTCK
CFGTMS
CFGTDO
CFGTDI
POR_RESET
POR_TEST
POR_BYPASS
RESET_B
VCCH_128
VCCH_109
VCCH_73
VCCH_92
VCCH_55
VCCH_37
VCCH_17
VCCH_1
VCCL_99
VCCL_94
VCCL_84
VCCL_57
VCCL_25
VCCL_15
VCCL_10
MPBRDY
NC1
(DIE DOWN)TQFP144SYSTEMACE
P2
P1
P3
P4
Pushbutton
3_D0427_D112_D03
49_D1048_D0923_D0247_D0822_D01
20_A0044_REG19_A0118_A0242_WAIT17_A0316_A0415_A0514_A0637_RDY/BSY12_A0736_WE11_A0810_A099_OEI8_A1032_CE27_CE1I31_D156_D0730_D145_D0629_D134_D0528_D12
50_GND
38_VCC13_VCC
46_BVD1
21_D00
45_BVD240_VS2
26_CD1
25_CD2
41_RESET39_CSEL
35_IOWR34_IORD
33_VS124_WP
43_INPACK
1_GND
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241
SCHEM, ROHS COMPLIANT
2-3:EXP in Chain1-2: Bypass EXP
EXP JTAG
Silkscreen
Failsafe Mode EnabledOR =
FPGA & CPU
to FPGA
Combined
Silkscreen"System ACE"
"Status LED""System ACE"
Silkscreen
From CPLD
From CLKGEN
"Error LED"
FPGA PROG
Silkscreen:PROG
System ACEPC4 Connector
SysACE Failsafe Mode Jumpers
Silkscreen:"SYSACE RESET"
System ACE
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
A
BP
02
7 27
1-22-2008_14:51
3272
4948234722
204419184217161514371236111098
327
316
305
294
28
50
3813
46
21
4540
26
25
4139
3534
332443
1
P1
N7E50-7516PG-20
1
2R52
1%
1.21K
2
1
3
4
SW4
SYSACE_RESET_B
7140383634
90122124127143
2829303132
2122232427
20191614
7811
414243444547484950515253565859606162636566676869707677
7879
868788
93959698
132
135
140141
91
100
7583645446
120
136
129
14491826
1312
103104105106107113114115116117118119138121
6
4
123125130131
134
139
3142
5
137
133
111
89
35
126
110
112
97
101
102
808582
81
72
74
108
33
128
109
73
92
55
37
17
199
94
84
57
25
15
10
39
2
U2XCCACE-TQ144I
1234567891011121314
J1
87832-1420
NCNC
NC
SYSACE_MPOE_USB_RD_B
CFG_ADDR_OUT2CFG_ADDR_OUT1CFG_ADDR_OUT0
96
RP2
4.7K
5% 6
10
5%
4.7KRP2
4
3
1
2
SW5
13 5%
4.7KRP2
41
RP2
4.7K
5%
15 5%
4.7KRP2
76
RP2
4.7K
5%
68 5%
4.7KRP2
SYSACE_ERR_LED
2
1
1.21K
1%
R53
2 1
1%140
R50
12R51
140 1%
SYSACE_TDI
FPGA_TDOEXPANSION_TDO
FPGA_EXP_TCKFPGA_EXP_TMSFPGA_TDI
SYSACE_CFGMODEPIN
CPLD_TDO
PC4_TMSPC4_TCKPC4_TDOPC4_TDI
1 2 3
J21
2 1H-1X2
J18 12
H-1X2 J19
SYSACE_CFA00
SYSACE_CFA06
SYSACE_CFD00
SYSACE_CFD05
SYSACE_CFD10
SYSACE_CFDE
12
LED-GRN-SMTDS3
12
LED-RED-SMTDS4
NC
NC
SYSACE_ERR_LED
SA_ERR_RES
SA_STAT_RES
8 7 6 5
4321
X5R
10V
0.1UF
CP3
1 2 3 4
5678
CP2
0.1UF
10V
X5R
8 7 6 5
4321
X5R
10V
0.1UF
CP1
SYSACE_STAT_LED
PC4_HALT_B
FPGA_PROG_B SYSACE_ERR_LED
SYSACE_RESET_B
SYSACE_CFRDBSY
NCNCNCNCNCNC
NC
SYSACE_CFCD2
SYSACE_CFD09SYSACE_CFD02SYSACE_CFD08SYSACE_CFD01
SYSACE_CFREGSYSACE_CFA01SYSACE_CFA02SYSACE_CFWAITSYSACE_CFA03SYSACE_CFA04SYSACE_CFA05
SYSACE_CFA07SYSACE_CFWESYSACE_CFA08SYSACE_CFA09
SYSACE_CFA10SYSACE_CFCE2SYSACE_CFCE1SYSACE_CFD15SYSACE_CFD07SYSACE_CFD14SYSACE_CFD06SYSACE_CFD13
SYSACE_CFD12SYSACE_CFD04SYSACE_CFD11SYSACE_CFD03SYSACE_CFCD1
FPGA_PROG_B
CLK_33MHZ_SYSACE
FPGA_INIT_B
SYSACE_MPBRDY
SYSACE_MPWE_USB_WR_BSYSACE_MPA00SYSACE_MPA01_USB_A0
SYSACE_MPA03SYSACE_USB_D0SYSACE_USB_D1SYSACE_USB_D2SYSACE_USB_D3SYSACE_USB_D4SYSACE_USB_D5SYSACE_USB_D6SYSACE_USB_D7SYSACE_USB_D8SYSACE_USB_D9SYSACE_USB_D10
SYSACE_USB_D13SYSACE_USB_D14
SYSACE_MPA04
SYSACE_MPCESYSACE_MPIRQ
SYSACE_MPA02_USB_A1
SYSACE_USB_D15
SYSACE_MPA05SYSACE_MPA06
SYSACE_USB_D12SYSACE_USB_D11
NC
NCNC
NCNC
NCNC
NCNC
NC
NCNC
NCNC
NC
NCNC
NCNC
NC
NCNC
FPGA_PROG_B
21
RP2
4.7K
5%
VCC3V3 VCC1V8
VCC3V3VCC3V3
VCC1V8
VCC1V8
VCC1V8
VCC1V8
VCC3V3
VCC3V3
VCC3V3
VCC1V8
VCC3V3
VCC3V3
HDR_1x7
GND
A
OE
Y
VCC
VCC3V3
NC7NC6
NC4NC5
NC3NC2
DINCLK
CS_BDOUT
VDDHOLD_B
GNDWR_B
NC1NC0
VCC3V3VCC3V3
VCC3V3
VCC3V3
D7_48D6_47GND_46
VCCO_45D5_44D4_43DNC_42DNC_41DNC_40DNC_39
VCCO_38DNC_37GND_36DNC_35
VCCINT_34D3_33D2_32GND_31
VCCO_30D1_29D0_28
REV_SEL1_27REV_SEL0_26
EN_EXT_SEL_B_25VCCJ_24GND_23TDO_22
DNC_1GND_2DNC_3VCCINT_4BUSY_5CF_B_6GND_7VCCO_8CLKOUT_9CEO_B_10OE/RESET_B_11CLK_12CE_B_13DNC_14VCCINT_15DNC_16GND_17DNC_18TDI_19TCK_20TMS_21
D7_48D6_47GND_46
VCCO_45D5_44D4_43DNC_42DNC_41DNC_40DNC_39
VCCO_38DNC_37GND_36DNC_35
VCCINT_34D3_33D2_32GND_31
VCCO_30D1_29D0_28
REV_SEL1_27REV_SEL0_26
EN_EXT_SEL_B_25VCCJ_24GND_23TDO_22
DNC_1GND_2DNC_3VCCINT_4BUSY_5CF_B_6GND_7VCCO_8CLKOUT_9CEO_B_10OE/RESET_B_11CLK_12CE_B_13DNC_14VCCINT_15DNC_16GND_17DNC_18TDI_19TCK_20TMS_21
DATA_IN
CLOCK
SELECT_B
WRITE_B
HOLD_B
GND
VDD
DATA_OUT
VCC3V3
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241
SCHEM, ROHS COMPLIANT
1
TDI
TDO
TCK
GND
VCC3V3
SysACE Config, Mode pins
VCC3V3
GND
TCK
TDO
TDI
Silkscreen:
TMS
Misc ConfigPlatform Flash,SPI Flash
Silkscreen:
SPI Program Header
INIT
TMS
PROG_B
SPI Prog
Config DIP switches Toggles connection from Plat Flash D0 to SRAM D0
SPI Flash
Platform Flash #1
Platform Flash #2
Populate to BypassPlat Flash #2
Platform Flash, SPI FlashMisc Config,
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
A
8 27
1-22-2008_14:51
02
BP
1
2
R49
05%
1
2
R59
84.5
1%
2
1
1%11
3R55
1 2
R58 0 5%
CFG_ADDR_IN0
CFG_ADDR_IN2
CFG_ADDR_OUT0CFG_ADDR_OUT1
CFG_ADDR_OUT1FPGA_DIN-R
PROM_CCLK-C
SRAM_FLASH_D7SRAM_FLASH_D6
SRAM_FLASH_D5SRAM_FLASH_D4
SRAM_FLASH_D3SRAM_FLASH_D2
PLAT_FLASH_EXT_SEL_B
FPGA_DINSRAM_FLASH_D1
PLAT_FLASH_EXT_SEL_BCFG_ADDR_OUT0
SRAM_FLASH_D1
SRAM_FLASH_D3SRAM_FLASH_D2
2
1 1%49
.9
R65
FPGA_DOUT_BUSY-R
12R61 DNP 1%
2
1 C18
0.1UF10VX5R
8 7 6 5
4321
X5R
10V
0.1UF
CP11
1 2 3 4
5678
CP10
0.1UF
10V
X5R
5
6
1
3
7
48
2
U6BM25P80
212019181716151413121110987654321
222324 25
2627282930313233343536373839404142434445464748
TSOP50P2000X1200-48XCF32P-VOG48
U5
PROM_CCLK-R
FPGA_CCLK
PLAT_FLASH_CF_B
SRAM_FLASH_D5SRAM_FLASH_D4
SRAM_FLASH_D6SRAM_FLASH_D7
PLAT_FLASH2_TDO
PLAT_FLASH1_TDO
FPGA_PROG_B
FPGA_DIN-R
PLAT_FLASH_CE2_B-R
1 2
R62
0 5%
12
R63
DNP 1%
2 1 1%DNPR57
NC
NC
12
R56DNP
1%
48474645444342414039383736353433323130292827262524
2322
123456789101112131415161718192021
U4
XCF32P-VOG48TSOP50P2000X1200-48
SPI_DIN
FLASH_CE_B
SPI_CE_B
SPI_CE_B
FLASH_OE_BFPGA_CCLK
SPI_DIN
SPI_CE_B
FPGA_CCLK
FLASH_OE_B
2 1 1%49.9R60
1413
1112
65
1516
78
21
109
43
M25P16-VMF6PU6
12345678
161514131211109
SW3
SDMX-8-X
NC
NC
2 1
1.21K 1%
R64
FPGA_DIN
FPGA_CCLK
FLASH_OE_B
FPGA_PROG_B
3
2
1
4
5
U7
SN74LVC1G126
1
2
3
4
5
6
7
J2
2
1X5R10V0.1UF
C19
NCNCNC
NCNCNCNC NC
NC
NC
NC
NCNCNCNC
NCNCNCNC
NC
NCNC
NC
NC
NC
NC
NC
FPGA_DOUT_BUSY-R
PROM_CCLK-R
1 2 3 4
5678
CP13
0.1UF
10V
X5R
8 7 6 5
4321
X5R
10V
0.1UF
CP12
FPGA_DOUT_BUSY
FPGA_CCLKPLAT_FLASH_CE2_BFPGA_INIT_B
PLAT_FLASH_CE_B
PC4_TDIPC4_TCKPC4_TMSPLAT_FLASH1_TDO
FPGA_INIT_B
PLAT_FLASH_CE2_B
PC4_TCKPC4_TMS
FPGA_FALLBACK_ENFPGA_M0 SRAM_FLASH_D0
FPGA_DIN
SRAM_FLASH_D0_EN
SYSACE_CFG_EN
FPGA_M1FPGA_M2
CFG_ADDR_IN1
FPGA_PROG_BPLAT_FLASH_CF_B
GND1GND2GND3GND4GND5GND6GND7
SIG
GND1GND2GND3GND4GND5GND6GND7
SIG
VCC3V3
VCC3V3
VCC3V3
GND_SUPRCLK
GND_SUPRCLK
GND_SUPRCLK
GND_SUPRCLK
VCC3V3 VCC3V3VCC3V3
VCC3V3
GND_SUPRCLK
HDR_1x6
VCC3V3
VCC3V3
VCC3V3
GND_SUPRCLK
VCC3V3
VCC3V3
GND_SUPRCLK
Q1_P
Q0_P
Q2_P
PCLK_P
Q3_N
CLK_N
Q0_N
Q1_N
Q2_N
Q3_P
VDD_18
GND_13
GND_1GND_9
PCLK_N
CLK_P
VDD_10
CLK_EN
OECLK_SEL
VCC
VEE_1
REF_OE
SEL1
M0
N1
SEL0
XTAL_IN0XTAL_OUT0
XTAL_OUT1XTAL_IN1
VEE_2
Q0_NQ0_P
VCCA
MSTR_RST
N0
N2
M1M2
TEST_CLK
VCCO_CMOS
VCCO_PECL
REF_CLK
CLK0_N
CLK1_NCLK1_P
CLK0_P
NC_7
VDD_8VDD_13
NC_5
CLK_SEL
NC_16
Q_NQ_P
GND2GND3GND4GND5
GND1
1
0
GND
OE
OUT
VCC
OSC
GND
OE
OUT
VCC
OSC
GND_SUPRCLK
GND1GND2GND3GND4GND5GND6GND7
SIG
GND1GND2GND3GND4GND5GND6GND7
SIG
23_AVDD
26_VDD17_VDD12_VDD
32_VDD
OUT6_13
OUT5_P_15
OUT5_N_16
OUT4_N_11
28_SHUTDOWN/OE
30_GND
9_GND2_GND
14_GND18_GND
OUT4_P_10
5_XTALOUT
4_XTALIN/REFIN
1_CLKIN
27_GIN3/SUSPEND
22_IIC/JTAG_B
21_GIN5/CLK_SEL25_GIN4/TRST_B
GIN0/SDA/TDI_19
OUT2_29
OUT3_8
GIN2/TMS_24
GIN1/SCLK/TCLK_20GOUT0/TDO/LOSS_LOCK_31
7_VDD
OUT1_6
GOUT/LOSS_CLKIN_3
IDT5V9885TQFP32
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241"JTAG EN"
Silkscreen:
Default to 25MHz
TDI
TDO
TCK
GND
TMS1
IIC Address = 0x6a
3.3V
To FPGA
To MGT
Clocking - Differential Clock,System Clock & User Clock
User ClockSystem Clock Generation
"CLK GEN"
Diff Clocks: SMAs, Generation, MUX and Buffer
CLK Prog
Silkscreen:
SCHEM, ROHS COMPLIANTDifferential Clock, System Clock, User Clock
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
A1-22-2008_14:51
27902
BP
23
261712
32
13
15
16
11
28
30
92
1418
10
5
4
1
27
22
2125
19
29
8
24
2031
7
6
3
U8
IDT5V9885
2
1 1%
124R223
2
1 1%
84.5
R222
1
2
R221
124
1%
10
6
RP6
10K
5%
CLK_TCK
SMA_DIFF_CLK_OUT_N
SMA_DIFF_CLK_OUT_P
2345678
1
J13 32K10K-400E3
1
8765432
32K10K-400E3J12
CLKMUX_SEL
12
J54
GND_CLKMUX
21
1%100
R226
VCCA_SUPRCLK
SUPRCLK1_Q0_N
SUPRCLK1_Q0_P
VCC_SUPRCLK
CLKBUF_D0_N
72
RP9
475%
1
2
R220
84.5
1%
SUPRCLK1_XTAL1_I
SUPRCLK1_XTAL1_O
SUPRCLK1_XTAL0_O
8
5
1
4
110880X5
4
1
5
8
X1110880
2
4
9
1514
3
1
7
12
813
5
6
16
1011
17
U12
ICS85401
10
8
22
17
19
3
16
1413
1112
23
76
9
18
2
4
2021
15
1
5
24
U10
ICS843001-21
17
20
15
6
11
5
19
16
14
12
18
13
19
7
4
10
2
83
U11
ICS8543
GND_CLKMUX
USER_CLK-R
CLKBUF_D0_P
CLKBUF_Q3_N
CLKBUF_Q3_P
36
5%47
RP9
54
RP9
475%
18
5%47
RP9
SMA_DIFF_CLK_IN_P
CLK_OUT6-R
CLK_OUT3-R
CLK_OUT2-R
CLK_OUT1-R
NC
CLK_FPGA_N
21
5%10R66
1 2
R78 10 5%
1 5
5%10KRP6
SUPRCLK1_N2-R
1 8RP8 4.7K 5%72
5%4.7KRP8 3 6RP8 4.7K 5%54
5%4.7KRP8 1 8RP7 4.7K 5%72
5%4.7KRP7 3 6RP7 4.7K 5%54
5%4.7KRP7
VCC_SUPRCLK
SUPRCLK1_SEL0SUPRCLK1_SEL1SUPRCLK1_M2SUPRCLK1_M1SUPRCLK1_M0SUPRCLK1_N2SUPRCLK1_N1SUPRCLK1_N0
SUPRCLK1_XTAL0_I
ABLS
X325.5625MHZ
2
1 C37
0.1UF
10VX5R
2
10.1UF
C30
10VX5R
2
1
X5R10V
C290.1UF
2
1
X5R10V
C280.1UF
2
10.1UF
C27
10VX5R
2
1
X5R10V
10UFC26
2
10.1UF
C25
10VX5R
2
10.1UF
C24
10VX5R
21C23
22PF
50V
NPO
21
NPO
50V
22PF
C22
21C21
22PF
50V
NPO
21
NPO
50V
22PF
C20
2
1 C32120PF
50VNPO
2
1 C310.01UF16VX7R
1
2X5R10V
0.1UFC36
2
1 C350.1UF10VX5R
1
2X5R10V
0.1UFC34
2
1 C330.1UF10VX5R
1 2 3 4
5678
CP21
0.01UF
16V
X7R
8 7 6 5
4321
X5R
10V
0.1UF
CP20
1 2
FB5FERRITE-220
21
RP6 10K 5%
1 3
5%10KRP6
41
RP6 10K 5%
12
RP5
5%
4.7K
12345678
161514131211109
SW6 SDMX-8-X
1 2
R69
27.4 1%
SUPRCLK_OE1 2
5%0
R70
VCC_SUPRCLK
1 2
FERRITE-220
FB6
GND_CLKMUX
CLK_TDI
6
5
4
3
2
1
J31 2
R80
0 5%
21
5%0
R79
SUPRCLK_TCLK-R
VCC_SUPRCLK
SUPRCLK_TCLK
VCC_CLKMUX
1
2
1%4.
75KR71
CLKBUF_Q1_NCLKBUF_Q1_P
CLKBUF_Q0_C_NCLKBUF_Q0_C_P
1
2 J14
AVDD_CLK
AVDD_CLK
21
1%27.4
R81
25MHZ X2ABLS
1 2
R7727.4 1%
1 2
R7627.4 1%
21
1%27.4R72
21
1%27.4R74
21
1%27.4R75
1
TP1
1 2R73
27.4 1%
USER_CLK
1 2
FERRITE-220
FB8
1 2
FB7FERRITE-220
VCC_CLKMUX
VCC_CLKMUXVCC_SUPRCLK
VCC_SUPRCLK
VCCA_SUPRCLK
NC
NCNC
VCC_SUPRCLK
1
2
1%D
NPR68
1
2
R67
DN
P1%
VCC_SUPRCLK
19.44MHZ X4
ABLS
NC
CLK_27MHZ_FPGA
CLK_FPGA_P
CLK_33MHZ_FPGA
CLK_33MHZ_SYSACE
CLK_12MHZ_USB
CLK_24.576MHZ_AUDIO
CLK_25MHZ_ENET
CLK_XTAL_OUT
CLK_XTAL_IN
CLK_OUT4N-R
CLK_OUT4P-R
CLK_LOSS_TPCLK_IIC_JTAG_B
IIC_SCL_MAIN
IIC_SDA_MAIN
NC
NC
NC
31
4.7K
5%
RP5
14
RP5
5%
4.7K
51
4.7K
5%
RP5
67
RP5
5%
4.7K
86
4.7K
5%
RP5
69
RP5
5%
4.7K
10
6
4.7K
5%
RP5
CLK_TDO
2345678
1
J10 32K10K-400E3
2345678
1
32K10K-400E3J11
SUPRCLK1_N0-R
SUPRCLK1_N1-R
SUPRCLK1_M0-R
SUPRCLK1_M1-R
SUPRCLK1_M2-R
SUPRCLK1_SEL1-R
SUPRCLK1_SEL0-R
SMA_DIFF_CLK_IN_N
CLK_TMS
2
1
5%
0R224
CLKBUF_Q2_NCLKBUF_Q2_P
FPGA_DIFF_CLK_OUT_PFPGA_DIFF_CLK_OUT_N
1
2
R22
7
100
1%
96
5%10
KR
P68
6
RP6
10K
5%7
6
5%10
KR
P6
VCC2V5VCC2V5VCC2V5VCC2V5
P2
P1
P3
P4
Pushbutton
P2
P1
P3
P4
Pushbutton
P2
P1
P3
P4
Pushbutton
VCC1V8
P2
P1
P3
P4
Pushbutton
VCC1V8
SW2
ACOM
SW1A
BSW1B
Edge DriveJog Encoder
P2
P1
P3
P4
Pushbutton
VCC3V3
VCC3V3
VCC3V3
VCC3V3
VCC3V3
P2
P1
P3
P4
Pushbutton
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241
SCHEM, ROHS COMPLIANT
GPIO LEDs and Buttons
West EastCenter
South
North
LEDs:0 1 2 3 4 765
Silkscreen:CPU RESET
GPIO - Buttons, LEDs, Switches
Edge Drive Jog Encoder Switch
Mounting Holes
GPIOGPIO Buttons, LEDs, Switches,
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
BP
02
10 27
1-22-2008_14:51 A
GPIO_LED_3
GPIO_LED_3-F
CPLD_LED_4-R
CPLD_LED_4
67
5%12
0RP1
0
1
MH5
2
1
3
4
SW10
GPIO_SW_C
4
3
1
2
TL3301EF100QGSW7
GPIO_SW_N
4
123
65
SW2
ROTARY_ENCODER
FPGA_ROTARY_INCA
FPGA_ROTARY_PUSHFPGA_ROTARY_INCB
69
5%
4.7KR
P13
86
RP1
3
4.7K
5%
10
6R
P13
4.7K
5%2
1
3
4
SW14
1
MH2
1
MH1
1
MH4
21
RP1
2
4.7K
5%
67
5% 4.7K
RP13
68
5%
4.7KR
P12
76
RP1
2
4.7K
5%
3 1RP13
4.7K5%
2 1RP13
4.7K5%
5 1RP13
4.7K5%
14
5% 4.7K
RP13
10
6R
P14
150
5%
12
5%
150
RP1
4
21
RP1
1
150
5%
12345678
161514131211109
SW8
SDMX-8-X
4
3
1
2
SW11BUSERR_2-R
BUS_ERROR_2
GPIO_LED_5GPIO_LED_6GPIO_LED_7
13
2
Q1NDS331N
1
32
Q3NDS331N
23
1
NDS331N
Q4
23
1
NDS331N
Q2
CPLD_FPGA_INIT_B
4
3
1
2
SW13
2
1
3
4
SW12
12LED-GRN-SMT
DS17
21
DS16
LED-GRN-SMT
21
DS15
LED-GRN-SMT
12LED-GRN-SMT
DS14
CPLD_FPGA_DONE
12DS2
LED-GRN-SMT
12
LED-RED-SMT
DS6
BUS_ERROR_1
21
DS5
LED-RED-SMT
21
DS22
LED-GRN-SMT
12
LED-GRN-SMT
DS21
12
LED-GRN-SMT
DS23
21
DS24
LED-GRN-SMT
CPLD_LED_2CPLD_LED_1CPLD_LED_0
GPIO_DIP_SW8GPIO_DIP_SW7GPIO_DIP_SW6GPIO_DIP_SW5
GPIO_DIP_SW3GPIO_DIP_SW4
GPIO_DIP_SW2GPIO_DIP_SW1 2
1
DS20
LED-GRN-SMT
12DS1
LED-GRN-SMT
BUSERR_1-R
INIT_B-R
DONE-R
CPLD_LED_2-R
CPLD_LED_1-R
CPLD_LED_0-R
CPLD_LED_W
CPLD_LED_S
CPLD_LED_C
CPLD_LED_N
CPLD_LED_E
CPLD_LED_N-R
CPLD_LED_S-R
CPLD_LED_E-R
CPLD_LED_W-R
CPLD_LED_C-R
NC
NC
NC
13
5%
150
RP1
1
41
RP1
1
150
5%
15
5%
150
RP1
1
76
RP1
1
150
5%
68
5%
150
RP1
1
96
RP1
1
150
5%
610
5%
150
RP1
1
31
RP1
4
150
5%
14
5%
150
RP1
4
51
RP1
4
150
5%
67
5%
150
RP1
4
86
RP1
4
150
5%
69
5%
150
RP1
4
13
5%
4.7KR
P12
41
RP1
2
4.7K
5%
15
5%
4.7KR
P12
96
RP1
2
4.7K
5%
610
5%
4.7KR
P12
FPGA_CPU_RESET_B
GPIO_SW_W
GPIO_SW_E
GPIO_SW_S
1
MH3
1
MH8
NC
NC
NC
NC
12
5%12
0RP1
0
31
RP1
0
120
5%1
4
5%12
0RP1
0
51
RP1
0
120
5%
86
RP1
0
120
5%
69
5%12
0RP1
0
10
6R
P10
120
5%
12
LED-GRN-SMT
DS10
12
LED-GRN-SMT
DS13
21
DS12
LED-GRN-SMT
21
DS11
LED-GRN-SMT
GPIO_LED_7-F
GPIO_LED_7-R
GPIO_LED_6-F
GPIO_LED_5-F
GPIO_LED_3-R
GPIO_LED_5-R
GPIO_LED_6-R
VCC3V3
VCC2V5
VCC5
HDR1x32
HDR1x32
VCC3V3
VCC3V3
VCCO_EXPVCC2V5 VCC3V3
VCC3V3
VCC3V3
FULL
SOFTTOUCHPRO
MICTOR 38
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241
SCHEM, ROHS COMPLIANT
Mark Pin 1
Pin 14 must be removed.
1-3 & 2-4 = 3.3V3-5 & 4-6 = 2.5V
Matched Length Traces
Matched Length Traces
Connector Voltage
XGI - ExpansionConnector
Differential Pairs
Independent signals
Bank 11/13 Expansion
(CPU TDI)
BDM
MictorSoftTouch ProXGI Expansion Interface
XGI - Expansion Headers
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
BP11 27
1-22-2008_14:51
02
A
GPIO_LED_2GPIO_LED_4
CPU_TRST
CPU_TDO
FPGA_CS0_B
CPU_TCK
CPU_TMS
PC4_HALT_B
MICTOR_5
MICTOR_23
TRC_CLK
TRC_TS6
21
RP1
5
10K
5%
HDR2_44_SM_14_P
HDR2_36_SM_15_P
16
19
15
9
53
G5G4G3G2G1
3032
2 1
7
1113
17
2123
292725
31333537
468
101214
182022242628
343638
MICTR38P_REC
P22
B26
A27
A6 B6
A7 B7
A8 B8
A9 B9
A10
B1
B10
A11 B11
B12
A13 B13
A14 B14
A15 B15
A16 B16
A17 B17
A18 B18
A19 B19
B20
A21 B21
A22 B22
A23 B23
A24 B24
A25
A3
B25
B3
A4 B4
A5
A26
B27
A12
A20
B2
B5
A1
A2
J16
HDR1_26
HDR1_18
HDR1_32
HDR1_24
HDR1_30
HDR1_26
HDR1_22
96
RP1
5
10K
5%
76
RP1
5
10K
5%
21
5%0
R82
IIC_SDA_MAIN
IIC_SCL_MAIN
1
3 2
Q9NDS331N
IIC_SCL_EXP
23
1
NDS331NQ8
NC
1
1011 1213 1415 1617 1819
2
2021 2223 2425 2627 2829
3
3031 3233 3435 3637 3839
4
4041 4243 4445 4647 4849
5
5051 5253 5455 5657 5859
6
6061 62
64
7 89
63
J6
1
10111213141516171819
2
202122232425
3
789
26272829303132
654
J5
456
32313029282726
987
3
252423222120
2
19181716151413121110
1
J7
12
346
5 J20
63
987
64626160
6
59585756555453525150
5
49484746454443424140
4
39383736353433323130
3
29282726252423222120
2
19181716151413121110
1
J4
15
13
1211
9
7
1 2
3
5 6
4
8
10
14
16
J51
J15
NC
NC
NC
FPGA_TDO
GPIO_LED_1GPIO_LED_0
FPGA_EXP_TCKEXPANSION_TDO
GPIO_LED_NGPIO_SW_NGPIO_LED_CGPIO_SW_CGPIO_LED_WGPIO_SW_WGPIO_LED_SGPIO_SW_SGPIO_LED_EGPIO_SW_E
FPGA_EXP_TMS
IIC_SDA_EXP
HDR1_52
HDR1_24
HDR1_18HDR1_20
HDR1_28
HDR1_32
HDR1_60HDR1_58HDR1_56HDR1_54
HDR1_50HDR1_48HDR1_46HDR1_44HDR1_42HDR1_40HDR1_38HDR1_36
HDR1_14HDR1_12HDR1_10HDR1_8
HDR1_4HDR1_2
HDR1_6
HDR1_16
HDR1_34
HDR1_62HDR1_64
CPU_VCC
NC
NC
NC
NC
NC
NC
NC
NC
MICTOR_16MICTOR_18MICTOR_20MICTOR_22
MICTOR_25MICTOR_27MICTOR_29MICTOR_31MICTOR_33MICTOR_35MICTOR_37
NC
FPGA_CS0_BCPU_TRST
PC4_HALT_B
CPU_TDO
TRC_TS1OTRC_TS2O
TRC_TS2E
TRC_VSENSE
CPU_TCKCPU_TMS
NCNC
NC
NC
NCNC
NCNC
TRC_TS1E
TRC_TS3TRC_TS4TRC_TS5
HDR1_4HDR1_2
HDR1_64HDR1_62HDR1_60
HDR1_58HDR1_56HDR1_54HDR1_52
HDR1_50
HDR1_48HDR1_46
HDR1_44HDR1_42HDR1_40
HDR1_38HDR1_36HDR1_34
HDR1_30HDR1_28
HDR1_22HDR1_20
HDR1_16HDR1_14HDR1_12
HDR1_10
HDR1_6HDR1_8
610
5%10
KRP1
5
NC
NC
HDR2_40_SM_6_P
HDR2_58_SM_4_N
HDR2_52_SM_5_P
HDR2_36_SM_15_P
HDR2_42_SM_14_NHDR2_44_SM_14_P
HDR2_48_SM_12_P
HDR2_56_SM_13_P
HDR2_4_SM_8_P
HDR2_8_SM_7_P
HDR2_60_SM_4_P
HDR2_2_SM_8_N
HDR2_6_SM_7_N
HDR2_38_SM_6_N
HDR2_50_SM_5_N
HDR2_54_SM_13_N
HDR2_64_SM_9_P
HDR2_46_SM_12_N
HDR2_62_SM_9_N
HDR2_22_SM_10_NHDR2_24_SM_10_PHDR2_26_SM_11_NHDR2_28_SM_11_P
HDR2_34_SM_15_N
HDR2_30_DIFF_3_NHDR2_32_DIFF_3_P
HDR2_20_DIFF_2_PHDR2_18_DIFF_2_NHDR2_16_DIFF_1_PHDR2_14_DIFF_1_NHDR2_12_DIFF_0_PHDR2_10_DIFF_0_N
HDR2_34_SM_15_N
HDR2_42_SM_14_N
15
5%10
KRP1
5
41
RP1
5
10K
5%
13
5%10
KRP1
5
86
RP1
5
10K
5% 1
2R91
332
1%
VCC3V3
VCC5
VCC3V3
VCC1V8
VCC1V8
VCC5
VCC3V3
VCC5
VCC5
VCC5
VCC1V8
VCC3V3
SCLSDA
A0A1A2
WP
VCCGND
VCC3V3
VCC3V3
VCC1V8
VID3/GPIO3VID2/GPIO2VID1/GPIO1VID0/GPIO0
VCCP2.5VIN/THERM_N
PWM1/XTO
12VIN/VID5
VID4/GPIO4D1_P
+5VIN
D1_N
PWM3/ADDREN_B
D2_P
SDA
GND
PWM2/ALERT_B
SCL
VCC
D2_NTACH1TACH2
TACH3
GPIO6/MULTI
VCC5
G
DT
S
D2
0
3V3
GND
T1IN T1OUTR1INR1OUT
T2INR2OUT
T2OUTR2IN
V+V-
C1+C1-
C2+C2-
VCC3V3
DCD
RXD
TXD
DTR
GND
DSR
RTS
CTS
RI
GND2
GND3
VCC5
NC6
VCC
NC2
SH2
DATA
GND
CLK
SH1
SH3
SH4
NC6
VCC
NC2
SH2
DATA
GND
CLK
SH1
SH3
SH4
HDR1x5
HDR1x5
VCC3V3
VCC5
VCC1V8VCCINT
VCC3V3
VCC3V3VCC3V3
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241
SCHEM, ROHS COMPLIANT
Silkscreen:
LCD Standoffs
LCD Header
To CPLD
To CPLD
"Keyboard"Silkscreen:
"Mouse"Silkscreen:
Silkscreen:"Fan Override"
Silkscreen:"LCD Contrast"
Silkscreen:
To FPGA
"Serial Port Select""1-2: FPGA"
Silkscreen:
Silkscreen:"Serial Port 2""(FPGA/USB)"
Pin 2: "+"Pin 3: "-"
IIC Address = 0x50
IIC Address = 0x2C
"Fan Power"
IIC EEPROM
PS/2 Mouse
Misc - LCD, PS2, UART, Fan Controller
"(FPGA)""Port 1""Serial "
To FPGA
To USB
DTE (Serial Host)
"2-3: USB Host"
IIC Fan ControllerLCD, PS2, UART, IIC EEPROM,
IIC Fan controller
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
96
RP2
01.
0K5%
10
6R
P20
1.0K
5%
86
RP2
01.
0K5%
76
RP2
01.
0K5%
41
RP2
01.
0K5%
51
RP2
01.
0K5%
31
RP2
01.
0K5%
21
RP2
01.
0K5%
A
02
1-22-2008_14:55
2712 BP
FLASH_AUDIO_RESET_B
1
2R97
4.75K
1%
2
1
1%
4.75K
R83
FAN_CNTRL_GPIO1
FAN_CNTRL_GPIO3NC
FAN_CNTRL_GPIO2
21
FERRITE-220
FB13
1 2
FB12
FERRITE-220
1 2
FB11
FERRITE-220
21
FERRITE-220
FB14
2 3
1
NDS331NQ15
SMB_DX_P
SMB_DX_N
5
4
3
2
1
J26
1
2
3
4
5
J25
SH4
SH3
SH1
631SH2
258
P5
VCC5_PS2
12
FB10FERRITE-220
VCC5_PS2
8 5 2 SH2
1 3 6SH1
SH3
SH4
P4
CONN_MS_CLK
CONN_MS_DATA
6
7
5%
4.7K
RP2
1
VCC5_PS2
NC
CONN_KBD_DATA
CONN_KBD_CLK
1
2
5%
4.7K
RP2
1
MOUSE_DATA
MOUSE_CLK
KEYBOARD_DATA
KEYBOARD_CLK
2
1 C48DNP
USB_SERIAL_TXUSB_SERIAL_RX
FPGA_SERIAL2_TXFPGA_SERIAL2_RX
NC
UART_RXD
1
2
3
4
5
6
7
8
9
10
11
P3 DB9M
CTS_RTS1B
108
465
321
79
H-2X5
J60
UART_V-
UART_V+
UART_TXD
UART_T1O
16
15
11 141312
109
78
26
13
45
U13
ADM3202ARUZTSOP65P640X500-16
FPGA_SERIAL1_TXFPGA_SERIAL1_RX
UART2_SIN UART_R1I
1
2R84
4.75K
1%
1
2X5R10V
0.1UFC42
1
2X5R10V
0.1UFC41
2
1 C380.1UF
10VX5R
6
8
5%
4.7K
RP2
2
7
6
RP2
2
4.7K
5%
1
3
5%
4.7K
RP2
2
2
1
RP2
2
4.7K
5%
10
6
RP2
1
4.7K
5%
6
9
5%
4.7K
RP2
1
5
1
RP2
1
4.7K
5%
1
4
5%
4.7K
RP2
1
8
6
RP2
1
4.7K
5%
3
1
RP2
1
4.7K
5%
IIC_SDA_MAINIIC_SCL_MAIN
2
1 C47
0.1UF10VX5R
2
1
5%
0R90
1 2 3
J31
KEYED_H-1X3
1
4
32
Q10
1
2
J32
8765
2322
24
21
1918
20
17
13
16
1
3
10
2
4
151112
9
14
U14ADT7476
321J63
CTS_RTS1
CTS_RTS2
DSR_DTR_DCD2
DSR_DTR_DCD1
NC
97
1 235 6
4
810
J61
H-2X5
UART2_SOUT
321
J62
1
2X5R10V
0.1UFC40
UART_C2-
2
1 C390.1UF
10VX5R
UART_C2+
23
1
NDS331NQ13
2
31
R860-2K
1/2W20%
2
1
R89
DNP
1%
65
123
7
84
U15
M24C08-WDW6TP
1413121110987654321
J8
23
1
NDS331NQ11
1
3 2
Q12NDS331N
2
1 C49
0.1UF10VX5R
2 1
1%4.75K
R88
2
1 C43470PF
50VX7R
NC
NC
NC
NCNC
LCD_CPLD_DB5
1
MH7
1
MH6
NC
NC
NC
NC
LCD_CPLD_DB7 LCD_CPLD_DB6LCD_CPLD_DB4
LCD_CPLD_ELCD_CPLD_RS LCD_VEE
LCD_CPLD_RW
NC
NC
NCNC
NC
NC
NC
NC
NC
1
2X7R50V
470PFC44
2
1 C45470PF
50VX7R
1
2X7R50V
470PFC46
1
3 2
Q14NDS331N
21
1%6.81K
R85
UART_C1-
UART_C1+
2
1
1%DNPR87
FAN_ALERT_B
31
2
D5
BZX84C153.3V250MW
NC
FAN_ALERT_B-F
FAN_CNTRL_TACH1
4
1
RP2
2
4.7K
5%
1
5
5%
4.7K
RP2
2
9
6
RP2
2
4.7K
5%
6
10
5%
4.7K
RP2
2
DSR_DTR_DCD1B
NC
CONN_KBD_CLK
CONN_KBD_DATA
CONN_MS_DATA
CONN_MS_CLK
NC
VCC5_PS2
NC
FAN_CNTRL_GPIO4
IIC_SCL_MAINIIC_SDA_MAIN
VTTDDR
VTTDDR
VTTVREF
VTTVREF
VTTDDR
VCC1V8
VCC1V8
VCC1V8
VTTDDR VCC1V8
VCC1V8
DQS4_P
VSS57
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10
VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
VDD12
VDD11
VDD10
VDD9
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
SA1
SA0
NC2
NC4
NC6
NC7
NC3
A1
DQ9
DQ8
DQ7
DQ63
DQ62
DQ57
DQ47
DQ42
DQ41
DQ35
DQ34
DQ32
DQ30
DQ26
DQ19
DQ17
DQ14
DQS2_P
DQS7_N
DQ2
DQ3
DQS0_P
DQ12
DQ13
DM1
CK0_N
DQ5
DQ4
DQ0
DQ1
DM0
DQS0_N
DQ6
CK0_P
DQS1_N
DQS1_P
DQ10
DQ15
DQ11
DQ16
DQ20
DQ21
DQS2_N
DM2
DQ18
DQ22
DQ23
DQ24
DQ28
DQ25
DQ29
DM3
DQS3_N
DQS3_P
DQ31
DQ27
DQ33
DQ36
DQ37
DQ38
DQ39
DM4
DM6
DQS5_P
DQ45
DQ43
DQ46
DQ48
DQ52
DQ49
DQ53
DQ51
DQ54
DQ50
DQ55
DQ58
DQ59
DQ61
DQS7_P
DM7
DQS6_N
DQS6_P
DQS5_N
DM5
DQS4_N
VDD8
ODT1
VSS42
DQ60
DQ56
VSS23
VSS32
VDDSPD
DQ44
DQ40
ODT0
S1_B
CAS_B
S0_B
WE_B
RAS_B
BA0
BA1
A0
A10/AP
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
CKE0
CKE1
SDA
SCL
VREF
NC8
CK1_N
CK1_P
BA2
A13
NC1
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241
SCHEM, ROHS COMPLIANT
Silkscreen:"DDR2 SO-DIMM" DDR2 SO-DIMM
Place Nearpin 1 of P2
DDR2 SO-DIMM
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
A
02
1-22-2008_14:51
2713 BP
18
RP26
47
5%
27
RP26
47
5%
DDR2_A9
36
RP26
47
5%
45
RP26
47
5%
72
RP28
47
5%
36
RP28
47
5%
45
RP28
47
5%
18
5%
47
RP25
27
5%
47
RP25
36
5%
47
RP25
54
RP25
47
5%
18
5%
47
RP29
27
5%
47
RP29
45
RP29
47
5%
18
5%
47
RP27
27
5%
47
RP27
36
5%
47
RP27
45
5%
47
RP27
18
RP30
47
5%
27
RP30
47
5%
DDR2_A11
DDR2_A13
DDR2_A12
NC
131
196
190
184
178
172
168
162
1567872666054
150
144
132
128
122484240342824
1282
193
187
183
177
171
161
1557771655953
149
145
139
133
127
1214741393327211593
96
88
82
118
104
95
87
81
117
111
103
200
198
84
12050
16383
101
2523
16
194
192
181
154
151
143
137
135
123
7473
57
45
36
51
186
1719
13
2022
26
32
64 5 7
1011
14
30
2931
35
3837
4344
46
49
52
5556
58
61626364
676870
7675
125
124
126
134
136
130
170
148
142
153
152
157
158
159
160
175
174
173
176
189
191
182
188
185
167
169
146
147
129
112
119
138
180
179
165
18
199
140
141
114
115
113
110
109
108
107
106
102
105
100
99
98
97
94
92
93
91
90
89
79
80
195
197
1
69
166
164
85
116
86
P2
DDR2-SO-DIMM
1
2
C64330UF
2.5VTANT
1
2R95
4.75K
1%
96
RP3
14.
7K5%
10
65%
4.7K
RP3
1
86
5%
4.7K
RP3
17
6R
P31
4.7K
5%
51
5%
4.7K
RP3
14
1R
P31
4.7K
5%
31
5%
4.7K
RP3
11
25%
4.7K
RP3
1
1 2 3 4
5678
X5R
10V
0.1UF
CP38
DDR2_CLK0_P
DDR2_CLK0_P
DDR2_CLK0_N
DDR2_CLK0_N
DDR2_CLK1_P
DDR2_CLK1_P
DDR2_CLK1_N
DDR2_CLK1_N
2
1 C67
5.0PF50VNPO
2
1 C66
5.0PF50VNPO
1
2
C600.1UF
10VX5R
8 7 6 5
4321
X5R
10V
0.1UF
CP40
NC
2
1
1%
4.75K
R96
8 7 6 5
4321
X5R
10V
0.1UF
CP32
1
2
C620.1UF
10VX5R
1
2X5R10V
0.1UFC61
1 2 3 45678
CP39
0.1UF
10V
X5R
8 7 6 5
4321
X5R
10V
0.1UF
CP30
1 2 3 4
5678
CP31
0.1UF
10V
X5R
NC
NC
2
1 C510.1UF
10VX5R
8 7 6 5
4321
X5R
10V
0.1UF
CP34
1 2 3 4
5678
CP35
0.1UF
10V
X5R
8 7 6 5
4321
X5R
10V
0.1UF
CP36
2
1 C500.1UF
10VX5R
2
1 C520.1UF
10VX5R
1
2X5R10V
0.1UFC571
2X5R10V
0.1UFC561
2X5R10V
0.1UFC55
2
1
10VX5R
10UF
C63
2
1
10VX5R
10UF
C53
2
1
10VX5R
10UF
C58
NC
NC
DDR2_D[0:63]
DDR2_D63
DDR2_D62
DDR2_D59
DDR2_D58
DDR2_D61
DDR2_D57
DDR2_D60
DDR2_D56
DDR2_D55
DDR2_D51
DDR2_D54
DDR2_D50
DDR2_D53
DDR2_D49
DDR2_D52
DDR2_D48
DDR2_D47
DDR2_D43
DDR2_D46
DDR2_D42
DDR2_D41
DDR2_D45
DDR2_D40
DDR2_D44
DDR2_D35
DDR2_D39
DDR2_D34
DDR2_D38
DDR2_D37
DDR2_D33
DDR2_D36
DDR2_D32
DDR2_DQS4_N
DDR2_DQS4_N
DDR2_DM7
DDR2_DM6
DDR2_DM5
DDR2_DM[0:7]
DDR2_DM4
DDR2_DQS5_N
DDR2_DQS5_N
DDR2_DQS6_P
DDR2_DQS6_P
DDR2_DQS6_N
DDR2_DQS6_N
DDR2_DQS7_P
DDR2_DQS7_P
DDR2_DQS5_P
DDR2_DQS5_P
DDR2_D[0:63]
DDR2_D31
DDR2_D27
DDR2_D30
DDR2_D26
DDR2_D29
DDR2_D25
DDR2_D28
DDR2_D24
DDR2_D23
DDR2_D19
DDR2_D22
DDR2_D18
DDR2_D21
DDR2_D17
DDR2_D20
DDR2_D16
DDR2_D15
DDR2_D11
DDR2_D14
DDR2_D10
DDR2_D9
DDR2_D8
DDR2_D13
DDR2_D12
DDR2_D3
DDR2_D2
DDR2_D7
DDR2_D6
DDR2_D1
DDR2_D5
DDR2_D0
DDR2_D4
DDR2_DQS3_P
DDR2_DQS3_PDDR2_DQS3_N
DDR2_DQS3_N
DDR2_DM[0:7]
DDR2_DM3
DDR2_DM2
DDR2_DM1
DDR2_DM0
DDR2_DQS2_N
DDR2_DQS2_N
DDR2_DQS1_P
DDR2_DQS1_P
DDR2_DQS1_N
DDR2_DQS1_N
DDR2_DQS0_N
DDR2_DQS0_N
DDR2_DQS0_P
DDR2_DQS0_P
DDR2_DQS7_N
DDR2_DQS7_N
DDR2_DQS2_P
DDR2_DQS2_P
NCNCNCNCNC
DDR2_DQS4_P
DDR2_DQS4_P
DDR2_SCLDDR2_SDA
DDR2_ODT1
DDR2_ODT1DDR2_ODT0
DDR2_ODT0
DDR2_CS1_B
DDR2_CS1_B
DDR2_CS0_B
DDR2_CS0_B
DDR2_CAS_B
DDR2_CAS_B
DDR2_WE_B
DDR2_WE_B
DDR2_RAS_B
DDR2_RAS_B
DDR2_BA0
DDR2_BA0
DDR2_BA1
DDR2_BA1DDR2_BA2
DDR2_BA2
DDR2_CKE0
DDR2_CKE0
DDR2_CKE1
DDR2_CKE1
1
2X7R16V
0.01UFC68
45
5%
47
RP30
36
5%
47
RP30
DDR2_A10
NCNC
DDR2_A6
DDR2_A8
DDR2_A7
DDR2_A5
DDR2_A4
DDR2_A3
DDR2_A2
DDR2_A1
DDR2_A0
36
RP29
47
5%
81
5%
47
RP28
VCC2V5VCC2V5
VCCINTVCC2V5
VCC2V5
VCC2V5
VCC2V5VCCINT
VCC2V5VCCINT
VCCINT
VCC2V5
VCC2V5
VSS_127
VDDO_122
DVDD_117
VSS_106
AVDD_104
DVDD_96
VDDOH_97
DVDD_90DVDD_85DVDD_78
VDDOX_71
AVDD_64AVDD_59AVDD_52
VSS_65
VSS_9
CONFIG1
CONFIG3CONFIG4CONFIG5CONFIG6
CRS
HSDAC_N
LED_DPLX
LED_LINK10LED_LINK100
LED_LINK1000
LED_RXLED_TX
MDC
MDI1_N
MDI2_N
MDI3_N
MDIO
RXD1RXD2RXD3
RXD4RXD5RXD6
RXER
SIN_P
SCLK_PSCLK_N
TDI
TDO
TMSTRST_B
TXD0TXD1TXD2TXD3
TXD4TXD5
TXD7
TXER
SOUT_NSOUT_P
TCK
RXCLK
RXD0
RXDV
TXCLK
VSS_43
AVDD_49VDDOX_34
GTXCLK
TXEN
MDI0_P
RSETRESET_BCOMAINT_BCLK125
TXD6
RXD7
COL
SIN_N
CONFIG0
CONFIG2
DVDD_118
VDDOH_73
AVDD_44
DVDD_23DVDD_27
DVDD_17DVDD_12DVDD_6DVDD_2
VDDO_5
VSS_119VSS_116VSS_111VSS_108
VSS_103VSS_102VSS_101
VSS_93VSS_84VSS_83VSS_66
VSS_63VSS_60VSS_58
VSS_1
VSS_15VSS_21VSS_22
VSS_40VSS_38
VSS_45VSS_48VSS_51VSS_55
VDDO_30VDDO_11
SEL_OSC
XTAL1XTAL2
VSSC_74
VSS_94
MDI0_N
MDI1_P
MDI2_P
MDI3_P
HSDAC_P
VDDOH_89
NC_50
VCC2V5
VCC2V5
TD1_P
TD0_N
TD1_N
TD2_P
TD2_N
TD3_N
TD3_P
VCC
TD0_P
GND
SH2
SH1
10/100/1000
MAGNETICS
RJ45 AND
VCC2V5
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241
SCHEM, ROHS COMPLIANT
111
111
111
000
PHYADR[1]
PHYADR[4]
PHYADR[2]
ENA_PAUSE
ANEG[0]
ANEG[3]
ENA_XC
PHYADR[3]
ANEG[2] ANEG[1]
DIS_125
DIS_FC DIS_SLEEP
SEL_BDT INT_POL 75/50 OHM
000
111
010
advertise the PAUSE bitPHYADR[0]
Bit[0]Pin Bit[2] Bit[1]
VCC2V5
GND
101
100
011
010
001
000
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
HWCFG_MD[0]
HWCFG_MD[3]
HWCFG_MD[1]HWCFG_MD[2]
125 CLK option disabled.Auto crossover enabled.all caps; prefer slave.Auto-Neg en, advertise
GMII to Cu mode.Fiber/copper auto-detect diasabled.Sleep mode disabled.MDC/MDIO selected.Active LOW interrupt50Ohm SERDES option.
Constant MappingPin to
[2:0]Bit
111
110
Pin
LED_LINK10
LED_LINK100
LED_LINK1000
LED_DUPLEX
LED_RX
LED_TX
and are all bidirectional pins.Media Dependent Interface Pins (MDIP),The PHY MDIP Pins below are
10/100/1000 PHY
J22, J23 pins 2-3: SGMII to Cu, no clkJ22 pins 1-2, J24 ON: RGMII, modified MII in Cu
J22, J23 pins 1-2: GMII/MII to Cu
LED Silkscreen"10"
"100"
"DUP"
"RX"
"TX"
"1000"
PHYAddr "00111". Don't
10/100/1000 PHY
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
A
02
14 27
1-22-2008_14:51
BP
2 1
FERRITE-220
FB20
21
5%
4.7K
RP3
4
1
2R102
4.99K
1%
SGMII_TX-C_P
21
FERRITE-220
FB21
PHY_AVDD0
PHY_AVDD0
3
2
6
4
5
8
7
9
1
10 SH1
SH2
P6
RJ45
12
J24
PHY_LED_LINK1000
1
2
3
J23
PHY_LED_LINK10 3
2
1
J22
PHY_AVDD0
PHY_AVDD0
PHY_CONFIG5
PHY_LED_LINK100-R
MDIP0_CAP
127
122
117
106
104
96
97
908578
71
645952
65
9
87
82818079
115
54
95
1009998
9291
35
47
57
62
33
128126125
124123121
8
113
110109
67
72
6968
18192024
2526
29
13
105107
70
7
3
4
10
43
4934
14
16
41
3936373231
28
120
114
112
88
86
118
73
44
2327
171262
5
119116111108
103102101
93848366
636058
1
152122
4038
45485155
3011
77
7675
50
74
94
42
46
56
61
53
89
U16M88E1111
PHY_CONFIG4
PHY_LED_DUPLEX
2
1
X5R10V
10UFC73
SGMII_RX-C_NSGMII_RX-C_P
SGMII_TX-C_N
69
RP3
4
4.7K
5%
12 5%150
RP35
18
5%47
RP3
3
27
RP3
3
475%
36
5%47
RP3
3
45
RP3
3
475%
10
6
5%
4.7K
RP3
4
45
RP3
2
475%
36
5%47
RP3
2
27
RP3
2
475%
18
5%47
RP3
2
86
5%
4.7K
RP3
4
67
RP3
4
4.7K
5%
51
5%
4.7K
RP3
4
14
RP3
4
4.7K
5%
31
5%
4.7K
RP3
4
NC
PHY_TXD6
2
1
5%0R
104
MDIP3_CAP MDIP1_CAPMDIP2_CAP
PHY_MDIN0_N
PHY_MDIN1_N
2
1 C750.01UF
16VX7R
PHY_LED_LINK100
PHY_LED_TXPHY_LED_RX
PHY_LED_RX
PHY_LED_DUPLEX
PHY_LED_LINK1000
PHY_LED_LINK10
CLK_25MHZ_ENET
PHY_CONFIG0
PHY_HSDACN NCPHY_HSDACP NC
2
1
X5R10V
10UFC70
NCSCLK_NNCSCLK_P
2
1
1%
4.75K
R100
1
2R101
4.75K
1%
1
2X7R50V
1000PFC72
2
1 C831000PF
50VX7R
1
2X7R50V
1000PFC82
NC
1 2
LED-GRN-SMTDS30
NC
NC
1 2 3 4
5678
CP50
0.1UF
10V
X5R
1 2 3 4
5678
CP52
0.01UF
16V
X7R
8 7 6 5
4321
X5R
10V
0.1UF
CP51
1
2 X7R16V
0.01UFC77
PHY_RSET
PHY_COMA
PHY_MDIP0_P
PHY_MDIP1_P
PHY_MDIP2_P
1
2 X7R16V
0.01UFC76
2
1 C790.01UF
16VX7R
PHY_TXD5
PHY_TXD7
PHY_TXD2PHY_TXD1
PHY_TXD3
PHY_RXD2PHY_RXD1PHY_RXD0
PHY_RXD6PHY_RXD5PHY_RXD4
NC
PHY_MDIO
PHY_RXD3
PHY_RXD7
PHY_TXCTL_TXEN
NC
NC
NC
NC
PHY_TXERPHY_TXCLKPHY_TXC_GTXCLK
PHY_RXCTL_RXDV
PHY_COL
PHY_RXERPHY_RXCLK
PHY_TXD4
PHY_MDC
PHY_CRS
PHY_RESET
PHY_INT
PHY_TXD021
DS31LED-GRN-SMT
1 2
LED-GRN-SMTDS32
21
DS33LED-GRN-SMT
1 2
LED-GRN-SMTDS34
21
DS35LED-GRN-SMT
8 7 6 5
4321
X7R
16V
0.01UF
CP53
NC
NC
2
1 C711000PF
50VX7R
2
1 C741000PF
50VX7R
2
1
X5R10V
10UFC80
2
1
X5R10V
10UFC81
PHY_LED_LINK10-R
PHY_LED_LINK1000-R
PHY_LED_DUPLEX-R
PHY_LED_RX-R
PHY_LED_TX-R
PHY_MDIN3_NPHY_MDIP3_P
PHY_MDIN2_N
PHY_CONFIG0
1
2
R10
3
DN
P1%
NC
3 1
RP35
150 5%
14 5%150
RP35
5 1
RP35
150 5%
67 5%150
RP35
8 6
RP35
150 5%
69 5%150
RP35
10 6
RP35
150 5%
PHY_CONFIG5
PHY_AVDD0
PHY_CONFIG4
VCC5
GND_VIDEO
GND_VIDEO
VCC3V3
GND_VIDEO
VCC3V3
VCC3V3
EN
GND
IN
NR_FB
OUT
VCC1V8
NC0
TGND3
DVDD1DVDD2
DGND2DGND3
TVDD1TVDD2
TGND1TGND2
G B
D10D11
D1D2D3D4D5D6D7D8D9
XCLK_P
DEHV
SPDSPC
GPIO1GPIO0AS
TDC0_P R
VSYNC
HSYNC
HPDET
TLC_N
TLC_P
TDC2_P
TDC2_N
TDC1_P
VSWING
NC1
NC5
GND2GND1
VDD
AGND2
NC3
NC4
NC2
RESET_B
D0
XCLK_N
ISET
TDC0_N
TDC1_N
DVDD3
AVDD
DGND0
VREFDVDDV
NC6
VCC3V3
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241
SCHEM, ROHS COMPLIANT
DVI_AS
To DVI Connector
VGA Out Codec
To FPGA
Near U13
IIC Address = 0x76
VGA Out Codec
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
A
BP
1-22-2008_14:51
271502
21
FERRITE-220
FB34
21
FERRITE-220
FB30
DVI_GPIO1
23
1NDS331N
Q18
IIC_SCL_VIDEO-FIIC_SDA_VIDEO-F
2
1 1%
2.43K
R113
16
32
112
1164
2329
2026
37
39
5150
626160595855545352
57
245
1415
7810
22
38
47
48
931
30
28
27
25
19
36
44
4034
33
17
4243
41
13
63
56
35
21
24
49
18
6
345
46U17
CH7301C-TF
1
2R112
2.43K
1%
IIC_SDA_VIDEO
1
32
Q16NDS331N
2 3
1
NDS331NQ17
IIC_SCL_VIDEO
1 2
R111
100 1%
2
1 C103
DNP
DVI_VCCA
1 2
FB33
FERRITE-220
21
FERRITE-220
FB32
1 2
FB31
FERRITE-220
2
1
1%
2.43K
R115
1
2
C10110UF
10VX5R
2
1
X5R10V
10UFC98
1
2
C9610UF
10VX5R
2
1
X5R10V
10UFC93
3
2
1
4
5
U18
TPS73633DBVT
1
2X5R10V1UFC102
2
1 C1040.01UF
16VX7R
NC
DVI_RESET_B
1
2X5R10V
0.1UFC106
2
1 C920.1UF
10VX5R
1
2R11
7
4.75
K1%
2
1 1%4.
75K
R11
6
NC
DVI_TVDD
DVI_DVDD
2
1 C950.1UF
10VX5R
1
2X5R10V
0.1UFC94
1
2X5R10V
0.1UFC91
2
1 C900.1UF
10VX5R
DVI_VDVI_HDVI_DE
DVI_VCCA
1
2X5R10V
0.1UFC100
2
1 C970.1UF
10VX5R
DVI_VCCA
DVI_D1_N
DVI_D0_N
DVI_D0
NC
NCNC
NCNC
DVI_D1_P
DVI_D2_NDVI_D2_P
DVI_CLK_PDVI_CLK_N
DVI_HPDET
DVI_HSYNCDVI_VSYNCDVI_RED
DVI_D0_P
DVI_D9DVI_D8DVI_D7DVI_D6DVI_D5DVI_D4DVI_D3DVI_D2DVI_D1
DVI_D11DVI_D10
DVI_BLUEDVI_GREEN
DVI_AVDD
DVI_VDD
DVI_XCLK_NDVI_XCLK_P
NC
2
1 1%
2.43K
R110
DVI_GPIO1-F
1
2
R114
140
1%
VCC3V3
VCC3V3
VCC3V3
VCC5
VCC5
VCC5
VCC5
GND_VIDEO
GND_VIDEO
GND_VIDEO
GND_VIDEO
VCC5
GND_VIDEO
VCC3V3
GND_VIDEO
SH_GND1 2526SH_GND2
AGND1
BLUEGREENRED
DATA0_NDATA0_P
DATA5_NDATA5_P
CLK_PCLK_N
DATA3_N
DATA1_PDATA1_N
DDC_DATADDC_CLK
DATA4_PDATA4_N
DATA2_PDATA2_N
VS
SHIELD_CLKSHIELD_0/5SHIELD_1/3SHIELD_2/4
HS
DATA3_P
GND0
VCC5
HPDET
AGND0
DVI_CONN
VCC3V3
VCC3V3
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241
SCHEM, ROHS COMPLIANT
To Video Codec
To Video Codec
DVI Bus
To IIC
To Video Codec
DVI Video connector
DVI Video connector
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
BP
1-22-2008_14:51
271602
A
21
3
200MA 40VBAS40-04
D16
2
1
1%75
.0R12
1
C6
C3C2C1
1718
2021
2324
12
109
76
54
21
8
2219113
C4
13
15
14
16
C5
DVI_CONN
P7
DVI_VSYNC
DVI_CONN_VSYNCDVI_CONN_HSYNC
DVI_CONN_HPDET
12
FB49
FERRITE-220
21
FERRITE-220
FB48
DVI_GREEN
DVI_HSYNC
DVI_HPDET
IIC_SDA_VIDEO-F
IIC_SCL_VIDEO-F
DVI_GRN_TMP
12R120
1%1.21K
1
2R119
2.43K1%
2
1
1%
2.43K
R118
2
1 C111
22PF50VNPO
3
12
D17
BAS40-0440V200MA
3
12
D15
BAS40-0440V200MA
21
3
200MA 40VBAS40-04
D14
3
12
D13
BAS40-0440V200MA
21
3
200MA 40VBAS40-04
D12
3
12
D11
BAS40-0440V200MA
21
3
200MA 40VBAS40-04
D10
2 3
1
NDS331NQ20
1
32
Q21NDS331N
2 1
FERRITE-220
FB41
1 2
FB40
FERRITE-220
IIC_CLK_DVI-F
IIC_SDA_DVI-F
1
2X7R50V270PF
C123
2
1 C124
270PF50VX7R
21
5%330MA82NH FB46
1 2
FB4782NH
330MA 5%
1 2
FB4482NH
330MA 5%
21
5%330MA82NH FB45
21
5%330MA82NH FB42
1 2
FB4382NH
330MA 5%
DVI_CONN_BLUE
2
1 C120
33PF50VNPO
1
2NPO50V33PF
C117
2
1 C114
33PF50VNPO
1
2NPO50V22PF
C119
1
2NPO50V22PF
C112
2
1 C115
22PF50VNPO
2
1 C122
0.1UF10VX5R
1
2X5R10V0.1UF
C110
1
2NPO50V22PF
C113
2
1 C116
22PF50VNPO
1
2NPO50V22PF
C118
2
1 C121
22PF50VNPO
DVI_BLUE_TMP
DVI_CONN_RED
DVI_RED_TMP
DVI_CONN_GREEN
NC
DVI_D2_NDVI_D2_P
NCNC
DVI_D1_NDVI_D1_P
NC
DVI_CLK_NDVI_CLK_P
NCNC
DVI_D0_PDVI_D0_N
DVI_RED
DVI_BLUE
1
2
R12
2
75.0
1%
2
1
1%75
.0R12
3
VCC3V3VGAIN_VPP
VGAIN_VDD
VGAIN_VDD
VCC5
VCC5 VGAIN_VDD
VGAIN_VPP
VGAIN_VPP
VCC3V3
EN
GND
IN
NR_FB
OUT
RED
GREEN
BLUE
GND1
ID1/SDA
ID2
NC1
ID0
HSYNC
VSYNC
ID3/SCL
RGND
GGND
BGND
GND2
SH1
SH2
DB15-REC
VGAIN_VPP
EN
GND
IN
NR/FB
OUT
NC_B0
VPP_79
VPP_76
VDDO_64
VDDO_52
VDDO_38
VDD_13
VDD_9
VDD_5
GND_65
GND_75
GND_77
GND_80
GND_27
GND_39
GND_40
GND_53
GND_15
GND_11
GND_7
NC_R0
RED_0RED_1RED_2
RED_5RED_4RED_3
RED_7RED_6
NC_R1
NC_G0
GREEN_0GREEN_1GREEN_2
GREEN_5GREEN_4GREEN_3
GREEN_7GREEN_6
BLUE_6
BLUE_3BLUE_4BLUE_5
BLUE_2BLUE_1
REFLO
BLUE_0
BLUE_7
NC_G1
VSYNC0HSYN0
VSYNC1HSYNC1
SDA
CLAMPEXT_CLK/COAST
O/E_FFIELD
SCL
GND_3
VDD_1
VDDO_26
VPP_74
NC_B1
SOGIN0
RAIN0
REFCMREFHI
RAIN1
SOGIN1
FILT
PWRDN/TRI_STDATACK
VSOUT/A0
SOGOUTHSOUT
GAIN1
BAIN1
GAIN0
BAIN0
VDDAV_41
CHANNEL 1
CHANNEL 0
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241
SCHEM, ROHS COMPLIANT
VGA In Codec
Near U13
IIC Address = 0x4C
VGA In Codec
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
A
02
17 27
1-22-2008_14:51
BP
63
79
76
64
52
38
13
95
65757780
27394053
15117
37
353433
303132
2829
36
51
494847
444546
4243
55
585756
5960
18
61
54
50
7170
6968
66
7372
21
67
3
1 26
41
74
62
8
14
1920
16
12
78
1725
22
2423
10
4
6
2
U19AD9980
3
2
1
4
5
U20
TPS73118
DVI_ID2
2
1
1%
7.87K
R128
2
1
1%1.
21K
R13
11
2
R13
01.
21K
1%
21C130
0.047UF
10V
NPO
1 2NPO
10V
0.047UF
C128
21C127
0.047UF
10V
NPO
21C129
1000PF
50V
X7R
2
1
X5R10V
10UF
C135
VGA_IN_RIN-CONN
21
R168
0 5%
DVI_ID0
1
2
3
5
12
4
9
11
13
14
15
SH1
SH2
6
7
8
10
P8
K66X-E15S-N
21
FERRITE-220
FB50
21
FERRITE-220
FB51
21
FERRITE-220
FB521 2
5%0
R167
NC
NC
3
2
1
4
5
U21
TPS73633DBVT
NC
1
20.1UF10VX5R
C131
2
1 C132
X5R10V
0.1UF1
20.1UF10VX5R
C133
1234 5
678
RP38
22
5%
8 7 6 5
4321
X5R
10V
0.1UF
CP61
2
1 C138
DNP2
1 C1370.01UF
16VX7R
1 2 3 4
5678
CP60
0.1UF
10V
X5R
21C125
82000PF
10V
X7R
VGA_IN_GIN-CONN
VGA_IN_RIN
1
2X5R10V
0.1UFC139
VGA_IN_ODD_EVEN_B
VGAIN_REFCMVGAIN_REFHI
VGAIN_REFLO
VGA_IN_BIN-CONN
NC
VGA_IN_GIN
1
2X5R10V1UFC134
1
2X5R10V1UFC136
VGA_IN_FILT-R
VGA_IN_SOGIN
VGA_IN_GIN-C
VGA_IN_BIN-CVGA_IN_BIN
VGA_IN_FILT
2
1
1%75
.0R12
4
21C126
8200PF
25V
X7R
VGA_IN_RIN-C
1
2
R1271.54K1%
1
2
R12
5
75.0
1% 2
1
1%75
.0R12
6
NC
NC
NC
NC
VGA_IN_CLAMPVGA_IN_COAST
VGA_IN_BLUE0VGA_IN_BLUE1VGA_IN_BLUE2VGA_IN_BLUE3VGA_IN_BLUE4VGA_IN_BLUE5VGA_IN_BLUE6VGA_IN_BLUE7
VGA_IN_GREEN0VGA_IN_GREEN1VGA_IN_GREEN2VGA_IN_GREEN3VGA_IN_GREEN4VGA_IN_GREEN5VGA_IN_GREEN6VGA_IN_GREEN7
VGA_IN_RED0VGA_IN_RED1VGA_IN_RED2VGA_IN_RED3VGA_IN_RED4VGA_IN_RED5VGA_IN_RED6VGA_IN_RED7
VGA_IN_PWRDN
VGA_IN_HSOUT-RVGA_IN_SOGOUT-RVGA_IN_DATA_CLK-R
VGA_IN_VSOUT-R VGA_IN_VSOUTVGA_IN_HSOUTVGA_IN_SOGOUTVGA_IN_DATA_CLK
1
2
R13
2
DN
P1%
VGA_IN_VSINVGA_IN_HSIN
1 2 3 4
5678
CP129
0.1UF
10V
X5R
NCNC
NCNC
NCNC
NC
NC
IIC_SCL_VIDEO-FIIC_SDA_VIDEO-F
1
2
R1297.87K1%
VCC5_AUDIO
VCC5
VCC5_AUDIO
VCC5_AUDIO
DVDD1_1
XTL_IN_2
XTL_OUT_3
DVSS1_4
SDATA_OUT_5
BIT_CLK_6
DVSS2_7
SDATA_IN_8
DVDD2_9
SYNC_10
RESET_N_11
PC_NC
13_PHONE_IN14_AUX_L15_AUX_R16_JS117_JS018_CD_L19_CD_GND_REF20_CD_R21_MIC122_MIC223_LINE_IN_L24_LINE_IN_R
25_AVDD1
26_AVSS1
27_VREF
28_VREFOUT
29_AFILT1
30_AFLIT2
31_AFILT3
32_AFILT4
33_AVSS4
34_AVDD4
35_LINE_OUT_L
36_LINE_OUT_R
MONO_OUT_37AVDD2_38
HP_OUT_L_39AVSS2_40
HP_OUT_R_41NC_42
AVDD3_43AVSS3_44ID0_N_45ID1_N_46EAPD_47SPDIF_48
LQFP48AD1981B
VCC5_AUDIO
CON_RCA_TH
GND
A
OE
Y
VCC
VCC3V3
VCC3V3 VCC3V3
VCC5
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241
SCHEM, ROHS COMPLIANT
Silkscreen:
and Back
To CPLD
Silkscreen:"Microphone In"
"Line In"
Silkscreen:
Silkscreen:
"Amplified Line Out"
"Line Out"
Audio Codec
Portions of the design above thisline are "Digital Ground", andshould be outside the moat
Portions of the design below thisline are "Analog Ground", andshould be inside the moat
"SPDIF Out"Silkscreen:
Audio Codec
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
A
BP
02
18 27
1-22-2008_14:51
2
1
X5R10V
10UFC145
PIEZO_SPEAKER
1
2
R13
7
4.75
K1%
2
1
1%4.
75K
R13
8
1
2X5R10V1UFC142
AUDIO_PHONE
CLK_24.576MHZ_AUDIOAUDIO_SDATA_OUTAUDIO_BIT_CLKAUDIO_SDATA_INAUDIO_SYNCFLASH_AUDIO_RESET_B
1
2
5%
0R139
21
SP1
3
2
1
4
5
U45
SN74LVC1G126 2
1
1%
27.4
R149
1
2
R148
27.4
1%
AUDIO_SPDIF
1
2R206
1%
1.21K
2
1
1.21K
1%
R205
2
1
1%4.
75KR15
7
1 2
R142
4.75K 1%
2
1 1%3.
01KR14
1
NC
NC
31
RP4
1
4.7K
5%
2
1
3
P14
RCA_JACK
NC
NC
MIC2_CONNMIC1_CONNLINE_OUT_R_CONN
LINE_OUT_L_CONN
LINE_OUT_L_CONN
LINE_OUT_R_CONN
MIC1_CONN
MIC2_CONN
HP_OUT_L_IC
HP_OUT_R_IC HP_OUT_L_CONN
HP_OUT_R_CONN
LINE_OUT_L_ICLINE_OUT_R_IC
MIC1_IC
LINE_IN_R_ICLINE_IN_L_IC
1 2
C1611UF
10VX5R
21
X5R10V
1UFC160
1 2
C1580.1UF
10VX5R
21
X5R10V
0.1UFC159
AUDIO_VREF_OUT
MIC2_IC
97
1 235 6
4
810
J28
H-2X5
21
TANT
10V
150UF
C163
1 2
C162
150UF
10V
TANT
12345678910
11
12
131415161718192021222324
25
26
27
28
29
30
31
32
33
34
35
36
373839404142434445464748
U22AC97
NC
21
1%4.75K
R143
2
1
1%4.
75K
R13
6
1
2
R13
5
4.75
K1%
1
2X5R10V
0.1UFC166
2
1 C1571UF10VX5R
21C164
1UF
10V
X5R
1
2X5R10V
0.1UFC146
1
2X5R10V1UFC140
NC
15
5%4.
7KRP4
1
41
RP4
1
4.7K
5%
67
5%4.
7KRP4
1
10
6R
P41
4.7K
5%
86
RP4
1
4.7K
5%
21
1%75.0
R144
4
2
1
P10
STEREO_JACK_TH
4
2
1
P13
STEREO_JACK_TH
1
2X7R50V
270PFC1511
2X5R10V1UFC149
1
2X5R10V
0.1UFC144
2
1
X5R10V
10UFC156
1 2X5R
10V
1UF
C165
12
FB55
FERRITE-220
1
2
R14
0
3.01
K1%
2
1 C1430.1UF
10VX5R
1 2
R145
75.0 1%
2
1 C1470.1UF
10VX5R
2
1 C1500.1UF
10VX5R
1
2X7R50V
270PFC154
2
1 C155
0.1UF10VX5R
2
1 C153270PF
50VX7R
2
1 C152270PF
50VX7R
1
2X5R10V
0.1UFC148
21
1%75.0
R146
1
2
4
STEREO_JACK_TH
P12
1
2
4
STEREO_JACK_TH
P11
NCNC
NC
AUDIO_BIT_CLK_TMP
AUDIO_SDATA_IN_TMP
NCNC
RCA_SPDIF
CPLD_SPDIF_2
CPLD_SPDIF_1
CPLD_SPDIF_3
NC
NC
NCNC
69
5%4.
7KRP4
1
NCNC
12
5%4.
7KRP4
1
NC
NC
1
2
R15
8
4.75
K1%
2
1
1%
100
R147
1
2R204
1%
1.21K
21
X5R
10V
10UF
C141
HDR1x5
VCC3V3
VCC3V3
VCC3V3
VCC3V3
VCC5
VCC3V3
VCC3V3
VCC3V3
SCLSDA
A0A1A2
WP
VCCGND
EN OUT2IN
GNDNC1
FLG
NC2OUT1
VCC3V3
VCC3V3
GND1_51GPIO19_A0_CS0_52
GPIO18_A2_RTS__53GPIO17_A1_RXD__54
GPIO16_A0_TXD_PWM0_55GPIO15_D15_SSI_N_56
GPIO14_D14_57GPIO13_D13_58
GPIO10_D10_SCK_61RD_N_62VCC0_63WR_N_64
GPIO9_D9_nSSI_65GPIO8_D8_MISO_66
D15_CTS_67D14_RTS_68D13_RXD_69
GND2_75D8_MISO_74D9_nSSI_73
D7_76
D6_77
D5_78
D4_79
D3_80
D2_81
D1_82
D0_83
RESET_N_85
GPIO6_D6_87
GPIO7_D7_86
VCC2_88
GPIO5_D5_89
GPIO4_D4_90
GPIO3_D3_91
GPIO2_D2_92
GPIO0_D0_94
GPIO1_D1_93
A17_95
A18_96
BEH_N_98
A16_97
BEL_N_A0_99
GND3_100
1_A12_A23_A34_DM2B5_DP2B6_AGND7_A48_A59_DM2A10_DP2A11_OTGVBUS12_CSWITCHB13_CSWITCHA14_VSWITCH15_BOOSTGND16_BOOSTVCC17_A618_DM1B19_DP1B20_A721_AVCC
23_DP1A24_A825_A9
26_GND0
27_A10
28_XTALOUT
29_XTALIN
30_A11
31_A12
32_A13
33_A14
34_MEMSEL_N
35_ROMSEL_N
36_RAMSEL_N
37_VCC1
38_A15
39_GPIO31_SCK
40_GPIO30_SDA
41_GPIO29_OTGID
42_GPIO28_TX
43_GPIO27_RX
44_GPIO26_CTS_PWM3
45_GPIO25_IRQ1
46_GPIO24_INT_IORDY_IRQ0
47_GPIO23_RD_N_IOR
48_GPIO22_WR_N_IOW
49_GPIO21_CS_N
50_GPIO20_A1_CS1
GPIO12_D12_59GPIO11_D11_MOSI_60
D11_MOSI_71D12_TXD_70
D10_SCK_72
RSVD_84
22_DM1A
(DIE UP)
CY7C67300-100AI
VCC
D_N
D_P
GNDSH1
SH2
SH3
SH4
VCC
D_N
D_P
GND
SHLD1
SHLD2
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241
SCHEM, ROHS COMPLIANT
Silkscreen:
Bypass cap for USB chip
"USB Host"
USB Controller
EEPROM larger than 16KBSDA/SCL lines swapped for an
"Abort Boot"
USB Host Power
Silkscreen:"USB Peripheral 1"
USB Controller
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
A
2719
1-22-2008_14:51
02
BP
1 2
FERRITE-220
FB60
SH2
SH1
4
3
2
1USB_B_PERI_SMT
P17
SH4
SH3
1
2
3
4
SH1
SH2
P18
USB_HOST1_D-
USB_HOST1_D+
USB_HOST1_GND
USB_HOST1_D+
USB_HOST1_D-
USB_HOST1_VCC
2
1
TANT10V
150UFC177
5152535455565758
616263646566676869
757473
76
77
78
79
80
81
82
83
85
87
86
88
89
90
91
92
94
93
95
96
98
97
99
100
123456789
101112131415161718192021
232425
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
5960
7170
72
84
22
U23CYP_USB_HOST
2
1 C1700.1UF10VX5R
12
J33
NC
NC
NC
NC
NC
NC
NC
2
1 C1760.1UF10VX5R
USB_HOST_VCC
USB_GPIO25
USB_GPIO26USB_GPIO29
CLK_12MHZ_USB
NCNC
2
1 1%4.
75KR15
2
NC
1
2
R15
3
4.75
K1%
1
2 X5R
10V0.1UF
C171
1 87
34
2
56
U24MIC2025
65
123
7
84
U25
M24128-BWDW6TP
IIC_SDA_USB
1
2X5R10V
0.1UFC178
1
2R15
1
49.9
K1%
1
2
R15
649
.9K
1%
21
1%20.5K
R150
2
1 C1720.1UF
10VX5R
2
1 1%4.
75KR15
5
1
2
R15
4
4.75
K1%
1
2X5R10V
0.1UFC173
2
1 C1740.1UF
10VX5R
1
2X5R10V
0.1UFC175
SYSACE_MPA01_USB_A0NCNCNCSYSACE_USB_D15SYSACE_USB_D14SYSACE_USB_D13
SYSACE_USB_D10NC
NCSYSACE_USB_D9SYSACE_USB_D8NCNCNC
NCNC
NC
NC
NC
NC
NC
NC
NC
USB_RESET_B
SYSACE_USB_D6
SYSACE_USB_D7
SYSACE_USB_D5
SYSACE_USB_D4
SYSACE_USB_D3
SYSACE_USB_D2
SYSACE_USB_D0
SYSACE_USB_D1
NCNCNCNCNC
NCNC
NC
NC
NC
NCNC
NCNC
NCNCNCNCNCNCNC
USB_GPIO29
USB_SERIAL_TX
USB_SERIAL_RX
USB_GPIO26
USB_GPIO25
USB_INT
SYSACE_MPOE_USB_RD_B
SYSACE_MPWE_USB_WR_B
USB_CS_B
SYSACE_MPA02_USB_A1
SYSACE_USB_D12SYSACE_USB_D11
NCNC
NC
USB_A15
1 2
FB61
FERRITE-220
IIC_SCL_USB
USB_PERI1_VCC
USB_PERI1_D+
USB_PERI1_D-
NCNC
NCUSB_HOST1_VCC
USB_HOST1_GND
1
2
3
4
5
J83
VCC3V3
VCC3V3
VCC3V3
VCC1V8
VCC3V3
A22
VCC0
VSS1
DQ15
DQ9
VSS2
VSS0
VCC1
DQ0DQ1
DQ8
DQ2DQ3
DQ10DQ11
DQ4DQ5DQ6DQ7
DQ14DQ13DQ12
WE_BOE_BRFUCE_BWP_BADV_BWAIT
CLK
A1A2A3A4A5A6
A20
A24
A21
A23
A8A9
A19
A10
A18
A11
A17
A12
A16
A13A14A15
A7
VCCQVPP
RST_B
VCC3V3
37_A036_A135_A34_A33_A32_A44_A45_A46_A47_A48_A49_A50_A81_A82_A83_A99_A100_A84_E1843_E3642_E7239_E14438_E288
93_BWA_B94_BWB_B95_BWC_B96_BWD_B
1_DQPC2_DQC3_DQC6_DQC7_DQC8_DQC9_DQC12_DQC13_DQC18_DQD19_DQD22_DQD23_DQD24_DQD25_DQD
VDDQ_4VDDQ_11
VDDQ_20VDDQ_27VDD_41VDDQ_54VDDQ_61VDD_65VDDQ_70VDDQ_77VDD_91VSS_5
VSS_10VSS_17VSS_21VSS_26VSS_40VSS_55VSS_60VSS_67VSS_71VSS_76VSS_90NC_14NC_16NC_66
28_DQD
30_DQPD29_DQD
51_DQPA52_DQA53_DQA56_DQA57_DQA58_DQA59_DQA62_DQA63_DQA68_DQB69_DQB72_DQB73_DQB74_DQB75_DQB78_DQB79_DQB80_DQPB
85_ADV/LD_B
88_WE_B86_OE_B
89_CLK
31_MODE64_ZZ
87_CEN_B
98_CE1_B97_CE292_CE3_B
VDD_15
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241
SCHEM, ROHS COMPLIANT
Silkscreen:
SRAM_CEN_BSRAM_CE3_BSRAM_CE2
SRAM_ZZ
The burst order mode of the SRAM is set to "Linear" by default
Silkscreen:"Synchronous SRAM"
"Strata FLASH""256 MBit"
Strata FLASH
Memory:Synchronous SRAM,
"9 MBit - 36 X 256K"
Sync. SRAM, FLASH
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
A
02
1-22-2008_14:51
2720 BP
37363534333244454647484950818283991008443423938
93949596
1236789
1213181922232425
4111520274154616570779151017212640556067717690141666
28
3029
515253565758596263686972737475787980
85
8886
89
3164
87
989792
U26SRAM_ZBT_256KX36
2
1
X5R10V
10UFC180
2
1
X5R10V
10UFC185
12
RP5
1
4.7K
5%
12
5%4.
7KRP5
0
31
RP5
0
4.7K
5%
CFG_ADDR_OUT0
SRAM_FLASH_A1
10
13
28
54
37
31
12
33
34
36
35
39
41
40
42
47
49
51
53
52
50
48
14
32
27
30
15
46
56
45
29
25
24
23
22
21
16
26
11
9
19
8
17
7
18
6
55
5
1
4
3
2
20
38
43
44
U27
1
2 X5R10V
0.1UFC181
545%47RP54 3 6
RP54 47 5%725%47RP54 1 8
RP54 47 5%545%47RP53
725%47RP53
3 6RP53 47 5%
1 8RP53 47 5%54
5%47RP5272
5%47RP52 1 8RP52 47 5%
3 6RP52 47 5%
SRAM_FLASH_D4_RES
SRAM_FLASH_D8
SRAM_FLASH_D0_RES4 5
5%47RP59 3 6RP59 47 5%1 8
5%47RP59 2 7RP59 47 5%1 8RP58 47 5%2 7
5%47RP58 4 5RP58 47 5%3 6
5%47RP58 1 85%47RP57 2 7
RP57 47 5%4 55%47RP57 3 6
RP57 47 5%
1 8RP56 47 5%2 7
5%47RP56
3 65%47RP56
4 5RP56 47 5%
NC
FLASH_CLK
FLASH_ADV_B
1
2 X5R10V
0.1UFC186
2
1 C1820.1UF
10VX5R
8 7 6 5
4321
X5R
10V
0.1UF
CP70
21
1%49.9R163
21
1%49.9R161
21
1%49.9R162
21
1%49.9R160
FLASH_CE_B
FLASH_OE_BSRAM_FLASH_WE_B
FLASH_WAIT
CFG_ADDR_OUT1CFG_ADDR_OUT0SRAM_FLASH_A21
SRAM_FLASH_D15
SRAM_FLASH_D7
SRAM_FLASH_D14
SRAM_FLASH_D6
SRAM_FLASH_D13
SRAM_FLASH_D5
SRAM_FLASH_D12
SRAM_FLASH_D4
SRAM_FLASH_D11
SRAM_FLASH_D3
SRAM_FLASH_D10
SRAM_FLASH_D2
SRAM_FLASH_D9
SRAM_FLASH_D1SRAM_FLASH_D0
SRAM_DQP0
SRAM_DQP3
NC
SRAM_FLASH_A0
SRAM_FLASH_A18SRAM_FLASH_A17
SRAM_FLASH_A8SRAM_FLASH_A7SRAM_FLASH_A6SRAM_FLASH_A5SRAM_FLASH_A4SRAM_FLASH_A3SRAM_FLASH_A2
SRAM_FLASH_A16SRAM_FLASH_A15SRAM_FLASH_A14SRAM_FLASH_A13SRAM_FLASH_A12SRAM_FLASH_A11SRAM_FLASH_A10SRAM_FLASH_A9
SRAM_FLASH_A19SRAM_FLASH_A20
SRAM_FLASH_D1
SRAM_FLASH_D9SRAM_FLASH_D8SRAM_FLASH_D7SRAM_FLASH_D6SRAM_FLASH_D5SRAM_FLASH_D4SRAM_FLASH_D3SRAM_FLASH_D2
SRAM_FLASH_D15SRAM_FLASH_D14SRAM_FLASH_D13SRAM_FLASH_D12SRAM_FLASH_D11SRAM_FLASH_D10
SRAM_FLASH_D0
FLASH_AUDIO_RESET_B
SRAM_D29SRAM_D30SRAM_D31
SRAM_D28
1 2 3 4
5678
CP71
0.1UF
10V
X5R
1 2 3 4
5678
CP75
0.1UF
10V
X5R
SRAM_DQP2SRAM_DQP1
NC
NC
NC
NC
SRAM_BW1SRAM_BW0SRAM_BW3SRAM_BW2
NCNCNC
SRAM_CLK
SRAM_FLASH_D1_RESSRAM_FLASH_D2_RESSRAM_FLASH_D3_RES
SRAM_FLASH_D5_RESSRAM_FLASH_D6_RESSRAM_FLASH_D7_RESSRAM_FLASH_D8_RESSRAM_FLASH_D9_RESSRAM_FLASH_D10_RESSRAM_FLASH_D11_RESSRAM_FLASH_D12_RESSRAM_FLASH_D13_RESSRAM_FLASH_D14_RESSRAM_FLASH_D15_RES
SRAM_D16_RESSRAM_D17_RESSRAM_D18_RESSRAM_D19_RESSRAM_D20_RESSRAM_D21_RESSRAM_D22_RESSRAM_D23_RESSRAM_D24_RESSRAM_D25_RESSRAM_D26_RESSRAM_D27_RESSRAM_D28_RESSRAM_D29_RESSRAM_D30_RESSRAM_D31_RES
SRAM_FLASH_WE_BSRAM_OE_BSRAM_ADV_LD_B
SRAM_MODESRAM_CS_B
NC
SRAM_D20SRAM_D21SRAM_D22SRAM_D23
SRAM_D26SRAM_D27
SRAM_D25SRAM_D24
SRAM_D17SRAM_D18SRAM_D19
SRAM_D161 8
RP55 47 5%
4 55%47RP55
3 6RP55 47 5%
2 75%47RP55
2
1
X5R10V
10UFC187
SRAM_FLASH_A1SRAM_FLASH_A2SRAM_FLASH_A3SRAM_FLASH_A4SRAM_FLASH_A5SRAM_FLASH_A6SRAM_FLASH_A7SRAM_FLASH_A8SRAM_FLASH_A9SRAM_FLASH_A10SRAM_FLASH_A11SRAM_FLASH_A12SRAM_FLASH_A13SRAM_FLASH_A14SRAM_FLASH_A15SRAM_FLASH_A16SRAM_FLASH_A17SRAM_FLASH_A18SRAM_FLASH_A19SRAM_FLASH_A20SRAM_FLASH_A21
CFG_ADDR_OUT1
14
5%4.
7KRP5
0
51
RP5
0
4.7K
5%
67
5%4.
7KRP5
0
86
RP5
0
4.7K
5%
69
5%4.
7KRP5
0
10
6R
P50
4.7K
5%
31
5%4.
7KRP5
1
14
RP5
1
4.7K
5%
51
5%4.
7KRP5
1
67
RP5
1
4.7K
5%
86
5%4.
7KRP5
1
69
RP5
1
4.7K
5%
10
6
5%4.
7KRP5
1
VCC3V3
VCC3V3
VCC3V3
VCC3V3
IO_1_2_11
IO_1_3_12
IO_1_5_13
IO_1_6_14
IO_1_8_15
IO_1_9_16
IO_1_11_17
IO_1_12_18
IO_1_14_19
IO_1_15_20
IO_GCK1_1_17_22
IO_GSR_2_2_99
IO_GTS3_2_5_1
IO_GTS4_2_6_2
IO_GTS1_2_8_3
IO_GTS2_2_9_4
IO_2_11_6
IO_2_12_7
IO_2_14_8
IO_2_15_9
IO_2_17_10
IO_GCK2_3_2_23
IO_3_5_24
IO_3_6_25
IO_GCK3_3_8_27
28_IO_3_929_IO_3_1130_IO_3_1232_IO_3_1433_IO_3_1534_IO_3_1787_IO_4_289_IO_4_590_IO_4_691_IO_4_892_IO_4_993_IO_4_1194_IO_4_1295_IO_4_1496_IO_4_1597_IO_4_1735_IO_5_236_IO_5_537_IO_5_639_IO_5_840_IO_5_941_IO_5_1142_IO_5_1243_IO_5_1446_IO_5_15
49_IO_5_17
74_IO_6_2
76_IO_6_5
77_IO_6_6
78_IO_6_8
79_IO_6_9
80_IO_6_11
81_IO_6_12
82_IO_6_14
85_IO_6_15
86_IO_6_17
50_IO_7_2
52_IO_7_5
53_IO_7_6
54_IO_7_8
55_IO_7_9
56_IO_7_11
58_IO_7_12
59_IO_7_14
60_IO_7_15
61_IO_7_17
63_IO_8_2
64_IO_8_5
65_IO_8_6
66_IO_8_8
IO_8_9_67IO_8_11_68IO_8_12_70IO_8_14_71IO_8_15_72IO_8_17_73
GND_21GND_31GND_44GND_62GND_69GND_75GND_84
GND_100TCK_48TDI_45TDO_83TMS_47
VCCINT_5VCCINT_57VCCINT_98VCCIO_26VCCIO_38VCCIO_51VCCIO_88
VCC3V3
VCC3V3VCC3V3
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241
SCHEM, ROHS COMPLIANT
CPLD - Miscsignal control
CPLD - Misc signal control
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
1-22-2008_14:51
272102
BP
A
CPLD_LED_4
CPLD_LED_2
GPIO_LED_4
GPIO_LED_2
FPGA_FALLBACK_EN
SYSACE_CFG_EN
CPLD_SPDIF_2
1TP10
1TP11
1TP12
1TP13
CPLD_TP2
12R165 4.75K 1%
68
5%4.
7K
RP6
0
96
RP6
0
4.7K
5%
21
RP6
0
4.7K
5%3
1R
P61
4.7K
5%1
4 5%4.
7K
RP6
1
12 5%
4.7K
RP6
1
CPLD_TDO
PLAT_FLASH_CE_B
11
12
13
14
15
16
17
18
19
20
22
99
1234678910
23
24
25
27
28293032333487899091929394959697353637394041424346
49747677787980818285865052535455565859606163646566
67687071727321314462697584100484583475579826385188
U3XC95144XL_10TQ100C
NC
NC
2 1 1%4.75KR166
PC4_TMS
CPLD_LED_C
CPLD_LED_W
CPLD_TP10
PC4_TCK
FPGA_CS0_B
8 7 6 5
4321
X5R
10V
0.1UF
CP80
FLASH_AUDIO_RESET_B
FPGA_CCLK
LCD_FPGA_DB7
CPLD_TP0
CPLD_IO_1
CPLD_LED_0
GPIO_LED_C
CPLD_LED_E
CPLD_LED_S
CPLD_LED_N
GPIO_LED_N
GPIO_LED_S
GPIO_LED_E
GPIO_LED_W
AUDIO_SPDIF
CLK_33MHZ_FPGA
LCD_CPLD_RSLCD_CPLD_ELCD_CPLD_RW
LCD_CPLD_DB6LCD_CPLD_DB7
LCD_CPLD_DB5LCD_CPLD_DB4
BUS_ERROR_2BUS_ERROR_1
LCD_FPGA_DB6LCD_FPGA_DB5LCD_FPGA_DB4LCD_FPGA_RWLCD_FPGA_ELCD_FPGA_RS
SRAM_FLASH_D0_EN
1 2 3 4
5678
CP81
0.1UF
10V
X5R
GPIO_LED_0
CPLD_FPGA_DONE
CPLD_FPGA_INIT_B
FPGA_DOUT_BUSY
FPGA_INIT_B
FPGA_DONE
FPGA_DIN
FPGA_M0
FPGA_PROG_B
FPGA_CS_B
FPGA_M2
FPGA_M1
FPGA_RDWR_B
CPLD_LED_1
GPIO_LED_1
CPLD_TP1
SYSACE_CFGMODEPIN
NC
PLAT_FLASH2_TDO
PLAT_FLASH_CF_B
CPLD_SPDIF_1
CPLD_SPDIF_3
SRAM_FLASH_WE_B
PLAT_FLASH_EXT_SEL_B
CFG_ADDR_IN1CFG_ADDR_IN0
CFG_ADDR_IN2
CFG_ADDR_R0
CFG_ADDR_R1CFG_ADDR_OUT0
CFG_ADDR_OUT2CFG_ADDR_OUT1
FPGA_CPU_RESET_B
SYSACE_RESET_B
USB_RESET_B
NC
NC
86
RP6
1
4.7K
5%6
9 5%4.
7K
RP6
1
10
6R
P61
4.7K
5%
13
5%4.
7K
RP6
0
41
RP6
0
4.7K
5%
15
5%4.
7K
RP6
0
76
RP6
0
4.7K
5%
610
5%4.
7K
RP6
0
PCIE_WAKE_B
51
RP6
1
4.7K
5%PCIE_PERST_B
67 5%
4.7K
RP6
1
TXP0_126TXN0_126
VTRXCVREFMGTAVCC1_126MGTAVCC2_126
AVTTTX2_126AVTTTX1_126
AVTTRX_126
AVCCPLL_126
TXP1_126TXN1_126RXP1_126RXN1_126
RXP0_126RXN0_126
REFCLKP_126REFCLKN_126
FF1136BANK 126
MGTAVCC1_120MGTAVCC2_120
AVTTTX2_120AVTTTX1_120
AVTTRX_120
AVCCPLL_120
TXN1_120TXP1_120
RXP1_120RXN1_120
TXN0_120TXP0_120
RXP0_120RXN0_120
REFCLKP_120REFCLKN_120
FF1136BANK 120
MGTAVCC1_122MGTAVCC2_122
AVTTTX2_122AVTTTX1_122
AVTTRX_122
AVCCPLL_122
TXP1_122TXN1_122RXP1_122RXN1_122
TXN0_122TXP0_122
RXP0_122RXN0_122
REFCLKP_122REFCLKN_122
FF1136BANK 122
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
MGTAVCC2_116MGTAVCC1_116
AVTTTX2_116AVTTTX1_116
AVTTRX_116
AVCCPLL_116
TXP1_116TXN1_116RXP1_116RXN1_116
TXP0_116TXN0_116RXP0_116RXN0_116
REFCLKP_116REFCLKN_116
BANK 116FF1136
TXP1_112
RXN1_112
RXN0_112
REFCLKP_112REFCLKN_112
RXP0_112
RXP1_112TXN1_112
MGTAVCC2_112MGTAVCC1_112
AVTTTX2_112AVTTTX1_112
AVTTRX_112
TXP0_112TXN0_112
RREF_112
AVCCPLL_112
FF1136BANK 112
AVCCPLL_114
TXP1_114TXN1_114
RXN1_114RXP1_114
TXP0_114TXN0_114RXP0_114RXN0_114
REFCLKP_114REFCLKN_114
AVTTRX_114
MGTAVCC1_114MGTAVCC2_114
AVTTTX1_114AVTTTX2_114
BANK 114FF1136
MGTAVCC1_118MGTAVCC2_118
AVTTTX2_118AVTTTX1_118
AVTTRX_118
AVCCPLL_118
TXP1_118TXN1_118RXP1_118RXN1_118
RXP0_118RXN0_118
TXN0_118TXP0_118
REFCLKN_118REFCLKP_118
BANK 118FF1136
TXP0_124
RXN0_124
REFCLKP_124REFCLKN_124
RXP0_124TXN0_124
AVTTTX2_124
MGTAVCC2_124MGTAVCC1_124
NC
AVTTTX1_124
AVTTRX_124
AVCCPLL_124
TXP1_124TXN1_124RXP1_124RXN1_124
BANK 124FF1136
0381241
SCHEM, ROHS COMPLIANTMGT Banks
LOC=X0Y4
LOC=X0Y3
LOC=X0Y2
LOC=X0Y1
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
21Z2
0.01UF
10V
X5R
21Z1
0.01UF
10V
X5R
NC
B10
A8
D8C8
A9B9
C5
D7C7
U5
C10
C9
C6
B5B6A6A7
U1
SG-BGA-6046
A1-22-2008_14:55
22 27 BF
02
AG3AG4
AJ3AD3
AE3
AH3
AJ2AH2AH1AG1
AE1AF1
AE2AD2
AF3AF4
U1
SG-BGA-6046
AB3
AC2AB2
AA1AB1
V2W2W1Y1
Y4Y3
W3
AA3AA4
AC3V3
U1
VALUE=SG-BGA-6046
DEVICE=SG-BGA-6046
U2
R1
P1
P4P3
N1
T1T2
R4R3
U3M3
N3
M2N2
V4
T3U1
SG-BGA-6046
J4J3
L3F3
G3
K3
L2K2K1J1
F2G2G1H1
H4H3
U1
SG-BGA-6046
CLKBUF_Q0_C_P
CLKBUF_Q0_C_N
CLKBUF_Q0_PCLKBUF_Q0_N
AJ4AK5
AM3AK3
AL3
AM4
AN4AN3AP3AP2
AL2AK2
AL1AM1
AL5AL4
U1
SG-BGA-6046
AVCC_PLL
AVTT
D5F4
E3C4
C3
D3
D2E2
D1C1
B3B4
A3A2
E4D4
U1
SG-BGA-6046
AVCC_MGT
NC
AVCC_PLL
AVTT
AVTT
AVCC_MGT
21
FB82
FERRITE-220
VCC_RXC
1 2
FERRITE-220
FB70
21FB71
FERRITE-220
1 2FERRITE-220
FB72
2
1
X7R10V
0.22UFC331
2
1
X7R10V
0.22UFC342
2
1
X7R10V
0.22UFC334
1 2
FERRITE-220
FB77
1
2
C3400.22UF10VX7R
2
1
X7R10V
0.22UFC3391
2
C3380.22UF10VX7R
1
2
C3370.22UF10VX7R
2
1
X7R10V
0.22UFC3361
2
C3350.22UF10VX7R
1
2
C3300.22UF10VX7R
2
1
X7R10V
0.22UFC3331
2
C3320.22UF10VX7R
AVCC_PLL_116
2 1
1%49.9
R170
21
FB73
FERRITE-220
NC
AN5AN6
V5U4AL8AM8
AM5AM10
AM6
AM9
AN10AN9AP9AP8
AP6AP7
AL7AM7
U1
SG-BGA-6046
AVCC_MGT
AVCC_MGT AVCC_MGT
AVCC_MGT
AVCC_MGT
RREF
NC
NCNC
NCNC
NC
NC
NCNC
NC
NCNC
NC
NCNC
NC
NC
NC
NC
NCNC
NCNC
NC
NCNC
NC
NC
NC
NCNC
NCNC
NCNC
NC
NCNC
21
FB76
FERRITE-220
1 2
FERRITE-220
FB75
21
FB74
FERRITE-220
21
FB81
FERRITE-220
1 2
FERRITE-220
FB80
21
FB79
FERRITE-220
1 2
FERRITE-220
FB78
1 2
FERRITE-220
FB85
21
FB84
FERRITE-220
1 2
FERRITE-220
FB83
AVTT_RX_116
AVTT_TX_116
AVCC_MGT_116
AVCC_MGT_112
AVTT_TX_112
AVTT_RX_112
AVCC_PLL_112
AVCC_MGT_114
AVTT_TX_114
AVTT_RX_114
AVCC_PLL_114
2
1
X7R10V
0.22UFC341
AVCC_MGT_118
AVTT_TX_118
AVTT_RX_118
AVCC_PLL_118
1
2
C3430.22UF10VX7R
2
1
X7R10V
0.22UFC344 1
2
C3450.22UF10VX7R
AVCC_MGT
AVTT
AVTT
AVCC_PLL
AVCC_PLL
AVCC_PLL AVCC_PLL
AVCC_PLL
AVCC_PLL
AVTT
AVTT
AVTT
SATACLK_QO_PSATACLK_QO_N
SATA1_RX_PSATA1_RX_N
SATA2_TX_N
SATA1_TX_PSATA1_TX_N
SATA2_TX_P
SATA2_RX_NSATA2_RX_P
PCIE_RX_N
PCIE_CLK_QO_PPCIE_CLK_QO_N
LOOPBK_114_PLOOPBK_114_N
PCIE_RX_PPCIE_TX_NPCIE_TX_P
SMA_RX_PSMA_RX_N
SFP_TX_NSFP_RX_P
SFP_TX_P
SFP_RX_N
SMA_TX_NSMA_TX_P
21
X7R
16V
0.01UF
C87
21C86
0.01UF
16V
X7R
21
X7R
16V
0.01UF
C85
21C84
X7R
16V
0.01UF
SGMII_RX-C_P
SGMII_TX-C_P
SGMIICLK_QO_N
SGMII_RX-C_N
LOOPBK_116_PLOOPBK_116_N
SGMII_TX_PSGMII_TX_N
SGMIICLK_QO_P
SGMII_TX-C_N
SGMII_RX_NSGMII_RX_P
NC
VCC1V821_GND22_GND23_GND24_GND25_GND26_GND27_GND28_GND29_GND30_GND
TDN_19TDP_18
VCCT_16VCCR_15
RDP_13RDN_12
LOS_8RATE_SELECT_7
MOD_DEF0_6MOD_DEF1_5MOD_DEF2_4TX_DISABLETX_FAULT_2
31_GND
VEET_20VEET_17
VEER_14
VEER_10VEER_11
VEER_9
VEET_1
GND1GND2GND3GND4GND5GND6GND7
SIG
GND1GND2GND3GND4GND5GND6GND7
SIG
GND1GND2GND3GND4GND5GND6GND7
SIG
VCC3V3
VCC3V3
VCC3V3
VCC3V3
VCC3V3
GND1GND2GND3GND4GND5GND6GND7
SIG
GND_4
GND_7
HRX-
HTX+
GND_1
HRX+
HTX-
SLOT
GND_4
GND_7
HRX-
HTX+
GND_1
HRX+
HTX-
SLOT
FREQ_SELXTAL_IN
Q_P
VDDVDDA
XTAL_OUT
GND
Q_N
VCC3V3
VCC3V3
12V_212V_3GND_1SMCLKSMDATGND_23V3_1TRST_B3V3_AUXWAKE_B
RSVD_1GND_4PET0_PPET0_NGND_5PRSNT_B_2GND_6
PRSNT_B_112V_412V_5GND_7TCKTDITDOTMS
3V3_23V3_3PERST
REFCLK_PREFCLK_N
GND_9PER0_PPER0_NGND_10
GND_8
12V_1
VDDA VDD
Q0GND
XTAL_OUT NQ0
OEXTAL_IN
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241
SCHEM, ROHS COMPLIANT
3
SATA Clock - 75/150 MHz
125.00 MHz Clock
MGT_102BSFP MODULE
Ethernet SGMII Clock - 125MHz
SMA Connectors - MGT_112_1
SATA Host 2
MGT 118_1
SATA Host 1
MGT 118_0
MGT Clocks and Connectors
JMP Off = 75 MHzJMP On = 150 MHz
MGT_114_0PCI-E Connectors
Silkscreen:"SFP OK"
Silkscreen:"SFP EN"
Silkscreen:
"RT_SEL""LOW BW"
"FULL BW"1
MGT Connectors
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
A
02
2723
1-22-2008_14:51
BF
1 2X5R
10V
0.1UF
C221
1 2X5R
10V
0.1UF
C222
1 2X5R
10V
0.1UF
C223
1 2X5R
10V
0.1UF
C224
1
2X5R10V
0.1UFC190
1 8
72
3 6
54
U29
ICS844021I
1 2 3 4
5678
CP90
0.1UF
10V
X5R
21
FERRITE-220
FB90
1 2
FB91
FERRITE-220
B2B3B4B5B6B7B8B9B10B11
B12B13B14B15B16B17B18
A1A2A3A4A5A6A7A8A9A10A11
A13A14A15A16A17A18
A12
B1P21
PCI_E-FINGER-1X
1
2
R173
140
1%
SATA1_TX-C_NSATA1_TX_N
SATA1_RX_P
SATA2_RX_NSATA2_RX_P
86
RP7
0
4.7K
5%
1 2 3
J81
2 1J82
SFP_RT_SEL
SFP_TX_DISABLE
1
32
Q42
NDS331N
SFP_TX_DISABLE_FPGA
SATA1_TX-C_P
SATA2_TX-C_N
PCIE_PRSNT_B_FPGA
1
32
Q5
NDS331N
VDDA_SATACLKVDDA_SATACLKVDD_SATACLK
2
1 C2050.01UF16VX7R
2
1
X5R10V
10UFC206
VDD_SATACLK
VDDA_SGMIICLK21
5%10R210
1 2NPO
50V
22PF
C201
21C200
22PF
50V
NPO
PCIE_WAKE_B
NC
54
7
81
3
2
6
U44
ICS844071I
SATACLK_QO-C_N
SATACLK_QO-C_P
SATACLK_XTAL_OUT
SATACLK_XTAL_IN
3
6
1
2
5
7
4
SATA
J40
4
7
5
2
1
6
3J41
SATA
PCIE_CLK_QO_P
PCIE_PERST_B
2345678
1
J44 32K10K-400E3
SATACLK_QO_P
SATACLK_QO_N
GND_SATACLK
210.1UF
C203
10V
X5R
21
X5R
10V
C202
0.1UF
SGMIICLK_QO_P
210.1UF
C209
10V
X5R
SGMIICLK_QO_N
21
X5R
10V
C210
0.1UF
SFP_VCCTSFP_VCCR
2
1 C1910.1UF
10VX5R
2
1
X5R10V
10UFC192
2
1
X5R10V
C1930.1UF
2
1C19410UF
10VX5R
SFP_LOS
SFP_MOD_DETECTSFP_MOD_DEF1SFP_MOD_DEF2
SFP_TX_FAULT
23
1
NDS331N
Q41
SFP_RX_NSFP_RX_P
1
3 2
Q40
NDS331N
31
RP7
0
4.7K
5%
1TP20
12
LED-GRN-SMT
DS404
15%
4.7K
RP7
0
51
RP7
0
4.7K
5%
21
RP7
0
4.7K
5%
1TP21
1TP22
SFP_TX_PSFP_TX_N
IIC_SDA_SFP
IIC_SCL_SFP
610
RP7
0
4.7K
5%
96
5%
4.7K
RP7
0
NC
NC
SGMIICLK_QO-C_NSGMIICLK_XTAL_OUT
GND_SATACLK
1
2
1%D
NPR17
5
GND_SGMIICLKGND_SGMIICLK
VDD_SGMIICLK VDDA_SGMIICLK
1
2
R21
1
DN
P1%
GND_SATACLKGND_SATACLK
GND_SGMIICLK
VDD_SGMIICLK
SGMIICLK_XTAL_IN
1 2
FB92
FERRITE-220
1 2
FERRITE-220
FB93
1 2
FERRITE-220
FB94
1 2
FB95
FERRITE-220
21C207
33PF
50V
NPO
21
NPO
50V
33PF
C208
2
1
X5R10V
C1980.1UF
2
1
X7R16V
0.01UFC199
2
1
X7R16V
0.01UFC204
1 2
J56
ABLS
X625.000MHZ
25.000MHZ X7
ABLS
2345678
1
J42 32K10K-400E3
2345678
1
32K10K-400E3J43
2345678
1
32K10K-400E3J45
21
X7R
16V
0.01UF
C213
21C216
0.01UF
16V
X7R
21C217
0.01UF
16V
X7R
21
X7R
16V
0.01UF
C219
21C220
0.01UF
16V
X7R
21
X7R
16V
0.01UF
C212
21C211
0.01UF
X7R
16V
21
X7R
16V
0.01UF
C215
21
X7R
16V
0.01UF
C218
21C214
0.01UF
16V
X7R
SATA2_TX-C_P
SATA2_RX-C_P
SATA1_RX_NSATA1_RX-C_PSATA1_RX-C_N
SATA2_TX_N
SMA_RX-C_N
SMA_TX_N
SMA_RX-C_P
SMA_TX_P
SMA_RX_NSMA_RX_P
SATA2_RX-C_N
SATA2_TX_P
SATA1_TX_P
SGMIICLK_QO-C_P
PCIE_RX_P
NC NC
NCNC
NCNC
NCNC
NC
NCNC
NC
NC
NC
NC PCIE_PRSNT_B
PCIE_CLK_QO_NPCIE_CLK_QO-C_PPCIE_CLK_QO-C_N
PCIE_TX_NPCIE_TX_PPCIE_TX-C_P
PCIE_TX-C_N
PCIE_RX_N
21222324252627282930
1918
1615
1312
8765432
31
2017
14
1011
9
1
P19
SFP_CONN_CASE
1 2
5%0
R212PCIE_WAKE_B-R
NC
21
5%10R213
1
2
C22610UF
10VX5R
1
2X7R16V
0.01UFC225
76
5%
4.7K
RP7
0
VCC3V3
VCC5
VCC5
VCC3V3
VCC5
TI
GND_TAB
NC_4
VIN_5
EN
VOUT_18
GND_12
NC_3
NC_2
NC_13
NC_14
NC_17
VIN_6
VIN_7
VIN_8
BIAS
VOUT_1
VOUT_19
VOUT_20
PG
FB
SS
VCC1V8
TI
GND_TAB
NC_4
VIN_5
EN
VOUT_18
GND_12
NC_3
NC_2
NC_13
NC_14
NC_17
VIN_6
VIN_7
VIN_8
BIAS
VOUT_1
VOUT_19
VOUT_20
PG
FB
SS
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
TI
GND_TAB
NC_4
VIN_5
EN
VOUT_18
GND_12
NC_3
NC_2
NC_13
NC_14
NC_17
VIN_6
VIN_7
VIN_8
BIAS
VOUT_1
VOUT_19
VOUT_20
PG
FB
SS
0381241
SCHEM, ROHS COMPLIANT
MGT Power Supplies
MGT AVCC Regulator
MGT RXC Regulator
1.0V @ 3A
1.2V @ 3A
MGT VTT Regulator
MGT Power Supplies
LXT & SXT (ML505/6)AVCC_PLL = 1.2V @ 3A
R176 = 2.43K 1%R177 = 4.99K 1%
FXT Only (ML507)AVCC_PLL = 1.0V @ 3A
R176 = 1.13K 1%R177 = 4.53K 1%
MGT PLL Regulator
Voltage Output Settings
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
15
16
9
2019
1
10
876
17
14
13
23 12
18
11
5
4 21
TPS74401
U30
A
02
24 27
1-22-2008_14:51
BF12
FERRITE-220
FB96AVTT
AVTT
FAN_CNTRL_GPIO4
15
16
9
2019
1
10
876
17
14
13
23 12
18
11
5
4 21
TPS74401
U33
FAN_CNTRL_GPIO3
VCC_RXC
1
2
R185
4.99K
1%
2
1 1%
4.53K
R179
1
2
R177
4.99K
1%
AVCC_MGT
1
2
C2560.22UF10VX7R
1
2 X7R50V
1000PFC247
1
2X5R10V
0.1UFC246
1
2X5R10V
0.1UFC241
21
4
5
11
18
12
3 2 13
14
17
678
10
1
1920
9
16
15
U31
TPS74401
2
1 C2391000PF
50VX7R
2
1 C2350.1UF
10VX5R
1
2X5R10V
0.1UFC232
2
1 1%
2.43K
R176
1/16W
1
2
R178
1.13K1%
AVCC_PLL
1
2 X7R50V
1000PFC233
1
2X5R10V
C230
1UF
1
20.1UF
C231
10VX5R
2
1 C23410UF10VX5R
2
1
1UF
C236
10VX5R
2
1
X5R10V
C2370.1UF
2
1 C2380.1UF
10VX5R
1
2X5R10V
10UFC240
1
2X5R10V
C244
1UF
1
20.1UF
C245
10VX5R
2
1 C24810UF10VX5R
2
1 C2490.1UF
10VX5R
2
1 1%
2.43K
R184
AVCC_MGT_FB
AVCC_MGT_SS
AVTT_SS AVTT_FB
AVCC_PLL_SS
AVCC_PLL_FB
FAN_CNTRL_GPIO2
TI
SNS_NINH/UVLO
VIN
VOUT
SNS_P
GND_3
GND_4
TT
SYNC
TRACK
VADJ
VCC5
SNS_NINH/UVLO
VIN
VOUT
SNS_P
GND_3
GND_4
TI
TT
SYNC
TRACK
VADJ
VCC3V3
VCCINT
VCC1V8
SNS_NINH/UVLO
VIN
VOUT
SNS_P
GND_3
GND_4
TI
TT
SYNC
TRACK
VADJ
VCC5
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241
SCHEM, ROHS COMPLIANT
1.8V @ 10A max
3.3V @ 10A max
1.0V @ 16A max
5v to 1.0V Regulator5v to 3.3V Regulator
5v to 1.8V Regulator
5V Power - Jack, Switch and LED5V Power Synchronizing Circuit
5V Power Supplies
Power Supplies
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
A
BP25 27
1-22-2008_14:51
02
VCC5_TMP
NC
2
1
POSCAP6.3V
470UFC279
1
2
C260470UF
6.3VPOSCAP
1
2
C290470UF
6.3VPOSCAP
1
2
C280470UF
6.3VPOSCAP
1
2
C264680UF4VPOSCAP
1
2X5R10V10UFC263
2
1 C26210UF10VX5R
1
2X5R10V10UFC261
1
2X5R10V10UFC292
2
1 C29110UF10VX5R
2
1 C29310UF10VX5R
2
1 C28310UF10VX5R
1
2X5R10V10UFC282
2
1 C28110UF10VX5R
VCC5-R
VCC5
VCC5
VCC5
VCC5
VCC5
VCC5
4321
H-1X4-200
J15
1
2
R19
9
562
1%
2
1
TANTNA
NSC265
2
1
TANTNA
NSC286
2
1
TANTNA
NSC295
2
1
POSCAP2.5V
1000UFC294
1
2
C2841000UF
2.5VPOSCAP
2
1
POSCAP2.5V
1000UFC285
8
10 1 9
43
6
5
2
11 7
PTH08T240W
U35
1
2
R19405%
1
2 1.21K
1%
R196
NC
SH2SH1
3 2 1SPDT
SW1
2
1 C275220PF50VX7R
MODE_SYNC_B
MODE_SYNC_1V0MODE_SYNC_1V8
MODE_SYNC_3V3
1 2
R191
1.21K
1%
350KHZ
X8
2
1 C29710UF10VX5R
1
2X5R10V
10UFC288
1
2X5R10V
10UFC267
8
10 1 9
43
6
5
2
11 7
PTH08T240W
U38
2
1 C276470PF
50VX7R
714
1213
CD4069
U39
11 10
14
7
U39
CD4069714
89
CD4069
U39
5 6
14
7
U39
CD4069714
43
CD4069
U39
1 2
14
7
U39
CD4069
PWR_XTAL2
NC
MODE_SYNC_1V8
1 2
R197
4.75K
1%
1 2
R195
20.5K
1%
NC
1V8_ADJ
MODE_SYNC_A
PWR_XTAL1
3V3_ADJ
MODE_SYNC_3V3
INT_ADJ
1 2
R198
1.00M 1%
21
DS41
LED-GRN-SMT
MODE_SYNC_1V0
NC 711
2
5
6
3 4
9110
8
U37
PTH08T220W
2
1
1%
6.81K
R190
1
32
P20PWR_JACK
VCC3V3VCCINT
FMC_15
FMC_15 FMC_15
VTTVREF
VTTDDR
VCC1V8VCC5
VCC3V3
VCC2V5VCC5 VCC1V8
VCC5
VTTVREF
VCCAUX
VCC5
VTTDDRVIN
S5
GND
VTTREF
S3
VDDQSNS
VLDOIN
VTT
PGND
VTTSNS
PWRPAD
VIN
S5
GND
VTTREF
S3
VDDQSNS
VLDOIN
VTT
PGND
VTTSNS
PWRPAD
TI
GND_TAB
NC_4
VIN_5
EN
VOUT_18
GND_12
NC_3
NC_2
NC_13
NC_14
NC_17
VIN_6
VIN_7
VIN_8
BIAS
VOUT_1
VOUT_19
VOUT_20
PG
FB
SS
VCCINT
FMC_15
TI
GND_TAB
NC_4
VIN_5
EN
VOUT_18
GND_12
NC_3
NC_2
NC_13
NC_14
NC_17
VIN_6
VIN_7
VIN_8
BIAS
VOUT_1
VOUT_19
VOUT_20
PG
FB
SS
VCC3V3
VCC3V3
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241
SCHEM, ROHS COMPLIANT
2.5V @ 3A
5V and 3.3V Power Supplies
5V to 0.9V (DDR2 VTT DDR) Regulator
5V to 0.9V (DDR VTT VREF) Regulator3.3v to 2.5V (VCC AUX) Regulator
3.3v to 2.5V Regulator
2.5V @ 3A
0.9V @1.4A
0.9V @1.4A
Power Supplies
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
A
02
1-22-2008_14:51
2726 BP
21
4
5
11
18
12
3 2 13
14
17
678
10
1
1920
9
16
15
U41
TPS74401
2 3 4 5 6 7 8 9
10
11
12
13
14
15
1
J76
15
16
9
2019
1
10
876
17
14
13
23 12
18
11
5
4 21
TPS74401
U40
1
2
R20
2
3.57
K1%
2
1 1%1.
69KR20
1
2
1 C3211000PF
50VX7R
1
2 X5R10V
0.1UFC311 11
5
4
3
2
1
7
6
8
9
10TPS51100DGQU42
2
1 C31910UF10VX5R
1
2X5R10V
10UFC318
2
1 C31710UF10VX5R2
1C3160.1UF
10VX5R
2
1 C3151UF10VX5R
1
2X5R10V
10UFC314
2
1 C31310UF10VX5R
1
2X5R10V
10UFC312
1
2X5R10V1UFC310
1
2X5R10V
0.1UFC3091
2X5R10V
10UFC308
2
1 C3070.1UF
10VX5R
2
1
X5R10V
C3060.1UF
2
1
1UF
C305
10VX5R
2
1 C3040.1UF
10VX5R
2
1 C30310UF10VX5R
1
2X5R10V
0.1UFC3021
20.1UF
C301
10VX5R
1
2X5R10V
C300
1UF
10
9
8
6
7
1
2
3
4
5
11
U43TPS51100DGQ
2
1 1%3.
57KR20
01
2
R20
3
1.69
K1%
1
2 X7R50V
1000PFC320
VTTDDR_REF
VTTVREF_REF
AUX_SS
2V5_SS
2V5_FB
AUX_FB
FAN_CNTRL_GPIO1
FLASH_AUDIO_RESET_B
2 3 4 5 6 7 8 9
10
11
12
13
14
15
1
J77
2 3 4 5 6 7 8 9
10
11
12
13
14
15
1
J71
2 3 4 5 6 7 8 9
10
11
12
13
14
15
1
J70
VCCO_EXP
VCCINT
VCC1V8
VTTVREFVCC2V5
VCC3V3
VCCAUX
ofSheet
Date:
Title:
Ver:A
B
C
D
1234
D
C
B
A
4 3 2 1
Sheet Size: B Rev:
Drawn By
0381241
SCHEM, ROHS COMPLIANT
VCCINT Caps
VCCO Caps
VCCAUX Caps
FPGA Decoupling
ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415
A
BP
02
27 27
1-22-2008_14:51
1
2
C371330UF
2.5VTANT
2
1
TANT6.3V
47UFC414 1
2
C41547UF
6.3VTANT
2
1
TANT6.3V
47UFC416 1
2
C41747UF
6.3VTANT
2
1
TANT6.3V
47UFC428 1
2
C43447UF
6.3VTANT
2
1
TANT6.3V
47UFC433
1
2
C39447UF
6.3VTANT
2
1
TANT6.3V
47UFC395 1
2
C39647UF
6.3VTANT
2
1
TANT6.3V
47UFC397 1
2
C39847UF
6.3VTANT
2
1
TANT6.3V
47UFC399 1
2
C40047UF
6.3VTANT
2
1
TANT6.3V
47UFC401
2
1
TANT
NSC403
NA
1
2
C402NS
TANTNA
2
1 C3520.1UF
10VX5R
1
2X5R10V
0.1UFC383 1
2X5R10V10UF
C387
8 7 6 5
4321
X5R
10V
0.1UF
CP110
2
1 C3800.1UF
10VX5R
1
2X5R10V
0.1UFC381
2
1 C3820.1UF
10VX5R
1 2 3 4
5678
CP122
0.1UF10V
X5R
8 7 6 5
4321
X5R
10V
0.1UF
CP101
2
1X5R10V10UF
C360
1
2X7R16V
0.01UFC4221
2X7R16V
0.01UFC420
2
1 C4300.1UF
10VX5R
8 7 6 5
4321
X5R
10V
0.1UF
CP130
1
2X5R10V
0.1UFC410
8 7 6 5
4321
X5R
10V
0.1UF
CP103
1 2 3 4
5678
CP102
0.1UF10V
X5R
1 2 3 4
5678
CP100
0.1UF10V
X5R
8 7 6 5
4321
X5R
10V
0.1UF
CP121
1 2 3 4
5678
CP131
0.1UF10V
X5R
1 2 3 4
5678
CP128
0.1UF10V
X5R
1
2X5R10V10UF
C377
2
1 C3500.1UF
10VX5R
2
1 C378
10UF10VX5R
1
2X5R10V
0.1UFC351
1
2X5R10V
0.1UFC431
2
1 C4110.1UF
10VX5R
2
1 C4260.1UF
10VX5R
2
1 C4230.01UF
16VX7R
2
1 C4210.01UF
16VX7R
2
1X5R10V10UF
C357
2
1X5R10V10UF
C358
2
1 C361
10UF10VX5R
2
1 C362
10UF10VX5R
2
1X5R10V10UF
C363
1
2
C412
10UF
X5R10V
1
2
C413
10UF
X5R10V
1
2
C359
10UF10VX5R
2
1 C388
10UF10VX5R
2
1
TANT2.5V
330UFC372
2
1 C3840.1UF
10VX5R
1
2X5R10V
0.1UFC385
1
2X5R10V
0.1UFC366
2
1 C3650.1UF
10VX5R
1
2X5R10V
0.1UFC364
2
1 C3690.1UF
10VX5R
1
2X5R10V
0.1UFC368
2
1 C3670.1UF
10VX5R
2
1 C3740.1UF
10VX5R
1
2X5R10V
0.1UFC373 1
2
C37533UF
6.3VTANT
1
2X7R16V
0.01UFC425
2
1 C4240.01UF
16VX7R
2
1 C432
10UF10VX5R
2
1 C392
10UF10VX5R
1
2X5R10V10UF
C391
2
1 C390
10UF10VX5R
2
1 C3530.1UF
10VX5R
1
2X5R10V
0.1UFC354
