8051 Interrupt and Seriel

8051 INTERRUPTS

Interrupt Sources and Interrupt Vector Addresses8051 basically has following five interrupt sources so that any of the following events will make 8051 to execute an interrupt service routine. Timer 0 Overflow. Timer 1 Overflow. Reception/Transmission of Serial Character. External hardware interrupt 0. External hardware interrupt 1.

Oxford University Press 2013

Interrupt Sources and Interrupt Vector AddressesDifferent interrupt sources have to be distinguished and 8051 must execute different subroutines depending interrupt triggered. This is accomplished by jumping or calling to a fixed address when interrupt occurs. These addresses are called interrupt vector addresses or interrupt handler addresses.


Interrupt Sources and Interrupt Vector Addresses

InterruptFlagInterrupt Vector AddressExternal 0IE00003hTimer 0TF0000BhExternal 1IE10013hTimer 1TF1001BhSerialRI/TI0023h


Interrupt Sources and Interrupt Vector AddressesWhenever Timer 0 overflows (i.e., the TF0 bit is set), the main program will be temporarily suspended and control will jump to 000BH. It is assumed that service routine at address 0003H handles the situation of Timer 0 overflowing.


Enabling and Disabling InterruptsBy default at power up, all interrupts are disabled. This means that even if, for example, the TF0 bit is set, the 8051 will not execute the interrupt. Programming must be done specifically to enable interrupts. Interrupt Enable Special Function Register IE SFR at the address A8h is used to enable and disable interrupts by modifying its bitsThe interrupts enabling can be handled individually by - bit addresses for the individual bits of IE register.


Bit Patterns for the IE SFR (A8H)

Bit position D7D6D5D4D3D2D1D0Bit AddressAFACABAAA9A8NameEA--ESET1EX1ET0EX0ExplanationGlobal Interrupt Enable/ DisableUn definedUn definedEnable Serial InterruptEnable Timer 1 InterruptEnable External 1 InterruptEnable Timer 0 InterruptEnable External 0 Interrupt


Bit Patterns for the IE SFR (A8H)Each of the 8051s interrupts has its own bit in the IE SFR. A particular interrupt can be enabled by -corresponding bit. For example, to enable Timer 1 Interrupt, the one of the following instructions can be executed.

MOV IE, #08hORSETB ET1

SETB AB


Bit Patterns for the IE SFR (A8H)However, before Timer 1 Interrupt (or any other interrupt) is truly enabled, bit 7 of IE SFR must also be set. Bit 7, the Global Interrupt Enable/Disable, enables or disables all interrupts simultaneously. That is, if bit 7 is cleared then no interrupts will occur, even if all the other bits of IE are set. Setting bit 7 will enable all the interrupts -selected by setting other bits in IE.


Interrupt Priorities and Polling SequenceThe 8051 automatically evaluates whether an interrupt occurs after every instruction. When checking for interrupt conditions, it checks them in the following order: External 0 Interrupt Timer 0 Interrupt External 1 Interrupt Timer 1 Interrupt Serial Interrupt


Interrupt Priorities and Polling SequenceThe above list -gives the interrupt priority.So, whenever the External 0 interrupt and Timer 1 interrupt occurs at the same instant, then 8051 microcontroller executes the interrupt service routine corresponding to External 0 interrupt first. Then 8051 microcontroller will return to the main program, execute one instruction and then execute the interrupt service routine corresponding to Timer 1 Interrupt.


Interrupt Priorities and Polling SequenceIf a Serial Interrupt occurs at the exact same instant that an External 0 Interrupt occurs, the External 0 Interrupt will be executed first and the Serial Interrupt will be executed once the External 0 Interrupt has completed. The 8051 offers two levels of interrupt priority: high and low. By using interrupt priorities, the above interrupts can be divided into two separate interrupt priorities. So, the five interrupts can be again prioritized.Interrupt priorities are controlled by the IP SFR (B8h). For example, if the Serial Interrupt is much more important than the Timer 0 interrupt, then the Interrupt Priority register IP SFR at the address B8h can be properly programmed to set the priority.


Bit Patterns for the IP SFR

Bit position D7D6D5D4D3D2D1D0Bit AddressBCBBBAB9B8NameEA--PSPT1PX1PT0PX0ExplanationEnable Interrupts - Made 0 to disable all interruptsUn definedUn definedSerial Interrupt PriorityTimer 1 Interrupt PriorityExternal 1 Interrupt PriorityTimer 0 Interrupt PriorityExternal 0 Interrupt Priority


Interrupt Priorities and Polling SequenceThis is done by assigning a high priority to the Serial Interrupt and a low priority to the Timer 0 Interrupt. By setting the D4 bit to 1, the serial interrupt will be set to higher priority and making D1 bit to 0, the Timer 0 interrupt will be set to lower priority.Note that the priority can be set individually by using the bit addresses of the IP register. For example, the timer 0 interrupt priority can be made high by setting the D1 bit of IP SFR. So, the following instructions can be used for the same.SETB PT0 (or) SETB B9H (or)MOV IP, #82H


Interrupt Priorities and Polling SequenceWhen considering interrupt priorities, the following rules apply: Nothing can interrupt a high-priority interrupt--not even another high priority interrupt. A high-priority interrupt may interrupt a low-priority interrupt. A low-priority interrupt may only occur if no other interrupt is already executing. If two interrupts occur at the same time, the interrupt with higher priority will execute first. If both interrupts are of the same priority the interrupt which is serviced first by polling sequence will be executed first.


Interrupt Priorities and Polling SequenceThe complete structure of the 8051 interrupts can be well understood -figure 11.16. The five interrupt sources are passed first - IE register, which decides the enabling and disabling of interrupts. The global interrupt enable -shown -figure. The IP register - set two priority levels among the available interrupts. This is shown in the figure as high priority and low priority blocks. The bits IT0 and IT1 can be set by TCON special function register and this is used to select whether the hardware interrupt is level triggered or edge triggered.


Bit Patterns for the TCON SFR

Bit positionD7D6D5D4D3D2D1D0Bit Address8F8E8D8C8B8A8988NameTF1TR1TF0TR0IE1IT1IE0IT0ExplanationTimer 1 Over flow flagTimer 1 run control bit. Set to 1 by software to run.Timer 0 Over flow flagTimer 0 run control bit. Set to 1 by soft ware to run.External Interrupt 1

edge detect bitInterrupt 1 type control. 1 - edge triggering and

0- level triggeringExternal Interrupt 0

edge detect bitInterrupt 0 type control. 1 - edge triggering and

0- level triggering


Structure of 8051 Interrupts


Timing of Interrupts8051 micro-controller samples the hardware signal level on its pins once in every machine cycle. As 8051 takes 12 clock cycles to complete one machine cycle, the interrupt signal applied at the pins of 8051 must be available for at least 12 clock periods.External interrupts are applied at the pins INT0 and INT1. The sensing of voltage level applied to this pin can also programmed in 8051. The interrupts can be either level triggered or edge triggered as set by the IT0 and IT1 bits of the SFR TCONA 0 on these bit positions will make both the hardware interrupts to be level triggered. Level triggered means a low level voltage on the interrupt pins will activate the interrupts.


Interrupt Priorities and Polling SequenceA 1 on the IT0 and IT1 bits of the SFR TCON will program the hardware interrupts as edge triggered. Edge triggering means the change of voltage from high state to low state will activate the interrupt.When an interrupt is triggered, the micro controller takes the following actions automatically: The current Program Counter is saved on the stack, low-byte first. Interrupts of the same and lower priority are blocked. In the case of Timer and External interrupts, the corresponding interrupt flag is cleared.


Interrupt Priorities and Polling SequenceProgram execution transfers to the corresponding interrupt handler vector address. The Interrupt Handler Routine executes. An interrupt ends when your program executes the RETI (Return from Interrupt) instruction. When the RETI instruction is executed the micro controller takes the following actions: Two bytes are popped off the stack into the Program Counter to restore normal program execution. Interrupt status is restored to its pre-interrupt status.


Interrupt Priorities and Polling SequenceThe internal architecture of 8051 is such that the external hardware interrupts will be cleared automatically when the interrupt service routine is executed only if is programmed to be edge or transition triggered. If the interrupts are level triggered, then the programmer will have to reset the interrupt enable corresponding to this interrupt using IP SFRIf the interrupt being handled is a Timer or External interrupt, the micro controller automatically clears the interrupt flag before passing control to interrupt handler routine. This means it is not necessary to clear the bit in the program.



8051 Serial PortsOne of the 8051s many powerful features is its integrated Universal Asynchronous Receiver Transmitter (UART), otherwise known as a serial port. With integrated serial port of 8051, data can be transmitted and received easily by reading and writing the data to the serial port registers. The features of the 8051 serial ports are Full duplex operation.Receive Buffered.Access using single double buffered Register SBUF.Four different modes of operation.Option to use fixed baud rate or programmable baud rate.



8051 Serial PortsFull Duplex serial port means that it can transmit and receive data simultaneously. It is also receive-buffered, meaning it can commence reception of a second byte before a previously received byte has been read from the SBUF register. However, if the first byte still hasnt been read by the time reception of the second byte is complete, one of the bytes will be lost. The serial port receive and transmit registers are both accessed at Special Function Register SBUF. Oxford University Press 2013


8051 Serial Ports Data to be transmitted are written to the register SBUF and the data received by the serial port are read from the register SBUF. Physically reading and writing SBUF actually accesses two separate registers. This technique of having same address for two different registers is called double buffering. Oxford University Press 2013


SERIAL PORT CONTROL SFRSThe serial port of 8051 is controlled by two registers in SFR area of 8051 as shown in Table The two registers are Serial Port control registers; SCON and serial port buffer register SBUF. Oxford University Press 2013

SFR NameDescriptionSFR AddressSCONSerial port control register98hSBUF Serial port buffer register 99h


SERIAL PORT CONTROL SFRSIn addition to the above two registers, the MSB of PCON register named as SMOD bit is used to double the baud rate of serial transmission and reception. If SMOD bit is set to 1, then the baud rate is doubled.The individual bits of SCON have the functions as shown in Table . As the SCON register has many individual status bits, the individual bits of this register are bit addressable. The bit address is also given in Table . The programmer can use these bit addresses to check the status of the serial port and set the mode individually. Oxford University Press 2013


Bit patterns for SCON (98h) SFR Oxford University Press 2013

BitNameBit AddressExplanation of FunctionD7SM09FhSerial port mode select bitsD6SM19EhD5SM29DhMultiprocessor Communications Enable bitD4REN9ChReceiver Enable. This bit must be set in order to receive characters.D3TB89BhTransmit bit 8. The 9th bit to transmit in mode 2 and 3.D2RB89AhReceive bit 8. The 9th bit received in mode 2 and 3.D1TI99hTransmit Interrupt Flag. Set when a byte has been completely transmitted.D0RI98hReceive Interrupt Flag. Set when a byte has been completely received.


Bit Pattern - DescriptionD7 and D6 bits of the SCON register define the operation modes of the serial port and the basic operating modes are given in Table. The SM0 and SM1 bits can select any one of the four operating modes described in the next section.



Oxford University Press 2013Definition of Bits SM0 and SM1 in SCON SFR


Bit Pattern - DescriptionThe next bit, SM2, is a flag used for enabling "Multiprocessor communication" in modes 2 and 3. If SM2 is set to 1 in modes 2 and 3, the Receive Interrupt RI flag will not be activated if the received 9th data bit is 0. If SM2 is set in Mode1, then Receive Interrupt RI flag will not be activated if valid stop bit is not received. This can be useful in certain advanced serial applications. It can be now assumed that SM2 bit has to be cleared so that RI flag will be set when any character is received.



Bit Pattern - DescriptionThe next bit, REN, is "Receiver Enable." This bit is set in order to receive the characters from the receive data line of the serial port.The TB8 bit is used in modes 2 and 3. In modes 2 and 3, a total of nine data bits are transmitted. The first 8 bits are the 8 bits of the data to be transmitted, and the ninth bit is taken from TB8. The RB8 also operates in modes 2 and 3 on the reception side. Oxford University Press 2013


Bit Pattern - DescriptionWhen a byte is received in modes 2 or 3, a total of nine bits are received. In this case, the first eight bits received are the data of the serial byte received and the value of the ninth bit received will be placed in RB8. TI means "Transmit Interrupt." When a program writes a data to the serial port buffer SBUF, then the serial port will start shifting this data in the serial transmit line bit by bit at the predefined clock speed or baud rate. 8051 will give TI signal to the programmer after sending the data completely. Oxford University Press 2013


Bit Pattern - DescriptionUpon sensing the TI bit set to 1, the programmer can then write the next data for transmission. When the TI bit is set, the programmer may assume that the serial port is "free" and ready to send the next byte. Finally, the RI bit means "Receive Interrupt." Whenever a data is received on the receive data line of the serial port, this serial data will be shifted in to a buffer and then stored in the SBUF register. Setting of RI bit indicates that a byte has been received. Upon sensing the RI bit set to 1, the programmer may read the data from the SBUF.



OPERATING MODESBits SM0 and SM1 are used to set the serial mode to a value between 0 and 3. Selecting the Serial Mode selects the mode of operation (8-bit/9-bit, UART or Shift Register) and also determines how the baud rate will be calculated. In modes 0 and 2 the baud rate is fixed based on the oscillators frequency. In modes 1 and 3 the baud rate is variable based on Timer 1 overflows. Oxford University Press 2013


Block Diagram of the serial port of 8051 Oxford University Press 2013


SBUFSBUF is physically two registers with the same address.When data to be transmitted is written to the SBUF register, then it will be shifted bit by bit into the TXD line of 8051. The port 3 pin 3.1 acts as the TXD line. The shifting is done by the transmit clock which determines the baud rate. Similarly, when the data bits are received on the RXD line (Pin 3.0 of port 3), the bits are shifted serially into the shift register according to the Receive clock. After the reception is complete, the data received will be placed on SBUF from where it can be read by the programmer through the internal bus. Oxford University Press 2013


Reception / TransmissionMode 0: In this mode serial data is entering and exiting through RxD pin. So, in mode 0, Full duplex is not possible meaning that both transmission and reception cannot take place simultaneously. TxD pin outputs the shift clock. 8 bits are transmitted/received (LSB first). The baud rate is fixed at 1/12 the oscillator frequency. Transmission is started by writing a data byte to the SBUF register and once the transmission is complete, TI flag is setThe reception is started by enabling REN in SCON register. Once the data reception is complete, the RI flag is set The baud rate in Mode 0 is fixed at one twelfth of the clock frequency. Baud rate= (Clock frequency/12)



Signal Transmission / Reception pattern Oxford University Press 2013


Reception / TransmissionMode 1: In this mode, 10 bits are transmitted through TxD and simultaneously 10 bits can be received through RxD. The 10 bits are made up of a start bit (0), 8 data bits (LSB first), and a stop bit (1). On completion of reception, the stop bit goes into RB8 in Special Function Register SCON. The baud rate is variable and is set by the Timer 1 overflow rate. The baud rate for mode 1 is fixed at the following rate.



Reception / TransmissionBaud rate= (Timer 1 overflow rate /16) if SMOD bit in PCON SFR is set to 1.Baud rate= (Timer 1 overflow rate /32) if SMOD bit in PCON SFR is set to 0.Note that PCON is a special Function Register described in chapter 25. The MSB of PCON register can be set or reset by the programmer. The baud rate can be doubled by setting the MSB of PCON. Oxford University Press 2013


Reception / TransmissionIn order to generate the baud rate clock from timer 1, Timer 1 can be configured to act as timer in auto reload mode with the timer 1 interrupt disabled.As in mode 0, the transmission is initiated by writing a data to SBUF register. Reception is initiated by a 1 to 0 transition that is the start bit received and also when REN of SCON SFR is 1.



Reception / TransmissionMode 2: In this mode, 11 bits are transmitted through TxD or received through RxD. The 11 bits are made up of one start bit (always 0), 8 data bits (LSB first), a programmable 9th data bit, and a stop bit (always 1). The 9th data bit transmitted is same as TB8 bit in SCON special function register. It can be assigned the value of 0 or 1 by the programmer. Or, for example, the parity bit (P, in the PSW) could be moved into TB8. On reception, the 9th data bit goes into RB8 in Special Function Register SCON, while the stop bit is ignored. The baud rate is programmable to either 1/32 or 1/64 of the oscillator clock frequency. Baud rate= (Clock frequency /32) if SMOD bit in PCON SFR is set to 1.Baud rate= (Clock frequency /64) if SMOD bit in PCON SFR is set to 0.



Reception / TransmissionMode 3: In this mode, 11 bits are transmitted through TxD and simultaneously 11 bits are received through RxD. The 11bits are made up of a start bit (0), 8 data bits (LSB first), a programmable 9th data bit, and a stop bit (1). In fact, Mode 3 is the same as Mode 2 in all respects except baud rate. The baud rate in Mode 3 is variable. The baud rate for mode 3 is fixed at the following rate similar to mode1.Baud rate= (Timer 1 overflow rate /16) if SMOD bit in PCON SFR is set to 1.Baud rate= (Timer 1 overflow rate /32) if SMOD bit in PCON SFR is set to 0.



Reception / TransmissionIn all four modes, transmission is initiated by any instruction that uses SBUF as a destination register. Reception is initiated in Mode 0 by the condition RI = 0 and REN = 1. Reception is initiated in the other modes by the incoming start bit when REN = 1.The flow chart 11.20 shows the steps in programming the serial port of 8051. These steps are detailed in the following sections and also in the example programs.



Programming the Serial Port Oxford University Press 2013


Initializing Serial PortOnce the Serial Port Mode has been selected, then the programmer must configure the serial ports baud rate. Only serial port modes 1 and 3, the baud rates are programmable. The Baud Rate is determined based on the oscillators frequency when in mode 0 and 2. In mode 0, the baud rate is always the oscillator frequency divided by 12. This means if the crystal is 11.059 MHz, mode 0 baud rate will always be 921,583 baud. In mode 2 the baud rate is always the oscillator frequency divided by 64, so an 11.059 MHz crystal speed will yield a baud rate of 172,797. Oxford University Press 2013


Initializing Serial PortIn modes 1 and 3, the baud rate is determined by how frequently timer 1 overflows. The most common method is to put timer 1 in 8-bit auto-reload mode (timer mode 2) and set a reload value (TH1) that causes Timer 1 to overflow at a frequency appropriate to generate a baud rate. To determine the value that must be placed in TH1 to generate a given baud rate, the following equation is used. TH1 = 256 - ((Clock frequency / 384) / Baud) if SMOD in PCON SFR is 0.TH1 = 256 - ((Clock frequency / 192) / Baud) if SMOD in PCON SFR is 1. The following table gives the commonly used baud rates and the corresponding reload for the timer in mode 2 assuming the clock frequency of 11.059 MHz and SMOD is reset.



Commonly used baud rates Oxford University Press 2013

Baud RateTimer value TH1300A0h1200D0h2400FAh9600FDh


Baud RateFollowing set of instructions will set the timer for the baud rate of 9600.MOV TMOD, #00100000B ;timer/counter 1 set for mode 2, 8-bit TIMER ;operationMOV TH1, #0FDh ; timer/counter 1 is timed for 9600 baudSETB TR1 ; timer/counter 1 is enabled for free runFor initializing the serial port for mode 3 operation, the following instruction can be used.MOV SCON, #11010000B



Transmitting and Receiving Data Using Serial Port Once the Serial Port has been properly configured as explained above, the serial port is ready to be used to send data and receive data. To write a byte to the serial port one must simply write the value to be transmitted to the SBUF (99h) SFR. For example, to send the letter "A" to the serial port, the following instruction can be written. MOV SBUF, #A Oxford University Press 2013


Upon execution of the above instruction the 8051 will begin transmitting the character via the serial port. Once the transmission is complete, the serial port transmit interrupt flag TI is set. Since the 8051 does not have a serial output buffer, a character can not be written to SBUF before the previous written character is completely transmitted. This can be accomplished by checking the TI flag. Reading data received by the serial port is equally easy. To read a byte from the serial port one just needs to read the value stored in the SBUF (99h) SFR after the 8051 has automatically set the RI flag in SCON. Oxford University Press 2013Transmitting and Receiving Data Using Serial Port


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8051 Interrupt and Seriel

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